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@@ -398,11 +398,9 @@ static void psram_disable_qio_mode(psram_spi_num_t spi_num)
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psram_cmd_end(spi_num);
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}
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-//read psram id
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-static void psram_read_id(uint64_t* dev_id)
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+//read psram id, should issue `psram_disable_qio_mode` before calling this
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+static void psram_read_id(psram_spi_num_t spi_num, uint64_t* dev_id)
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{
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- psram_spi_num_t spi_num = PSRAM_SPI_1;
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- psram_disable_qio_mode(spi_num);
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uint32_t dummy_bits = 0 + extra_dummy;
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uint32_t psram_id[2] = {0};
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psram_cmd_t ps_cmd;
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@@ -902,14 +900,19 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
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// GPIO related settings
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psram_gpio_config(&psram_io, mode);
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- /* 16Mbit psram ID read error
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- * workaround: Issue a pre-condition of dummy read id, then Read ID command
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- */
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- psram_read_id(&s_psram_id);
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- psram_read_id(&s_psram_id);
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+ psram_spi_num_t spi_num = PSRAM_SPI_1;
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+ psram_disable_qio_mode(spi_num);
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+ psram_read_id(spi_num, &s_psram_id);
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if (!PSRAM_IS_VALID(s_psram_id)) {
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- ESP_EARLY_LOGE(TAG, "PSRAM ID read error: 0x%08x", (uint32_t)s_psram_id);
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- return ESP_FAIL;
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+ /* 16Mbit psram ID read error workaround:
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+ * treat the first read id as a dummy one as the pre-condition,
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+ * Send Read ID command again
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+ */
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+ psram_read_id(spi_num, &s_psram_id);
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+ if (!PSRAM_IS_VALID(s_psram_id)) {
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+ ESP_EARLY_LOGE(TAG, "PSRAM ID read error: 0x%08x", (uint32_t)s_psram_id);
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+ return ESP_FAIL;
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+ }
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}
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if (psram_is_32mbit_ver0()) {
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