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@@ -1,5 +1,5 @@
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/*
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- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -15,7 +15,7 @@
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#include "soc/clk_tree_defs.h"
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#include "hal/i2c_types.h"
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#include "esp_attr.h"
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-#include "hal/misc.h"
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+#include "hal/assert.h"
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#ifdef __cplusplus
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extern "C" {
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@@ -97,7 +97,7 @@ static inline void i2c_ll_master_cal_bus_clk(uint32_t source_clk, uint32_t bus_f
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static inline void i2c_ll_master_set_bus_timing(i2c_dev_t *hw, i2c_hal_clk_config_t *bus_cfg)
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{
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/* SCL period. According to the TRM, we should always subtract 1 to SCL low period */
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- assert(bus_cfg->scl_low > 0);
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+ HAL_ASSERT(bus_cfg->scl_low > 0);
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hw->scl_low_period.period = bus_cfg->scl_low - 1;
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/* Still according to the TRM, if filter is not enbled, we have to subtract 7,
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* if SCL filter is enabled, we have to subtract:
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@@ -106,12 +106,12 @@ static inline void i2c_ll_master_set_bus_timing(i2c_dev_t *hw, i2c_hal_clk_confi
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* to SCL high period */
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uint16_t scl_high = bus_cfg->scl_high;
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/* In the "worst" case, we will subtract 13, make sure the result will still be correct */
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- assert(scl_high > 13);
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+ HAL_ASSERT(scl_high > 13);
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if (hw->scl_filter_cfg.en) {
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if (hw->scl_filter_cfg.thres <= 2) {
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scl_high -= 8;
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} else {
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- assert(hw->scl_filter_cfg.thres <= 7);
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+ HAL_ASSERT(hw->scl_filter_cfg.thres <= 7);
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scl_high -= hw->scl_filter_cfg.thres + 6;
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}
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} else {
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