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@@ -25,6 +25,7 @@
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#include "esp_err.h"
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#include "esp_intr.h"
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#include "esp_attr.h"
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+#include "esp_freertos_hooks.h"
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#include "soc/timer_group_struct.h"
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#include "soc/timer_group_reg.h"
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@@ -36,38 +37,12 @@
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#define WDT_INT_NUM 24
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-void esp_int_wdt_init() {
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- TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
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- TIMERG1.wdt_config0.sys_reset_length=7; //3.2uS
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- TIMERG1.wdt_config0.cpu_reset_length=7; //3.2uS
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- TIMERG1.wdt_config0.level_int_en=1;
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- TIMERG1.wdt_config0.stg0=TIMG_WDT_STG_SEL_INT; //1st stage timeout: interrupt
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- TIMERG1.wdt_config0.stg1=TIMG_WDT_STG_SEL_RESET_SYSTEM; //2nd stage timeout: reset system
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- TIMERG1.wdt_config1.clk_prescale=80*500; //Prescaler: wdt counts in ticks of 0.5mS
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- //The timer configs initially are set to 5 seconds, to make sure the CPU can start up. The tick hook sets
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- //it to their actual value.
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- TIMERG1.wdt_config2=10000;
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- TIMERG1.wdt_config3=10000;
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- TIMERG1.wdt_config0.en=1;
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- TIMERG1.wdt_feed=1;
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- TIMERG1.wdt_wprotect=0;
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- TIMERG1.int_clr_timers.wdt=1;
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- TIMERG1.int_ena.wdt=1;
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- ESP_INTR_DISABLE(WDT_INT_NUM);
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- intr_matrix_set(xPortGetCoreID(), ETS_TG1_WDT_LEVEL_INTR_SOURCE, WDT_INT_NUM);
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- //We do not register a handler for the interrupt because it is interrupt level 4 which
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- //is not servicable from C. Instead, xtensa_vectors.S has a call to the panic handler for
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- //this interrupt.
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- ESP_INTR_ENABLE(WDT_INT_NUM);
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-}
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-
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-
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//Take care: the tick hook can also be called before esp_int_wdt_init() is called.
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#if CONFIG_INT_WDT_CHECK_CPU1
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//Not static; the ISR assembly checks this.
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bool int_wdt_app_cpu_ticked=false;
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-void IRAM_ATTR vApplicationTickHook(void) {
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+static void IRAM_ATTR tick_hook(void) {
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if (xPortGetCoreID()!=0) {
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int_wdt_app_cpu_ticked=true;
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} else {
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@@ -83,7 +58,7 @@ void IRAM_ATTR vApplicationTickHook(void) {
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}
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}
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#else
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-void IRAM_ATTR vApplicationTickHook(void) {
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+static void IRAM_ATTR tick_hook(void) {
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if (xPortGetCoreID()!=0) return;
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TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
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TIMERG1.wdt_config2=CONFIG_INT_WDT_TIMEOUT_MS*2; //Set timeout before interrupt
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@@ -93,4 +68,33 @@ void IRAM_ATTR vApplicationTickHook(void) {
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}
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#endif
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+
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+void esp_int_wdt_init() {
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+ TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
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+ TIMERG1.wdt_config0.sys_reset_length=7; //3.2uS
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+ TIMERG1.wdt_config0.cpu_reset_length=7; //3.2uS
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+ TIMERG1.wdt_config0.level_int_en=1;
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+ TIMERG1.wdt_config0.stg0=TIMG_WDT_STG_SEL_INT; //1st stage timeout: interrupt
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+ TIMERG1.wdt_config0.stg1=TIMG_WDT_STG_SEL_RESET_SYSTEM; //2nd stage timeout: reset system
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+ TIMERG1.wdt_config1.clk_prescale=80*500; //Prescaler: wdt counts in ticks of 0.5mS
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+ //The timer configs initially are set to 5 seconds, to make sure the CPU can start up. The tick hook sets
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+ //it to their actual value.
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+ TIMERG1.wdt_config2=10000;
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+ TIMERG1.wdt_config3=10000;
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+ TIMERG1.wdt_config0.en=1;
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+ TIMERG1.wdt_feed=1;
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+ TIMERG1.wdt_wprotect=0;
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+ TIMERG1.int_clr_timers.wdt=1;
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+ TIMERG1.int_ena.wdt=1;
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+ esp_register_freertos_tick_hook(tick_hook);
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+ ESP_INTR_DISABLE(WDT_INT_NUM);
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+ intr_matrix_set(xPortGetCoreID(), ETS_TG1_WDT_LEVEL_INTR_SOURCE, WDT_INT_NUM);
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+ //We do not register a handler for the interrupt because it is interrupt level 4 which
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+ //is not servicable from C. Instead, xtensa_vectors.S has a call to the panic handler for
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+ //this interrupt.
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+ ESP_INTR_ENABLE(WDT_INT_NUM);
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+}
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+
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+
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+
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#endif
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