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Merge branch 'feat/i2c_rcc_support' into 'master'

refactor(i2c): Add reset and clock control to i2c ll layer

See merge request espressif/esp-idf!26684
C.S.M преди 2 години
родител
ревизия
59d029bf66

+ 34 - 7
components/driver/i2c/i2c.c

@@ -110,6 +110,18 @@ static const char *I2C_TAG = "i2c";
 #endif
 #define I2C_MEM_ALLOC_CAPS_DEFAULT      MALLOC_CAP_DEFAULT
 
+#if SOC_PERIPH_CLK_CTRL_SHARED
+#define I2C_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define I2C_CLOCK_SRC_ATOMIC()
+#endif
+
+#if !SOC_RCC_IS_INDEPENDENT
+#define I2C_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define I2C_RCC_ATOMIC()
+#endif
+
 /**
  * I2C bus are defined in the header files, let's check that the values are correct
  */
@@ -240,7 +252,9 @@ static void i2c_hw_disable(i2c_port_t i2c_num)
 {
     I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
     if (i2c_context[i2c_num].hw_enabled != false) {
-        periph_module_disable(i2c_periph_signal[i2c_num].module);
+        I2C_RCC_ATOMIC() {
+            i2c_ll_enable_bus_clock(i2c_num, false);
+        }
         i2c_context[i2c_num].hw_enabled = false;
     }
     I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));
@@ -250,7 +264,10 @@ static void i2c_hw_enable(i2c_port_t i2c_num)
 {
     I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
     if (i2c_context[i2c_num].hw_enabled != true) {
-        periph_module_enable(i2c_periph_signal[i2c_num].module);
+        I2C_RCC_ATOMIC() {
+            i2c_ll_enable_bus_clock(i2c_num, true);
+            i2c_ll_reset_register(i2c_num);
+        }
         i2c_context[i2c_num].hw_enabled = true;
     }
     I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));
@@ -375,7 +392,9 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
         return ESP_FAIL;
     }
     i2c_hw_enable(i2c_num);
-    i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    }
     //Disable I2C interrupt.
     i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
     i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
@@ -478,7 +497,9 @@ esp_err_t i2c_driver_delete(i2c_port_t i2c_num)
     }
 #endif
 
-    i2c_hal_deinit(&i2c_context[i2c_num].hal);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_hal_deinit(&i2c_context[i2c_num].hal);
+    }
     free(p_i2c_obj[i2c_num]);
     p_i2c_obj[i2c_num] = NULL;
 
@@ -746,7 +767,9 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf)
         return ret;
     }
     i2c_hw_enable(i2c_num);
-    i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);
+    }
     I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));
     i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
     i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);
@@ -754,7 +777,9 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf)
     if (i2c_conf->mode == I2C_MODE_SLAVE) {  //slave mode
         i2c_hal_slave_init(&(i2c_context[i2c_num].hal));
         i2c_ll_slave_tx_auto_start_en(i2c_context[i2c_num].hal.dev, true);
-        i2c_ll_set_source_clk(i2c_context[i2c_num].hal.dev, src_clk);
+        I2C_CLOCK_SRC_ATOMIC() {
+            i2c_ll_set_source_clk(i2c_context[i2c_num].hal.dev, src_clk);
+        }
         i2c_ll_set_slave_addr(i2c_context[i2c_num].hal.dev, i2c_conf->slave.slave_addr, i2c_conf->slave.addr_10bit_en);
         i2c_ll_set_rxfifo_full_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_FULL_THRESH_VAL);
         i2c_ll_set_txfifo_empty_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_EMPTY_THRESH_VAL);
@@ -768,7 +793,9 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf)
         i2c_hal_master_init(&(i2c_context[i2c_num].hal));
         //Default, we enable hardware filter
         i2c_ll_master_set_filter(i2c_context[i2c_num].hal.dev, I2C_FILTER_CYC_NUM_DEF);
-        i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk, s_get_src_clk_freq(src_clk));
+        I2C_CLOCK_SRC_ATOMIC() {
+            i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk, s_get_src_clk_freq(src_clk));
+        }
     }
     i2c_ll_update(i2c_context[i2c_num].hal.dev);
     I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

+ 10 - 4
components/driver/i2c/i2c_common.c

@@ -56,9 +56,13 @@ static esp_err_t s_i2c_bus_handle_aquire(i2c_port_num_t port_num, i2c_bus_handle
             bus->bus_mode = mode;
 
             // Enable the I2C module
-            periph_module_enable(i2c_periph_signal[port_num].module);
-            periph_module_reset(i2c_periph_signal[port_num].module);
-            i2c_hal_init(&bus->hal, port_num);
+            I2C_RCC_ATOMIC() {
+                i2c_ll_enable_bus_clock(bus->port_num, true);
+                i2c_ll_reset_register(bus->port_num);
+            }
+            I2C_CLOCK_SRC_ATOMIC() {
+                i2c_hal_init(&bus->hal, port_num);
+            }
         }
     } else {
         ESP_LOGE(TAG, "I2C bus id(%d) has already been acquired", port_num);
@@ -131,7 +135,9 @@ esp_err_t i2c_release_bus_handle(i2c_bus_handle_t i2c_bus)
                 ESP_RETURN_ON_ERROR(esp_pm_lock_delete(i2c_bus->pm_lock), TAG, "delete pm_lock failed");
             }
             // Disable I2C module
-            periph_module_disable(i2c_periph_signal[port_num].module);
+            I2C_RCC_ATOMIC() {
+                i2c_ll_enable_bus_clock(port_num, false);
+            }
             free(i2c_bus);
         }
     }

+ 8 - 2
components/driver/i2c/i2c_master.c

@@ -486,7 +486,10 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf
     i2c_master->rx_cnt = 0;
     i2c_master->read_len_static = 0;
 
-    i2c_hal_set_bus_timing(hal, i2c_dev->scl_speed_hz, i2c_master->base->clk_src, i2c_master->base->clk_src_freq_hz);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_ll_set_source_clk(hal->dev, i2c_master->base->clk_src);
+        i2c_hal_set_bus_timing(hal, i2c_dev->scl_speed_hz, i2c_master->base->clk_src, i2c_master->base->clk_src_freq_hz);
+    }
     i2c_ll_master_set_fractional_divider(hal->dev, 0, 0);
     i2c_ll_update(hal->dev);
 
@@ -1044,7 +1047,10 @@ esp_err_t i2c_master_probe(i2c_master_bus_handle_t i2c_master, uint16_t address,
 
     // I2C probe does not have i2c device module. So set the clock parameter independently
     // This will not influence device transaction.
-    i2c_hal_set_bus_timing(hal, 100000, i2c_master->base->clk_src, i2c_master->base->clk_src_freq_hz);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_ll_set_source_clk(hal->dev, i2c_master->base->clk_src);
+        i2c_hal_set_bus_timing(hal, 100000, i2c_master->base->clk_src, i2c_master->base->clk_src_freq_hz);
+    }
     i2c_ll_master_set_fractional_divider(hal->dev, 0, 0);
     i2c_ll_update(hal->dev);
 

+ 13 - 0
components/driver/i2c/i2c_private.h

@@ -17,12 +17,25 @@
 #include "freertos/task.h"
 #include "freertos/ringbuf.h"
 #include "driver/i2c_slave.h"
+#include "esp_private/periph_ctrl.h"
 #include "esp_pm.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#if SOC_PERIPH_CLK_CTRL_SHARED
+#define I2C_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define I2C_CLOCK_SRC_ATOMIC()
+#endif
+
+#if !SOC_RCC_IS_INDEPENDENT
+#define I2C_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define I2C_RCC_ATOMIC()
+#endif
+
 #if CONFIG_I2C_ISR_IRAM_SAFE
 #define I2C_MEM_ALLOC_CAPS    (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
 #else

+ 3 - 1
components/driver/i2c/i2c_slave.c

@@ -245,7 +245,9 @@ esp_err_t i2c_new_slave_device(const i2c_slave_config_t *slave_config, i2c_slave
 #endif
 
     //Default, we enable hardware filter
-    i2c_ll_set_source_clk(hal->dev, slave_config->clk_source);
+    I2C_CLOCK_SRC_ATOMIC() {
+        i2c_ll_set_source_clk(hal->dev, slave_config->clk_source);
+    }
     bool addr_10bit_en = slave_config->addr_bit_len != I2C_ADDR_BIT_LEN_7;
     i2c_ll_set_slave_addr(hal->dev, slave_config->slave_addr, addr_10bit_en);
 #if SOC_I2C_SLAVE_SUPPORT_BROADCAST

+ 46 - 0
components/hal/esp32/include/hal/i2c_ll.h

@@ -13,6 +13,7 @@
 #include "soc/i2c_periph.h"
 #include "soc/i2c_struct.h"
 #include "soc/clk_tree_defs.h"
+#include "soc/dport_reg.h"
 #include "hal/i2c_types.h"
 #include "esp_attr.h"
 #include "hal/assert.h"
@@ -670,6 +671,51 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     ;// ESP32 do not support
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    if (i2c_port == 0) {
+        uint32_t reg_val = DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG);
+        reg_val &= ~DPORT_I2C_EXT0_CLK_EN;
+        reg_val |= enable << 7;
+        DPORT_WRITE_PERI_REG(DPORT_PERIP_CLK_EN_REG, reg_val);
+    } else if (i2c_port == 1) {
+        uint32_t reg_val = DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG);
+        reg_val &= ~DPORT_I2C_EXT1_CLK_EN;
+        reg_val |= enable << 18;
+        DPORT_WRITE_PERI_REG(DPORT_PERIP_CLK_EN_REG, reg_val);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0)
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    if (i2c_port == 0) {
+        DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, DPORT_I2C_EXT0_RST);
+        DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, 0);
+    } else if (i2c_port == 1) {
+        DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, DPORT_I2C_EXT1_RST);
+        DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, 0);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0)
+
 /**
  * @brief Set whether slave should auto start, or only start with start signal from master
  *

+ 33 - 0
components/hal/esp32c2/include/hal/i2c_ll.h

@@ -17,6 +17,7 @@
 #include "hal/i2c_types.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/clk_tree_defs.h"
+#include "soc/system_struct.h"
 #include "esp_attr.h"
 
 #ifdef __cplusplus
@@ -111,6 +112,38 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     hw->ctr.conf_upgate = 1;
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    (void)i2c_port;
+    SYSTEM.perip_clk_en0.i2c_ext0_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0)
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    (void)i2c_port;
+    SYSTEM.perip_rst_en0.i2c_ext0_rst = 1;
+    SYSTEM.perip_rst_en0.i2c_ext0_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0)
+
 /**
  * @brief  Configure the I2C bus timing related register.
  *

+ 33 - 0
components/hal/esp32c3/include/hal/i2c_ll.h

@@ -17,6 +17,7 @@
 #include "hal/i2c_types.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/clk_tree_defs.h"
+#include "soc/system_struct.h"
 #include "esp_attr.h"
 #include "hal/misc.h"
 
@@ -125,6 +126,38 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     hw->ctr.conf_upgate = 1;
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    (void)i2c_port;
+    SYSTEM.perip_clk_en0.reg_i2c_ext0_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0)
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    (void)i2c_port;
+    SYSTEM.perip_rst_en0.reg_i2c_ext0_rst = 1;
+    SYSTEM.perip_rst_en0.reg_i2c_ext0_rst = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0)
+
 /**
  * @brief  Configure the I2C bus timing related register.
  *

+ 24 - 0
components/hal/esp32c6/include/hal/i2c_ll.h

@@ -127,6 +127,30 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     hw->ctr.conf_upgate = 1;
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    (void)i2c_port;
+    PCR.i2c_conf.i2c_clk_en = enable;
+}
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    (void)i2c_port;
+    PCR.i2c_conf.i2c_rst_en = 1;
+    PCR.i2c_conf.i2c_rst_en = 0;
+}
+
 /**
  * @brief  Configure the I2C bus timing related register.
  *

+ 22 - 0
components/hal/esp32h2/include/hal/i2c_ll.h

@@ -126,6 +126,28 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     hw->ctr.conf_upgate = 1;
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    PCR.i2c[i2c_port].i2c_conf.i2c_clk_en = enable;
+}
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    PCR.i2c[i2c_port].i2c_conf.i2c_rst_en = 1;
+    PCR.i2c[i2c_port].i2c_conf.i2c_rst_en = 0;
+}
+
 /**
  * @brief  Configure the I2C bus timing related register.
  *

+ 43 - 2
components/hal/esp32p4/include/hal/i2c_ll.h

@@ -131,6 +131,45 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     hw->ctr.conf_upgate = 1;
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    if (i2c_port == 0) {
+        HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c0_apb_clk_en = enable;
+    } else if (i2c_port == 1) {
+        HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c1_apb_clk_en = enable;
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0)
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    if (i2c_port == 0) {
+        HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c0 = 1;
+        HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c0 = 0;
+    } else if (i2c_port == 1) {
+        HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c1 = 1;
+        HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c1 = 0;
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0)
+
 /**
  * @brief  Configure the I2C bus timing related register.
  *
@@ -753,6 +792,10 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c
 
 }
 
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_set_source_clk(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_set_source_clk(__VA_ARGS__);} while(0)
+
 /**
  * @brief Enable I2C peripheral controller clock
  *
@@ -762,10 +805,8 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c
 static inline void i2c_ll_enable_controller_clock(i2c_dev_t *hw, bool en)
 {
     if (hw == &I2C0) {
-        HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c0_apb_clk_en = en;
         HP_SYS_CLKRST.peri_clk_ctrl10.reg_i2c0_clk_en = en;
     } else if (hw == &I2C1) {
-        HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c1_apb_clk_en = en;
         HP_SYS_CLKRST.peri_clk_ctrl10.reg_i2c1_clk_en = en;
     } else if (hw == &LP_I2C) {
         // Do nothing

+ 46 - 0
components/hal/esp32s2/include/hal/i2c_ll.h

@@ -11,6 +11,7 @@
 #include "soc/i2c_periph.h"
 #include "soc/i2c_struct.h"
 #include "soc/clk_tree_defs.h"
+#include "soc/system_reg.h"
 #include "hal/i2c_types.h"
 #include "esp_attr.h"
 #include "hal/misc.h"
@@ -718,6 +719,51 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     ;// ESP32S2 do not support
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    if (i2c_port == 0) {
+        uint32_t reg_val = READ_PERI_REG(DPORT_PERIP_CLK_EN0_REG);
+        reg_val &= ~DPORT_I2C_EXT0_CLK_EN_M;
+        reg_val |= enable << DPORT_I2C_EXT0_CLK_EN_S;
+        WRITE_PERI_REG(DPORT_PERIP_CLK_EN0_REG, reg_val);
+    } else if (i2c_port == 1) {
+        uint32_t reg_val = READ_PERI_REG(DPORT_PERIP_CLK_EN0_REG);
+        reg_val &= ~DPORT_I2C_EXT1_CLK_EN_M;
+        reg_val |= enable << DPORT_I2C_EXT1_CLK_EN_S;
+        WRITE_PERI_REG(DPORT_PERIP_CLK_EN0_REG, reg_val);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0)
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    if (i2c_port == 0) {
+        WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, DPORT_I2C_EXT0_RST_M);
+        WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, 0);
+    } else if (i2c_port == 1) {
+        WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, DPORT_I2C_EXT1_RST_M);
+        WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, 0);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0)
+
 /**
  * @brief Set whether slave should auto start, or only start with start signal from master
  *

+ 41 - 0
components/hal/esp32s3/include/hal/i2c_ll.h

@@ -15,6 +15,7 @@
 #include "soc/soc_caps.h"
 #include "soc/i2c_struct.h"
 #include "soc/clk_tree_defs.h"
+#include "soc/system_struct.h"
 #include "hal/i2c_types.h"
 #include "esp_attr.h"
 #include "esp_assert.h"
@@ -125,6 +126,46 @@ static inline void i2c_ll_update(i2c_dev_t *hw)
     hw->ctr.conf_upgate = 1;
 }
 
+/**
+ * @brief Enable the bus clock for I2C module
+ *
+ * @param i2c_port I2C port id
+ * @param enable true to enable, false to disable
+ */
+static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable)
+{
+    if (i2c_port == 0) {
+        SYSTEM.perip_clk_en0.i2c_ext0_clk_en = enable;
+    } else if (i2c_port == 1) {
+        SYSTEM.perip_clk_en0.i2c_ext1_clk_en = enable;
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0)
+
+/**
+ * @brief Reset the I2C module
+ *
+ * @param i2c_port Group ID
+ */
+static inline void i2c_ll_reset_register(int i2c_port)
+{
+    if (i2c_port == 0) {
+        SYSTEM.perip_rst_en0.i2c_ext0_rst = 1;
+        SYSTEM.perip_rst_en0.i2c_ext0_rst = 0;
+    } else if (i2c_port == 1) {
+        SYSTEM.perip_rst_en0.i2c_ext1_rst = 1;
+        SYSTEM.perip_rst_en0.i2c_ext1_rst = 0;
+    }
+
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0)
+
 /**
  * @brief  Configure the I2C bus timing related register.
  *

+ 3 - 4
components/hal/i2c_hal.c

@@ -22,9 +22,8 @@ void i2c_hal_slave_init(i2c_hal_context_t *hal)
 }
 #endif
 
-void i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq)
+void _i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq)
 {
-    i2c_ll_set_source_clk(hal->dev, src_clk);
     i2c_hal_clk_config_t clk_cal = {0};
     i2c_ll_master_cal_bus_clk(source_freq, scl_freq, &clk_cal);
     i2c_ll_master_set_bus_timing(hal->dev, &clk_cal);
@@ -45,7 +44,7 @@ void i2c_hal_master_init(i2c_hal_context_t *hal)
     i2c_ll_rxfifo_rst(hal->dev);
 }
 
-void i2c_hal_init(i2c_hal_context_t *hal, int i2c_port)
+void _i2c_hal_init(i2c_hal_context_t *hal, int i2c_port)
 {
     if (hal->dev == NULL) {
         hal->dev = I2C_LL_GET_HW(i2c_port);
@@ -53,7 +52,7 @@ void i2c_hal_init(i2c_hal_context_t *hal, int i2c_port)
     i2c_ll_enable_controller_clock(hal->dev, true);
 }
 
-void i2c_hal_deinit(i2c_hal_context_t *hal)
+void _i2c_hal_deinit(i2c_hal_context_t *hal)
 {
     i2c_ll_enable_controller_clock(hal->dev, false);
     hal->dev = NULL;

+ 27 - 3
components/hal/include/hal/i2c_hal.h

@@ -83,7 +83,15 @@ void i2c_hal_master_init(i2c_hal_context_t *hal);
  *
  * @return None
  */
-void i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq);
+void _i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq);
+
+#if SOC_PERIPH_CLK_CTRL_SHARED
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_hal_set_bus_timing(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_set_bus_timing(__VA_ARGS__);} while(0)
+#else
+#define i2c_hal_set_bus_timing(...)   _i2c_hal_set_bus_timing(__VA_ARGS__)
+#endif
 
 /**
  * @brief  I2C hardware FSM reset
@@ -120,14 +128,30 @@ void i2c_hal_master_handle_rx_event(i2c_hal_context_t *hal, i2c_intr_event_t *ev
  * @param hal Context of the HAL
  * @param i2c_port I2C port number.
  */
-void i2c_hal_init(i2c_hal_context_t *hal, int i2c_port);
+void _i2c_hal_init(i2c_hal_context_t *hal, int i2c_port);
+
+#if SOC_PERIPH_CLK_CTRL_SHARED
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_hal_init(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_init(__VA_ARGS__);} while(0)
+#else
+#define i2c_hal_init(...)   _i2c_hal_init(__VA_ARGS__)
+#endif
 
 /**
  * @brief Deinit I2C hal layer
  *
  * @param hal Context of the HAL
  */
-void i2c_hal_deinit(i2c_hal_context_t *hal);
+void _i2c_hal_deinit(i2c_hal_context_t *hal);
+
+#if SOC_PERIPH_CLK_CTRL_SHARED
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define i2c_hal_deinit(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_deinit(__VA_ARGS__);} while(0)
+#else
+#define i2c_hal_deinit(...)   _i2c_hal_deinit(__VA_ARGS__)
+#endif
 
 /**
  * @brief Start I2C master transaction