G0: RISC-V targets have now an independent G0 layer

G0 doesn't depend on any G1+ layer for RISC-V based targets

components/esp_hw_support/port/esp32c2/private_include/regi2c_brownout.h

@@ -6,17 +6,4 @@
 
 #pragma once
 
-/**
- * @file regi2c_brownout.h
- * @brief Register definitions for brownout detector
- *
- * This file lists register fields of the brownout detector, located on an internal configuration
- * bus. These definitions are used via macros defined in regi2c_ctrl.h.
- */
-
-#define I2C_BOD            0x61
-#define I2C_BOD_HOSTID     0
-
-#define I2C_BOD_THRESHOLD           0x5
-#define I2C_BOD_THRESHOLD_MSB       2
-#define I2C_BOD_THRESHOLD_LSB       0
+#include "soc/regi2c_brownout.h"

components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h

@@ -6,74 +6,4 @@
 
 #pragma once
 
-/**
- * @file regi2c_saradc.h
- * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC.
- *
- * This file lists register fields of SAR, located on an internal configuration
- * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
- * function in adc_ll.h.
- */
-
-#define I2C_SAR_ADC            0X69
-#define I2C_SAR_ADC_HOSTID     0
-
-#define ADC_SAR1_ENCAL_GND_ADDR 0x7
-#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5
-#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5
-
-#define ADC_SAR2_ENCAL_GND_ADDR 0x7
-#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7
-#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7
-
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0
-
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR  0x0
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB  0x7
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB  0x0
-
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0
-
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR  0x3
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB  0x7
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB  0x0
-
-#define ADC_SAR1_DREF_ADDR  0x2
-#define ADC_SAR1_DREF_ADDR_MSB  0x6
-#define ADC_SAR1_DREF_ADDR_LSB  0x4
-
-#define ADC_SAR2_DREF_ADDR  0x5
-#define ADC_SAR2_DREF_ADDR_MSB  0x6
-#define ADC_SAR2_DREF_ADDR_LSB  0x4
-
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0
-
-#define ADC_SARADC_DTEST_RTC_ADDR 0x7
-#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1
-#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0
-
-#define ADC_SARADC_ENT_TSENS_ADDR 0x7
-#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2
-#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2
-
-#define ADC_SARADC_ENT_RTC_ADDR 0x7
-#define ADC_SARADC_ENT_RTC_ADDR_MSB 3
-#define ADC_SARADC_ENT_RTC_ADDR_LSB 3
-
-#define ADC_SARADC1_ENCAL_REF_ADDR 0x7
-#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4
-#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4
-
-#define ADC_SARADC2_ENCAL_REF_ADDR 0x7
-#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6
-#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6
-
-#define I2C_SARADC_TSENS_DAC 0x6
-#define I2C_SARADC_TSENS_DAC_MSB 3
-#define I2C_SARADC_TSENS_DAC_LSB 0
+#include "soc/regi2c_saradc.h"

components/esp_hw_support/port/esp32c3/private_include/regi2c_brownout.h

@@ -6,17 +6,4 @@
 
 #pragma once
 
-/**
- * @file regi2c_brownout.h
- * @brief Register definitions for brownout detector
- *
- * This file lists register fields of the brownout detector, located on an internal configuration
- * bus. These definitions are used via macros defined in regi2c_ctrl.h.
- */
-
-#define I2C_BOD            0x61
-#define I2C_BOD_HOSTID     0
-
-#define I2C_BOD_THRESHOLD           0x5
-#define I2C_BOD_THRESHOLD_MSB       2
-#define I2C_BOD_THRESHOLD_LSB       0
+#include "soc/regi2c_brownout.h"

components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h

@@ -6,74 +6,4 @@
 
 #pragma once
 
-/**
- * @file regi2c_saradc.h
- * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC.
- *
- * This file lists register fields of SAR, located on an internal configuration
- * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
- * function in adc_ll.h.
- */
-
-#define I2C_SAR_ADC            0X69
-#define I2C_SAR_ADC_HOSTID     0
-
-#define ADC_SAR1_ENCAL_GND_ADDR 0x7
-#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5
-#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5
-
-#define ADC_SAR2_ENCAL_GND_ADDR 0x7
-#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7
-#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7
-
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0
-
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR  0x0
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB  0x7
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB  0x0
-
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0
-
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR  0x3
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB  0x7
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB  0x0
-
-#define ADC_SAR1_DREF_ADDR  0x2
-#define ADC_SAR1_DREF_ADDR_MSB  0x6
-#define ADC_SAR1_DREF_ADDR_LSB  0x4
-
-#define ADC_SAR2_DREF_ADDR  0x5
-#define ADC_SAR2_DREF_ADDR_MSB  0x6
-#define ADC_SAR2_DREF_ADDR_LSB  0x4
-
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0
-
-#define ADC_SARADC_DTEST_RTC_ADDR 0x7
-#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1
-#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0
-
-#define ADC_SARADC_ENT_TSENS_ADDR 0x7
-#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2
-#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2
-
-#define ADC_SARADC_ENT_RTC_ADDR 0x7
-#define ADC_SARADC_ENT_RTC_ADDR_MSB 3
-#define ADC_SARADC_ENT_RTC_ADDR_LSB 3
-
-#define ADC_SARADC1_ENCAL_REF_ADDR 0x7
-#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4
-#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4
-
-#define ADC_SARADC2_ENCAL_REF_ADDR 0x7
-#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6
-#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6
-
-#define I2C_SARADC_TSENS_DAC 0x6
-#define I2C_SARADC_TSENS_DAC_MSB 3
-#define I2C_SARADC_TSENS_DAC_LSB 0
+#include "soc/regi2c_saradc.h"

components/esp_hw_support/port/esp32h2/private_include/regi2c_brownout.h

@@ -6,17 +6,4 @@
 
 #pragma once
 
-/**
- * @file regi2c_brownout.h
- * @brief Register definitions for brownout detector
- *
- * This file lists register fields of the brownout detector, located on an internal configuration
- * bus. These definitions are used via macros defined in regi2c_ctrl.h.
- */
-
-#define I2C_BOD            0x61
-#define I2C_BOD_HOSTID     0
-
-#define I2C_BOD_THRESHOLD           0x5
-#define I2C_BOD_THRESHOLD_MSB       2
-#define I2C_BOD_THRESHOLD_LSB       0
+#include "soc/regi2c_brownout.h"

components/esp_hw_support/port/esp32h2/private_include/regi2c_saradc.h

@@ -6,74 +6,4 @@
 
 #pragma once
 
-/**
- * @file regi2c_saradc.h
- * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC.
- *
- * This file lists register fields of SAR, located on an internal configuration
- * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
- * function in adc_ll.h.
- */
-
-#define I2C_SAR_ADC            0X69
-#define I2C_SAR_ADC_HOSTID     0
-
-#define ADC_SAR1_ENCAL_GND_ADDR 0x7
-#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5
-#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5
-
-#define ADC_SAR2_ENCAL_GND_ADDR 0x7
-#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7
-#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7
-
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3
-#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0
-
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR  0x0
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB  0x7
-#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB  0x0
-
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3
-#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0
-
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR  0x3
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB  0x7
-#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB  0x0
-
-#define ADC_SAR1_DREF_ADDR  0x2
-#define ADC_SAR1_DREF_ADDR_MSB  0x6
-#define ADC_SAR1_DREF_ADDR_LSB  0x4
-
-#define ADC_SAR2_DREF_ADDR  0x5
-#define ADC_SAR2_DREF_ADDR_MSB  0x6
-#define ADC_SAR2_DREF_ADDR_LSB  0x4
-
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2
-#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0
-
-#define ADC_SARADC_DTEST_RTC_ADDR 0x7
-#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1
-#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0
-
-#define ADC_SARADC_ENT_TSENS_ADDR 0x7
-#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2
-#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2
-
-#define ADC_SARADC_ENT_RTC_ADDR 0x7
-#define ADC_SARADC_ENT_RTC_ADDR_MSB 3
-#define ADC_SARADC_ENT_RTC_ADDR_LSB 3
-
-#define ADC_SARADC1_ENCAL_REF_ADDR 0x7
-#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4
-#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4
-
-#define ADC_SARADC2_ENCAL_REF_ADDR 0x7
-#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6
-#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6
-
-#define I2C_SARADC_TSENS_DAC 0x6
-#define I2C_SARADC_TSENS_DAC_MSB 3
-#define I2C_SARADC_TSENS_DAC_LSB 0
+#include "soc/regi2c_saradc.h"

components/hal/esp32c2/brownout_hal.c

@@ -8,9 +8,16 @@
 #include "hal/brownout_hal.h"
 #include "soc/rtc_cntl_struct.h"
 #include "soc/rtc_cntl_reg.h"
-#include "esp_private/regi2c_ctrl.h"
-#include "regi2c_brownout.h"
 #include "esp_attr.h"
+#include "esp_rom_regi2c.h"
+#if __has_include("esp_private/regi2c_ctrl.h")
+    #include "esp_private/regi2c_ctrl.h"
+#else
+    /* Only write funciton is needed in HAL component */
+    #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+#endif
+
+#include "soc/regi2c_brownout.h"
 
 
 void brownout_hal_config(const brownout_hal_config_t *cfg)

components/hal/esp32c2/include/hal/adc_ll.h

@@ -17,9 +17,15 @@
 #include "hal/misc.h"
 #include "hal/adc_types.h"
 #include "hal/adc_types_private.h"
+#include "esp_rom_regi2c.h"
 
-#include "esp_private/regi2c_ctrl.h"
-#include "regi2c_saradc.h"
+#if __has_include("esp_private/regi2c_ctrl.h")
+    #include "esp_private/regi2c_ctrl.h"
+#else
+    #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+#endif
+
+#include "soc/regi2c_saradc.h"
 
 #ifdef __cplusplus
 extern "C" {

components/hal/esp32c2/include/hal/gdma_ll.h

@@ -5,6 +5,7 @@
  */
 #pragma once
 
+#include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/gdma_struct.h"

components/hal/esp32c3/brownout_hal.c

@@ -8,10 +8,16 @@
 #include "hal/brownout_hal.h"
 #include "soc/rtc_cntl_struct.h"
 #include "soc/rtc_cntl_reg.h"
-#include "esp_private/regi2c_ctrl.h"
-#include "regi2c_brownout.h"
 #include "esp_attr.h"
+#include "esp_rom_regi2c.h"
+#if __has_include("esp_private/regi2c_ctrl.h")
+    #include "esp_private/regi2c_ctrl.h"
+#else
+    /* Only write funciton is needed in HAL component */
+    #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+#endif
 
+#include "soc/regi2c_brownout.h"
 
 void brownout_hal_config(const brownout_hal_config_t *cfg)
 {

components/hal/esp32c3/include/hal/adc_ll.h

@@ -18,9 +18,15 @@
 #include "hal/assert.h"
 #include "hal/adc_types.h"
 #include "hal/adc_types_private.h"
+#include "esp_rom_regi2c.h"
 
-#include "esp_private/regi2c_ctrl.h"
-#include "regi2c_saradc.h"
+#if __has_include("esp_private/regi2c_ctrl.h")
+    #include "esp_private/regi2c_ctrl.h"
+#else
+    #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+#endif
+
+#include "soc/regi2c_saradc.h"
 
 #ifdef __cplusplus
 extern "C" {

components/hal/esp32c3/include/hal/gdma_ll.h

@@ -5,6 +5,7 @@
  */
 #pragma once
 
+#include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/gdma_struct.h"

components/hal/esp32h2/brownout_hal.c

@@ -9,9 +9,16 @@
 #include "soc/rtc_cntl_struct.h"
 #include "soc/rtc_cntl_reg.h"
 #include "i2c_pmu.h"
-#include "esp_private/regi2c_ctrl.h"
-#include "regi2c_brownout.h"
 #include "esp_attr.h"
+#include "esp_rom_regi2c.h"
+#if __has_include("esp_private/regi2c_ctrl.h")
+    #include "esp_private/regi2c_ctrl.h"
+#else
+    /* Only write funciton is needed in HAL component */
+    #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+#endif
+
+#include "soc/regi2c_brownout.h"
 
 
 void brownout_hal_config(const brownout_hal_config_t *cfg)

components/hal/esp32h2/include/hal/adc_ll.h

@@ -17,9 +17,15 @@
 #include "soc/rtc_cntl_struct.h"
 #include "soc/rtc_cntl_reg.h"
 #include "hal/misc.h"
+#include "esp_rom_regi2c.h"
 
-#include "esp_private/regi2c_ctrl.h"
-#include "regi2c_saradc.h"
+#if __has_include("esp_private/regi2c_ctrl.h")
+    #include "esp_private/regi2c_ctrl.h"
+#else
+    #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID,  reg_add,  reg_add##_MSB,  reg_add##_LSB,  indata)
+#endif
+
+#include "soc/regi2c_saradc.h"
 
 #ifdef __cplusplus
 extern "C" {

components/hal/esp32h2/include/hal/gdma_ll.h

@@ -5,6 +5,7 @@
  */
 #pragma once
 
+#include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/gdma_struct.h"

components/hal/include/hal/rtc_io_hal.h

@@ -15,6 +15,8 @@
 #pragma once
 
 #include <esp_err.h>
+#include "sdkconfig.h"
+
 #if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C2
 #include "soc/soc_caps.h"
 #include "hal/rtc_io_ll.h"

components/hal/spi_flash_hal.c

@@ -30,7 +30,7 @@ static uint32_t get_flash_clock_divider(const spi_flash_hal_config_t *cfg)
     // round down flash frequency to keep it safe.
     int best_div = 0;
     if (clk_source < cfg->freq_mhz) {
-        ESP_LOGE(TAG, "Target frequency %dMHz higher than supported.", cfg->freq_mhz);
+        HAL_LOGE(TAG, "Target frequency %dMHz higher than supported.", cfg->freq_mhz);
         abort();
     }
 #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3

components/riscv/CMakeLists.txt

@@ -9,7 +9,7 @@ endif()
 if(BOOTLOADER_BUILD)
     set(priv_requires soc)
 else()
-    set(priv_requires soc freertos)
+    set(priv_requires soc)
     set(srcs
         "instruction_decode.c"
         "interrupt.c"

components/soc/esp32c2/include/soc/regi2c_brownout.h

@@ -0,0 +1,22 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_brownout.h
+ * @brief Register definitions for brownout detector
+ *
+ * This file lists register fields of the brownout detector, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h.
+ */
+
+#define I2C_BOD            0x61
+#define I2C_BOD_HOSTID     0
+
+#define I2C_BOD_THRESHOLD           0x5
+#define I2C_BOD_THRESHOLD_MSB       2
+#define I2C_BOD_THRESHOLD_LSB       0

components/soc/esp32c2/include/soc/regi2c_saradc.h

@@ -0,0 +1,79 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_saradc.h
+ * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC.
+ *
+ * This file lists register fields of SAR, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
+ * function in adc_ll.h.
+ */
+
+#define I2C_SAR_ADC            0X69
+#define I2C_SAR_ADC_HOSTID     0
+
+#define ADC_SAR1_ENCAL_GND_ADDR 0x7
+#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5
+#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5
+
+#define ADC_SAR2_ENCAL_GND_ADDR 0x7
+#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7
+#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7
+
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR  0x0
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR  0x3
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR1_DREF_ADDR  0x2
+#define ADC_SAR1_DREF_ADDR_MSB  0x6
+#define ADC_SAR1_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR2_DREF_ADDR  0x5
+#define ADC_SAR2_DREF_ADDR_MSB  0x6
+#define ADC_SAR2_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0
+
+#define ADC_SARADC_DTEST_RTC_ADDR 0x7
+#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1
+#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0
+
+#define ADC_SARADC_ENT_TSENS_ADDR 0x7
+#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2
+#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2
+
+#define ADC_SARADC_ENT_RTC_ADDR 0x7
+#define ADC_SARADC_ENT_RTC_ADDR_MSB 3
+#define ADC_SARADC_ENT_RTC_ADDR_LSB 3
+
+#define ADC_SARADC1_ENCAL_REF_ADDR 0x7
+#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4
+#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4
+
+#define ADC_SARADC2_ENCAL_REF_ADDR 0x7
+#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6
+#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6
+
+#define I2C_SARADC_TSENS_DAC 0x6
+#define I2C_SARADC_TSENS_DAC_MSB 3
+#define I2C_SARADC_TSENS_DAC_LSB 0

components/soc/esp32c3/include/soc/regi2c_brownout.h

@@ -0,0 +1,22 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_brownout.h
+ * @brief Register definitions for brownout detector
+ *
+ * This file lists register fields of the brownout detector, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h.
+ */
+
+#define I2C_BOD            0x61
+#define I2C_BOD_HOSTID     0
+
+#define I2C_BOD_THRESHOLD           0x5
+#define I2C_BOD_THRESHOLD_MSB       2
+#define I2C_BOD_THRESHOLD_LSB       0

components/soc/esp32c3/include/soc/regi2c_saradc.h

@@ -0,0 +1,79 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_saradc.h
+ * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC.
+ *
+ * This file lists register fields of SAR, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
+ * function in adc_ll.h.
+ */
+
+#define I2C_SAR_ADC            0X69
+#define I2C_SAR_ADC_HOSTID     0
+
+#define ADC_SAR1_ENCAL_GND_ADDR 0x7
+#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5
+#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5
+
+#define ADC_SAR2_ENCAL_GND_ADDR 0x7
+#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7
+#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7
+
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR  0x0
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR  0x3
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR1_DREF_ADDR  0x2
+#define ADC_SAR1_DREF_ADDR_MSB  0x6
+#define ADC_SAR1_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR2_DREF_ADDR  0x5
+#define ADC_SAR2_DREF_ADDR_MSB  0x6
+#define ADC_SAR2_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0
+
+#define ADC_SARADC_DTEST_RTC_ADDR 0x7
+#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1
+#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0
+
+#define ADC_SARADC_ENT_TSENS_ADDR 0x7
+#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2
+#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2
+
+#define ADC_SARADC_ENT_RTC_ADDR 0x7
+#define ADC_SARADC_ENT_RTC_ADDR_MSB 3
+#define ADC_SARADC_ENT_RTC_ADDR_LSB 3
+
+#define ADC_SARADC1_ENCAL_REF_ADDR 0x7
+#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4
+#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4
+
+#define ADC_SARADC2_ENCAL_REF_ADDR 0x7
+#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6
+#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6
+
+#define I2C_SARADC_TSENS_DAC 0x6
+#define I2C_SARADC_TSENS_DAC_MSB 3
+#define I2C_SARADC_TSENS_DAC_LSB 0

components/soc/esp32h2/include/soc/regi2c_brownout.h

@@ -0,0 +1,22 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_brownout.h
+ * @brief Register definitions for brownout detector
+ *
+ * This file lists register fields of the brownout detector, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h.
+ */
+
+#define I2C_BOD            0x61
+#define I2C_BOD_HOSTID     0
+
+#define I2C_BOD_THRESHOLD           0x5
+#define I2C_BOD_THRESHOLD_MSB       2
+#define I2C_BOD_THRESHOLD_LSB       0

components/soc/esp32h2/include/soc/regi2c_saradc.h

@@ -0,0 +1,79 @@
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/**
+ * @file regi2c_saradc.h
+ * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC.
+ *
+ * This file lists register fields of SAR, located on an internal configuration
+ * bus. These definitions are used via macros defined in regi2c_ctrl.h, by
+ * function in adc_ll.h.
+ */
+
+#define I2C_SAR_ADC            0X69
+#define I2C_SAR_ADC_HOSTID     0
+
+#define ADC_SAR1_ENCAL_GND_ADDR 0x7
+#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5
+#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5
+
+#define ADC_SAR2_ENCAL_GND_ADDR 0x7
+#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7
+#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7
+
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR  0x0
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3
+#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0
+
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR  0x3
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB  0x7
+#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB  0x0
+
+#define ADC_SAR1_DREF_ADDR  0x2
+#define ADC_SAR1_DREF_ADDR_MSB  0x6
+#define ADC_SAR1_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR2_DREF_ADDR  0x5
+#define ADC_SAR2_DREF_ADDR_MSB  0x6
+#define ADC_SAR2_DREF_ADDR_LSB  0x4
+
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2
+#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0
+
+#define ADC_SARADC_DTEST_RTC_ADDR 0x7
+#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1
+#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0
+
+#define ADC_SARADC_ENT_TSENS_ADDR 0x7
+#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2
+#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2
+
+#define ADC_SARADC_ENT_RTC_ADDR 0x7
+#define ADC_SARADC_ENT_RTC_ADDR_MSB 3
+#define ADC_SARADC_ENT_RTC_ADDR_LSB 3
+
+#define ADC_SARADC1_ENCAL_REF_ADDR 0x7
+#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4
+#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4
+
+#define ADC_SARADC2_ENCAL_REF_ADDR 0x7
+#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6
+#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6
+
+#define I2C_SARADC_TSENS_DAC 0x6
+#define I2C_SARADC_TSENS_DAC_MSB 3
+#define I2C_SARADC_TSENS_DAC_LSB 0