Merge branch 'feature/add_c3_target_master' into 'master'

tools: merge C3 changes into master

Closes IDF-2364 and IDF-2564

See merge request espressif/esp-idf!11800

components/ulp/cmake/toolchain-esp32s2-ulp-riscv.cmake

@@ -1,18 +1,15 @@
 # CMake toolchain file for ULP-RISC-V
 set(CMAKE_SYSTEM_NAME Generic)
 
-# Not best solution, needs to figure why the compiler detection
-# fails in CI
-set(CMAKE_C_COMPILER_FORCED TRUE)
-set(CMAKE_CXX_COMPILER_FORCED TRUE)
-
-set(CMAKE_C_COMPILER "riscv-none-embed-gcc")
-set(CMAKE_ASM_COMPILER "riscv-none-embed-gcc")
-
-if(NOT ASM_DIALECT)
-    set(ASM_DIALECT "")
-endif()
-
-set(CMAKE_C_FLAGS "-Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections")
-set(CMAKE_ASM_FLAGS "-march=rv32imc -mdiv -x assembler-with-cpp -fdata-sections -ffunction-sections")
-set(CMAKE_EXE_LINKER_FLAGS "-march=rv32imc --specs=nano.specs --specs=nosys.specs")
+set(CMAKE_C_COMPILER "riscv32-esp-elf-gcc")
+set(CMAKE_CXX_COMPILER "riscv32-esp-elf-g++")
+set(CMAKE_ASM_COMPILER "riscv32-esp-elf-gcc")
+
+set(CMAKE_C_FLAGS "-Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections"
+    CACHE STRING "C Compiler Base Flags")
+set(CMAKE_CXX_FLAGS "-Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections"
+    CACHE STRING "C++ Compiler Base Flags")
+set(CMAKE_ASM_FLAGS "-march=rv32imc -x assembler-with-cpp"
+    CACHE STRING "Assembler Base Flags")
+set(CMAKE_EXE_LINKER_FLAGS "-march=rv32imc --specs=nano.specs --specs=nosys.specs"
+    CACHE STRING "Linker Base Flags")

docs/en/api-guides/tools/idf-tools-notes.inc

@@ -17,17 +17,17 @@
 
 ---
 
-.. tool-esp32ulp-elf-notes
+.. tool-riscv32-esp-elf-notes
 
 
 ---
 
-.. tool-esp32s2ulp-elf-notes
+.. tool-esp32ulp-elf-notes
 
 
 ---
 
-.. tool-riscv-none-embed-gcc-notes
+.. tool-esp32s2ulp-elf-notes
 
 
 ---

docs/en/api-guides/ulp-risc-v.rst

@@ -11,11 +11,11 @@ The ULP-RISC-V coprocessor is a variant of the ULP, present in ESP32-S2. Similar
 Installing the ULP-RISC-V Toolchain
 -----------------------------------
 
-The ULP-RISC-V coprocessor code is written in C (assembly is also possible) and compiled using the `riscv-embedded toolchain`_.
+The ULP-RISC-V coprocessor code is written in C (assembly is also possible) and compiled using RISC-V toolchain based on GCC.
 
-If you have already set up ESP-IDF with CMake build system according to the :doc:`Getting Started Guide <../../get-started/index>`, then you need to perform an extra step to get the ULP-RISC-V toolchain installed, execute the command below inside the IDF folder::
+If you have already set up ESP-IDF with CMake build system according to the :doc:`Getting Started Guide <../../get-started/index>`, then the toolchain should already be installed.
 
-$ idf_tools.py install riscv-none-embed-gcc
+.. note: In earlier versions of ESP-IDF, RISC-V toolchain had a different prefix: `riscv-none-embed-gcc`.
 
 
 Compiling the ULP-RISC-V Code
@@ -56,7 +56,7 @@ To compile the ULP-RISC-V code as part of the component, the following steps mus
 
    5. **Dump the contents of the ELF file into a binary** (``ulp_app_name.bin``) which can then be embedded into the application.
 
-   6. **Generate a list of global symbols** (``ulp_app_name.sym``) in the ELF file using ``riscv-none-embed-nm``.
+   6. **Generate a list of global symbols** (``ulp_app_name.sym``) in the ELF file using ``riscv32-esp-elf-nm``.
 
    7. **Create an LD export script and header file** (``ulp_app_name.ld`` and ``ulp_app_name.h``) containing the symbols from ``ulp_app_name.sym``. This is done using the ``esp32ulp_mapgen.py`` utility.
 
@@ -147,5 +147,3 @@ The program runs until the field ``RTC_CNTL_COCPU_DONE`` in register ``RTC_CNTL_
 
 To disable the timer (effectively preventing the ULP program from running again), please clear the ``RTC_CNTL_ULP_CP_SLP_TIMER_EN`` bit in the ``RTC_CNTL_STATE0_REG`` register. This can be done both from the ULP code and from the main program.
 
-
-.. _riscv-embedded toolchain: https://xpack.github.io/riscv-none-embed-gcc/

docs/zh_CN/api-guides/tools/idf-tools-notes.inc

@@ -19,17 +19,17 @@
 
 ---
 
-.. tool-esp32ulp-elf-notes
+.. tool-riscv32-esp-elf-notes
 
 
 ---
 
-.. tool-esp32s2ulp-elf-notes
+.. tool-esp32ulp-elf-notes
 
 
 ---
 
-.. tool-riscv-none-embed-gcc-notes
+.. tool-esp32s2ulp-elf-notes
 
 
 ---

docs/zh_CN/api-guides/ulp-risc-v.rst

@@ -11,12 +11,11 @@ ULP-RISC-V 协处理器是 ULP 的一种变体，用于 ESP32-S2。与 ULP 类
 安装 ULP-RISC-V 工具链
 -----------------------------------
 
-ULP-RISC-V 协处理器代码以 C 语言编写（也可能是汇编语言），使用 `riscv-embedded toolchain`_ 进行编译。
+ULP-RISC-V 协处理器代码以 C 语言编写（也可能是汇编语言），使用基于GCC的 RISC-V 工具链进行编译。
 
-如果你已依照 :doc:`快速入门指南 <../../get-started/index>` 中的介绍安装好了 ESP-IDF 及其 CMake 构建系统，还需要在 IDF 文件夹中执行以下指令，安装 ULP-RISC-V 工具链::
-
-$ idf_tools.py install riscv-none-embed-gcc
+如果你已依照 :doc:`快速入门指南 <../../get-started/index>` 中的介绍安装好了 ESP-IDF 及其 CMake 构建系统，那么 ULP-RISC-V 工具链已经被默认安装到了你的开发环境中。
 
+.. note: 在早期版本的ESP-IDF中，RISC-V工具链具有不同的名称：`riscv-none-embed-gcc`。
 
 编译 ULP-RISC-V 代码
 -----------------------------
@@ -25,7 +24,7 @@ $ idf_tools.py install riscv-none-embed-gcc
 
 1. ULP-RISC-V 代码以 C 语言或汇编语言编写（必须使用 `.S` 扩展名)，必须放在组件目录中一个独立的目录中，例如 `ulp/`。
 
-.. 注意：当注册组件时（通过 ``idf_component_register``），该目录不应被添加至 ``SRC_DIRS`` 参数，因为目前 ULP-FSM 需要进行此步骤。如何正确添加 ULP 源文件，请见以下步骤。
+.. note: 当注册组件时（通过 ``idf_component_register``），该目录不应被添加至 ``SRC_DIRS`` 参数，因为目前 ULP-FSM 需要进行此步骤。如何正确添加 ULP 源文件，请见以下步骤。
 
 2. 注册后从组件 CMakeLists.txt 中调用 ``ulp_embed_binary`` 示例如下::
 
@@ -147,5 +146,3 @@ ULP-RISC-V 协处理器由定时器启动，调用 :cpp:func:`ulp_riscv_run` 即
 
 如需禁用定时器（有效防止 ULP 程序再次运行），请清除 ``RTC_CNTL_STATE0_REG`` 寄存器中的 ``RTC_CNTL_ULP_CP_SLP_TIMER_EN`` 位，此项操作可在 ULP 代码或主程序中进行。
 
-
-.. _riscv-embedded toolchain: https://xpack.github.io/riscv-none-embed-gcc/

tools/ci/check_public_headers_exceptions.txt

@@ -112,6 +112,7 @@ components/soc/src/esp32/rtc_clk_common.h
 components/esp_hw_support/port/esp32/regi2c_ctrl.h
 components/esp_rom/include/esp32/rom/sha.h
 components/esp_rom/include/esp32/rom/secure_boot.h
+components/esp_rom/include/esp32c3/rom/spi_flash.h
 components/esp_rom/include/esp32s2/rom/spi_flash.h
 components/esp_rom/include/esp32s2/rom/cache.h
 components/esp_rom/include/esp32s2/rom/secure_boot.h

tools/ci/config/build.yml

@@ -115,9 +115,6 @@ build_ssc_esp32s2:
     TEST_TYPE: "unit_test"
     PYTHON_VER: 3
   script:
-    # RISC-V toolchain is optional but ULP may need it, so install:
-    - $IDF_PATH/tools/idf_tools.py install riscv-none-embed-gcc
-    - . $IDF_PATH/export.sh
     - ${IDF_PATH}/tools/ci/find_apps_build_apps.sh
     - cd $CI_PROJECT_DIR/tools/unit-test-app
     - python tools/UnitTestParser.py ${BUILD_PATH}
@@ -155,9 +152,6 @@ build_esp_idf_tests_cmake_esp32s3:
     BUILD_PATH: ${CI_PROJECT_DIR}/build_${TEST_PREFIX}
     PYTHON_VER: 3
   script:
-    # RISC-V toolchain is optional but ULP may need it, so install:
-    - $IDF_PATH/tools/idf_tools.py install riscv-none-embed-gcc
-    - . $IDF_PATH/export.sh
     # it's not possible to build 100% out-of-tree and have the "artifacts"
     # mechanism work, but this is the next best thing
     - ${IDF_PATH}/tools/ci/find_apps_build_apps.sh

tools/ci/python_packages/ttfw_idf/CIScanTests.py

@@ -16,7 +16,8 @@ TEST_LABELS = {
     'test_apps': 'BOT_LABEL_CUSTOM_TEST',
     'component_ut': ['BOT_LABEL_UNIT_TEST',
                      'BOT_LABEL_UNIT_TEST_32',
-                     'BOT_LABEL_UNIT_TEST_S2'],
+                     'BOT_LABEL_UNIT_TEST_S2',
+                     'BOT_LABEL_UNIT_TEST_C3'],
 }
 
 BUILD_ALL_LABELS = [

tools/ci/python_packages/ttfw_idf/IDFAssignTest.py

@@ -80,17 +80,20 @@ class ExampleGroup(IDFCaseGroup):
     SORT_KEYS = CI_JOB_MATCH_KEYS = ['env_tag', 'target']
 
     LOCAL_BUILD_DIR = 'build_examples'
-    BUILD_JOB_NAMES = ['build_examples_cmake_{}'.format(target) for target in SUPPORTED_TARGETS]
+    EXAMPLE_TARGETS = SUPPORTED_TARGETS + PREVIEW_TARGETS
+    BUILD_JOB_NAMES = ['build_examples_cmake_{}'.format(target) for target in EXAMPLE_TARGETS]
 
 
 class TestAppsGroup(ExampleGroup):
     LOCAL_BUILD_DIR = 'build_test_apps'
-    BUILD_JOB_NAMES = ['build_test_apps_{}'.format(target) for target in SUPPORTED_TARGETS]
+    TEST_APP_TARGETS = SUPPORTED_TARGETS + PREVIEW_TARGETS
+    BUILD_JOB_NAMES = ['build_test_apps_{}'.format(target) for target in TEST_APP_TARGETS]
 
 
 class ComponentUTGroup(TestAppsGroup):
     LOCAL_BUILD_DIR = 'build_component_ut'
-    BUILD_JOB_NAMES = ['build_component_ut_{}'.format(target) for target in SUPPORTED_TARGETS]
+    UNIT_TEST_TARGETS = SUPPORTED_TARGETS + PREVIEW_TARGETS
+    BUILD_JOB_NAMES = ['build_component_ut_{}'.format(target) for target in UNIT_TEST_TARGETS]
 
 
 class UnitTestGroup(IDFCaseGroup):
@@ -98,7 +101,8 @@ class UnitTestGroup(IDFCaseGroup):
     CI_JOB_MATCH_KEYS = ['test environment']
 
     LOCAL_BUILD_DIR = 'tools/unit-test-app/builds'
-    BUILD_JOB_NAMES = ['build_esp_idf_tests_cmake_{}'.format(target) for target in SUPPORTED_TARGETS]
+    UNIT_TEST_TARGETS = SUPPORTED_TARGETS + PREVIEW_TARGETS
+    BUILD_JOB_NAMES = ['build_esp_idf_tests_cmake_{}'.format(target) for target in UNIT_TEST_TARGETS]
 
     MAX_CASE = 50
     ATTR_CONVERT_TABLE = {
@@ -107,6 +111,7 @@ class UnitTestGroup(IDFCaseGroup):
     DUT_CLS_NAME = {
         'esp32': 'ESP32DUT',
         'esp32s2': 'ESP32S2DUT',
+        'esp32c3': 'ESP32C3DUT',
         'esp8266': 'ESP8266DUT',
     }
 

tools/ci/python_packages/ttfw_idf/IDFDUT.py

@@ -463,6 +463,9 @@ class ESP32DUT(IDFDUT):
     def _get_rom(cls):
         return esptool.ESP32ROM
 
+    def erase_partition(self, esp, partition):
+        raise NotImplementedError()
+
 
 class ESP32S2DUT(IDFDUT):
     TARGET = "esp32s2"
@@ -472,6 +475,21 @@ class ESP32S2DUT(IDFDUT):
     def _get_rom(cls):
         return esptool.ESP32S2ROM
 
+    def erase_partition(self, esp, partition):
+        raise NotImplementedError()
+
+
+class ESP32C3DUT(IDFDUT):
+    TARGET = "esp32c3"
+    TOOLCHAIN_PREFIX = "riscv32-esp-elf-"
+
+    @classmethod
+    def _get_rom(cls):
+        return esptool.ESP32C3ROM
+
+    def erase_partition(self, esp, partition):
+        raise NotImplementedError()
+
 
 class ESP8266DUT(IDFDUT):
     TARGET = "esp8266"
@@ -481,9 +499,12 @@ class ESP8266DUT(IDFDUT):
     def _get_rom(cls):
         return esptool.ESP8266ROM
 
+    def erase_partition(self, esp, partition):
+        raise NotImplementedError()
+
 
 def get_target_by_rom_class(cls):
-    for c in [ESP32DUT, ESP32S2DUT, ESP8266DUT, IDFQEMUDUT]:
+    for c in [ESP32DUT, ESP32S2DUT, ESP32C3DUT, ESP8266DUT, IDFQEMUDUT]:
         if c._get_rom() == cls:
             return c.TARGET
     return None

tools/ci/python_packages/ttfw_idf/__init__.py

@@ -23,13 +23,14 @@ import junit_xml
 from tiny_test_fw import TinyFW, Utility
 from .DebugUtils import OCDBackend, GDBBackend, CustomProcess  # noqa: export DebugUtils for users
 from .IDFApp import IDFApp, Example, LoadableElfTestApp, UT, TestApp, ComponentUTApp  # noqa: export all Apps for users
-from .IDFDUT import IDFDUT, ESP32DUT, ESP32S2DUT, ESP8266DUT, ESP32QEMUDUT  # noqa: export DUTs for users
+from .IDFDUT import IDFDUT, ESP32DUT, ESP32S2DUT, ESP32C3DUT, ESP8266DUT, ESP32QEMUDUT  # noqa: export DUTs for users
 from .unity_test_parser import TestResults, TestFormat
 
 # pass TARGET_DUT_CLS_DICT to Env.py to avoid circular dependency issue.
 TARGET_DUT_CLS_DICT = {
     'ESP32': ESP32DUT,
     'ESP32S2': ESP32S2DUT,
+    'ESP32C3': ESP32C3DUT,
 }
 
 

tools/cmake/dfu.cmake

@@ -9,6 +9,8 @@ function(__add_dfu_targets)
         set(dfu_pid "2")
     elseif("${target}" STREQUAL "esp32s3")
         set(dfu_pid "4")
+    elseif("${target}" STREQUAL "esp32c3")
+        return()
     elseif("${target}" STREQUAL "linux")
         return()
     else()

tools/find_build_apps/common.py

@@ -295,6 +295,7 @@ class BuildSystem:
         'ESP32': 'esp32',
         'ESP32-S2': 'esp32s2',
         'ESP32-S3': 'esp32s3',
+        'ESP32-C3': 'esp32c3',
         'Linux': 'linux',
     }
 

tools/idf_monitor.py

@@ -391,6 +391,7 @@ class SerialReader(StoppableThread):
             self.serial.baudrate = self.baud
             self.serial.rts = True  # Force an RTS reset on open
             self.serial.open()
+            time.sleep(0.005)  # Add a delay to meet the requirements of minimal EN low time (2ms for ESP32-C3)
             self.serial.rts = False
             self.serial.dtr = self.serial.dtr   # usbser.sys workaround
         try:

tools/idf_py_actions/constants.py

@@ -38,4 +38,4 @@ GENERATORS = collections.OrderedDict([
 
 SUPPORTED_TARGETS = ["esp32", "esp32s2"]
 
-PREVIEW_TARGETS = ["esp32s3", "linux"]
+PREVIEW_TARGETS = ["esp32s3", "esp32c3", "linux"]

tools/ldgen/generation.py

@@ -597,7 +597,8 @@ class SectionsInfo(dict):
 
     def _get_infos_from_file(self, info):
         # Object file line: '{object}:  file format elf32-xtensa-le'
-        object = Fragment.ENTITY.setResultsName("object") + Literal(":").suppress() + Literal("file format elf32-xtensa-le").suppress()
+        obj = Fragment.ENTITY.setResultsName("object") + Literal(":").suppress() + \
+            (Literal("file format elf32-") + (Literal("xtensa-le") | Literal("littleriscv"))).suppress()
 
         # Sections table
         header = Suppress(Literal("Sections:") + Literal("Idx") + Literal("Name") + Literal("Size") + Literal("VMA") +
@@ -607,7 +608,7 @@ class SectionsInfo(dict):
                                                                    Optional(Literal(","))))
 
         # Content is object file line + sections table
-        content = Group(object + header + Group(ZeroOrMore(entry)).setResultsName("sections"))
+        content = Group(obj + header + Group(ZeroOrMore(entry)).setResultsName("sections"))
 
         parser = Group(ZeroOrMore(content)).setResultsName("contents")
 

tools/test_idf_monitor/Makefile

@@ -0,0 +1,30 @@
+# The purpose of this Makefile is to build dummy ELF files required to run idf_monitor tests.
+
+# Make sure the toolchains are in the PATH:
+PREFIX_XTENSA ?= xtensa-esp32-elf-
+PREFIX_RISCV ?= riscv32-esp-elf-
+
+PROG_XTENSA := dummy_xtensa.elf
+PROG_RISCV := dummy_riscv.elf
+
+# This actually depends on the value of portUSING_MPU_WRAPPERS.
+# I.e. ESP32-S2 would also have TASK_NAME_OFFSET=52 since portUSING_MPU_WRAPPERS is 0.
+CPPFLAGS_XTENSA := -DTASK_NAME_OFFSET=56
+CPPFLAGS_RISCV := -DTASK_NAME_OFFSET=52
+
+all: $(PROG_XTENSA) $(PROG_RISCV)
+
+$(PROG_XTENSA): dummy.c
+	$(PREFIX_XTENSA)gcc $(CPPFLAGS_XTENSA) --specs=nosys.specs -o $@ -g $^
+	chmod -x $@
+
+# ^ chmod is there so that we don't have to add ELF files to executables list
+
+$(PROG_RISCV): dummy.c
+	$(PREFIX_RISCV)gcc $(CPPFLAGS_RISCV) --specs=nosys.specs -o $@ -g $^
+	chmod -x $@
+
+clean:
+	rm -f $(PROG_XTENSA) $(PROG_RISCV)
+
+.PHONY: clean all

tools/test_idf_monitor/README.md

@@ -5,9 +5,4 @@ Use `run_test_idf_monitor.py` in order to run the test.
 New tests can be added into `test_list` of `run_test_idf_monitor.py` and placing the corresponding files into the
 `tests` directory.
 
-Note: The `idf_monitor` is tested by a dummy ELF file which was generated by running the following commands::
-
-    dd if=/dev/zero of=tmp.bin bs=1 count=4
-    xtensa-esp32-elf-objcopy -I binary -O elf32-xtensa-le -B xtensa tmp.bin tmp.o
-    xtensa-esp32-elf-ld --defsym _start=0x40000000 tmp.o -o dummy.elf
-    chmod -x dummy.elf
+Note: The `idf_monitor` is tested with dummy ELF files. Run `make` to build the ELF files for supported architectures.

tools/test_idf_monitor/dummy.c

@@ -0,0 +1,13 @@
+/* Produces a minimal ELF file for espcoredump tests */
+
+typedef struct {
+    char stuff[TASK_NAME_OFFSET];
+    char pcTaskName[16];
+} TCB_t;
+
+TCB_t foo;
+
+int main(void)
+{
+    return 0;
+}

tools/test_idf_monitor/idf_monitor_wrapper.py

@@ -27,9 +27,6 @@ except ImportError:
     import idf_monitor
 
 
-ELF_FILE = 'dummy.elf'  # ELF file used for starting the monitor
-
-
 def monitor_serial_reader_state(serial_reader, file_to_create):
     """
     The purpose of this wrapper is to monitor the serial reader state of idf_monitor.py. file_to_create is created
@@ -47,10 +44,16 @@ def main():
     parser.add_argument('--port')
     parser.add_argument('--print_filter')
     parser.add_argument('--serial_alive_file')
+    parser.add_argument('--toolchain-prefix')
+    parser.add_argument('--decode-panic', default="disable")
+    parser.add_argument('--target', default=None)
+    parser.add_argument('--elf-file')
     args = parser.parse_args()
 
     serial_instance = serial.serial_for_url(args.port, 115200, do_not_open=True)
-    monitor = idf_monitor.Monitor(serial_instance, ELF_FILE, args.print_filter, 'make', toolchain_prefix='xtensa-esp32-elf-', eol='CR')
+    monitor = idf_monitor.Monitor(serial_instance, args.elf_file, args.print_filter, 'make',
+                                  toolchain_prefix=args.toolchain_prefix, eol='CR',
+                                  decode_panic=args.decode_panic, target=args.target)
     sys.stderr.write('Monitor instance has been created.\n')
     monitor_thread = threading.Thread(target=monitor_serial_reader_state,
                                       args=(monitor.serial_reader, args.serial_alive_file))

tools/test_idf_monitor/run_test_idf_monitor.py

@@ -29,16 +29,20 @@ import threading
 import errno
 import tempfile
 
+XTENSA_ARGS = '--toolchain-prefix xtensa-esp32-elf-'
+RISCV_ARGS = '--decode-panic backtrace --target esp32c3 --toolchain-prefix riscv32-esp-elf-'
+
 test_list = (
-    # Add new tests here. All files should be placed in IN_DIR. Columns are:
-    # Input file            Filter string                                               File with expected output   Timeout
-    ('in1.txt',             '',                                                         'in1f1.txt',                60),
-    ('in1.txt',             '*:V',                                                      'in1f1.txt',                60),
-    ('in1.txt',             'hello_world',                                              'in1f2.txt',                60),
-    ('in1.txt',             '*:N',                                                      'in1f3.txt',                60),
-    ('in2.txt',             'boot mdf_device_handle:I mesh:E vfs:I',                    'in2f1.txt',               420),
-    ('in2.txt',             'vfs',                                                      'in2f2.txt',               420),
-    ('core1.txt',           '',                                                         'core1_out.txt',            60),
+    # Add new tests here. All files should be placed in IN_DIR. Columns are
+    # Input file            Filter string                                File with expected output   Timeout    ELF file        Extra args
+    ('in1.txt',             '',                                          'in1f1.txt',                60,    'dummy_xtensa.elf',       XTENSA_ARGS),
+    ('in1.txt',             '*:V',                                       'in1f1.txt',                60,    'dummy_xtensa.elf',       XTENSA_ARGS),
+    ('in1.txt',             'hello_world',                               'in1f2.txt',                60,    'dummy_xtensa.elf',       XTENSA_ARGS),
+    ('in1.txt',             '*:N',                                       'in1f3.txt',                60,    'dummy_xtensa.elf',       XTENSA_ARGS),
+    ('in2.txt',             'boot mdf_device_handle:I mesh:E vfs:I',     'in2f1.txt',               420,    'dummy_xtensa.elf',       XTENSA_ARGS),
+    ('in2.txt',             'vfs',                                       'in2f2.txt',               420,    'dummy_xtensa.elf',       XTENSA_ARGS),
+    ('core1.txt',           '',                                          'core1_out.txt',            60,    'dummy_xtensa.elf',       XTENSA_ARGS),
+    ('riscv_panic1.txt',    '',                                          'riscv_panic1_out.txt',     60,    'dummy_riscv.elf',        RISCV_ARGS),
 )
 
 IN_DIR = 'tests/'       # tests are in this directory
@@ -78,9 +82,12 @@ class TestRunner(object):
         return self
 
     def __exit__(self, type, value, traceback):
-        self.serversocket.shutdown(socket.SHUT_RDWR)
-        self.serversocket.close()
-        print('Socket was closed successfully')
+        try:
+            self.serversocket.shutdown(socket.SHUT_RDWR)
+            self.serversocket.close()
+            print('Socket was closed successfully')
+        except (OSError, socket.error):
+            pass
 
     def accept_connection(self):
         """ returns a socket for sending the input for idf_monitor which must be closed before calling this again. """
@@ -102,7 +109,9 @@ def test_iteration(runner, test):
             monitor_cmd = [sys.executable, IDF_MONITOR_WAPPER,
                            '--port', 'socket://{}:{}?logging=debug'.format(HOST, runner.port),
                            '--print_filter', test[1],
-                           '--serial_alive_file', SERIAL_ALIVE_FILE]
+                           '--serial_alive_file', SERIAL_ALIVE_FILE,
+                           '--elf-file', test[4]]
+            monitor_cmd += test[5].split()
             (master_fd, slave_fd) = pty.openpty()
             print('\t', ' '.join(monitor_cmd), sep='')
             print('\tstdout="{}" stderr="{}" stdin="{}"'.format(o_f.name, e_f.name, os.ttyname(slave_fd)))

tools/test_idf_monitor/tests/core1_out.txt

@@ -40,7 +40,7 @@ espcoredump.py v0.4-dev
 ===============================================================
 ==================== ESP32 CORE DUMP START ====================
 
-Crashed task handle: 0x3ffb5e80, name: '', GDB name: 'process 1073438336'
+Crashed task handle: 0x3ffb5e80, name: 'main', GDB name: 'process 1073438336'
 
 ================== CURRENT THREAD REGISTERS ===================
 exccause       0x1d (StoreProhibitedCause)
@@ -112,41 +112,41 @@ a15            0x0	0
   7    process 1073432444 0x40087e10 in ?? ()
   8    process 1073413520 0x400812c4 in ?? ()
 
-==================== THREAD 1 (TCB: 0x3ffb5e80, name: '') =====================
+==================== THREAD 1 (TCB: 0x3ffb5e80, name: 'main') =====================
 #0  0x400e37f7 in ?? ()
 #1  0x400d0c31 in ?? ()
 #2  0x40087018 in ?? ()
 
-==================== THREAD 2 (TCB: 0x3ffb6d48, name: '') =====================
+==================== THREAD 2 (TCB: 0x3ffb6d48, name: 'IDLE1') =====================
 #0  0x40087010 in ?? ()
 
-==================== THREAD 3 (TCB: 0x3ffb65e4, name: '') =====================
+==================== THREAD 3 (TCB: 0x3ffb65e4, name: 'IDLE0') =====================
 #0  0x40087010 in ?? ()
 
-==================== THREAD 4 (TCB: 0x3ffb77a0, name: '') =====================
+==================== THREAD 4 (TCB: 0x3ffb77a0, name: 'Tmr Svc') =====================
 #0  0x400812c4 in ?? ()
 #1  0x40089806 in ?? ()
 #2  0x400898f3 in ?? ()
 #3  0x40087018 in ?? ()
 
-==================== THREAD 5 (TCB: 0x3ffb4bf0, name: '') =====================
+==================== THREAD 5 (TCB: 0x3ffb4bf0, name: 'dport') =====================
 #0  0x400812c4 in ?? ()
 #1  0x4008913b in ?? ()
 #2  0x400d0d5c in ?? ()
 #3  0x40087018 in ?? ()
 
-==================== THREAD 6 (TCB: 0x3ffafab4, name: '') =====================
+==================== THREAD 6 (TCB: 0x3ffafab4, name: 'esp_timer') =====================
 #0  0x400812c4 in ?? ()
 #1  0x40087e10 in ?? ()
 #2  0x400d1f4b in ?? ()
 #3  0x40087018 in ?? ()
 
-==================== THREAD 7 (TCB: 0x3ffb477c, name: '') =====================
+==================== THREAD 7 (TCB: 0x3ffb477c, name: 'ipc1') =====================
 #0  0x40087e10 in ?? ()
 #1  0x40081a2b in ?? ()
 #2  0x40087018 in ?? ()
 
-==================== THREAD 8 (TCB: 0x3ffafd90, name: '') =====================
+==================== THREAD 8 (TCB: 0x3ffafd90, name: 'ipc0') =====================
 #0  0x400812c4 in ?? ()
 #1  0x40087e10 in ?? ()
 #2  0x40081a2b in ?? ()
@@ -155,7 +155,11 @@ a15            0x0	0
 
 ======================= ALL MEMORY REGIONS ========================
 Name   Address   Size   Attrs
-.data 0x400054 0x4 RW A
+.text 0x400074 0x134 R XA
+.eh_frame 0x4001a8 0x4 R  A
+.ctors 0x4011ac 0x8 RW A
+.dtors 0x4011b4 0x8 RW A
+.data 0x4011bc 0x4 RW A
 .coredump.tasks.data 0x3ffb5e80 0x15c RW 
 .coredump.tasks.data 0x3ffb5cf0 0x188 RW 
 .coredump.tasks.data 0x3ffb6d48 0x15c RW 

tools/test_idf_monitor/tests/riscv_panic1.txt

@@ -0,0 +1,151 @@
+ESP-ROM:esp32c3-20200918
+Build:Sep 18 2020
+rst:0xc (RTC_SW_CPU_RST),boot:0xc (SPI_FAST_FLASH_BOOT)
+Saved PC:0x40381f24
+SPIWP:0xee
+mode:DOUT, clock div:2
+load:0x3fcd6100,len:0x14
+load:0x3fcd6114,len:0x11d8
+load:0x403d0000,len:0xd0c
+load:0x403d2000,len:0x1b84
+entry 0x403d0062
+␛[0;33mW (37) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (184) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (196) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.␛[0m
+Enter test name: Got test name: test_abort
+
+abort() was called at PC 0x42003863 on core 0
+Core  0 register dump:
+MEPC    : 0x403825fa  RA      : 0x40382a3e  SP      : 0x3fc8cd5c  GP      : 0x3fc887e0  
+TP      : 0xa5a5a5a5  T0      : 0x37363534  T1      : 0x7271706f  T2      : 0x33323130  
+S0/FP   : 0x00000004  S1      : 0x3fc8cdc0  A0      : 0x3fc8cd88  A1      : 0x3fc8cdbe  
+A2      : 0x00000000  A3      : 0x3fc8cdb5  A4      : 0x00000001  A5      : 0x3fc8a000  
+A6      : 0x7a797877  A7      : 0x76757473  S2      : 0xa5a5a5a5  S3      : 0xa5a5a5a5  
+S4      : 0xa5a5a5a5  S5      : 0xa5a5a5a5  S6      : 0xa5a5a5a5  S7      : 0xa5a5a5a5  
+S8      : 0xa5a5a5a5  S9      : 0xa5a5a5a5  S10     : 0xa5a5a5a5  S11     : 0xa5a5a5a5  
+T3      : 0x6e6d6c6b  T4      : 0x6a696867  T5      : 0x66656463  T6      : 0x62613938  
+MSTATUS : 0x00001881  MTVEC   : 0x40380001  MCAUSE  : 0x00000007  MTVAL   : 0x00000000  
+MHARTID : 0x00000000  
+
+Stack memory:
+3fc8cd5c: 0xa5a5a5a5 0x3fc8ce34 0x3fc8cdbc 0x403870ce 0x00000001 0x00000004 0x3fc8aaf4 0x3fc893b0
+3fc8cd7c: 0x3fc8cdc0 0x3fc893cc 0x3fc8cdbc 0x726f6261 0x20292874 0x20736177 0x6c6c6163 0x61206465
+3fc8cd9c: 0x43502074 0x34783020 0x33303032 0x20333638 0x63206e6f 0x2065726f 0x00000030 0x3fc80000
+3fc8cdbc: 0xa5a50030 0x30303234 0x33363833 0x42003900 0x00000001 0xa5a5a5a5 0x3fc89cc0 0x42003866
+3fc8cddc: 0x3fc8a000 0x0000000a 0x420018fc 0x420039ea 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0x42012ea6
+3fc8cdfc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0x40384206 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8ce1c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0x00000154 0x3fc8cd4c 0x00000349
+3fc8ce3c: 0x3fc89964 0x3fc89964 0x3fc8ce34 0x3fc8995c 0x00000018 0xdf6337cf 0xbccacfdd 0x3fc8ce34
+3fc8ce5c: 0x00000000 0x00000001 0x3fc8be30 0x6e69616d 0xfa3b3d00 0x3f2a8cb8 0x002d1f13 0x00000000
+3fc8ce7c: 0x3fc8ce20 0x00000001 0x00000000 0x00000000 0x00000000 0x0000000b 0x3fc8a950 0x3fc8a9b8
+3fc8ce9c: 0x3fc8aa20 0x00000000 0x00000000 0x00000001 0x00000000 0x00000000 0x00000000 0x42005b6c
+3fc8cebc: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cedc: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cefc: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf1c: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf3c: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf5c: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf7c: 0x00000000 0x00000000 0x3fc8ce00 0x00000900 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8cf9c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8cfbc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8cfdc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8cffc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d01c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d03c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d05c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d07c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d09c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d0bc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d0dc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d0fc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d11c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d13c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+
+
+
+ELF file SHA256: 72e88c31482c8900
+
+Rebooting...
+x�jESP-ROM:esp32c3-20200918
+Build:Sep 18 2020
+rst:0xc (RTC_SW_CPU_RST),boot:0xc (SPI_FAST_FLASH_BOOT)
+Saved PC:0x40381f24
+SPIWP:0xee
+mode:DOUT, clock div:2
+load:0x3fcd6100,len:0x14
+load:0x3fcd6114,len:0x11d8
+load:0x403d0000,len:0xd0c
+load:0x403d2000,len:0x1b84
+entry 0x403d0062
+␛[0;33mW (37) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (184) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (196) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.␛[0m
+Enter test name: Got test name: test_illegal_instruction
+Guru Meditation Error: Core  0 panic'ed (Illegal instruction). Exception was unhandled.
+
+Core  0 register dump:
+MEPC    : 0x420037ce  RA      : 0x42003a18  SP      : 0x3fc8cdec  GP      : 0x3fc887e0  
+TP      : 0xa5a5a5a5  T0      : 0x7f7f7f7f  T1      : 0x7f7f7f7f  T2      : 0xffffffff  
+S0/FP   : 0x3fc89cc0  S1      : 0xa5a5a5a5  A0      : 0x00000000  A1      : 0x3c022b0c  
+A2      : 0x00000000  A3      : 0x00000000  A4      : 0x00000000  A5      : 0x7f7f7f7f  
+A6      : 0x420019ee  A7      : 0xa5a5a5a5  S2      : 0xa5a5a5a5  S3      : 0xa5a5a5a5  
+S4      : 0xa5a5a5a5  S5      : 0xa5a5a5a5  S6      : 0xa5a5a5a5  S7      : 0xa5a5a5a5  
+S8      : 0xa5a5a5a5  S9      : 0xa5a5a5a5  S10     : 0xa5a5a5a5  S11     : 0xa5a5a5a5  
+T3      : 0xa5a5a5a5  T4      : 0xa5a5a5a5  T5      : 0xa5a5a5a5  T6      : 0xa5a5a5a5  
+MSTATUS : 0x00001881  MTVEC   : 0x40380001  MCAUSE  : 0x00000002  MTVAL   : 0x00000000  
+MHARTID : 0x00000000  
+
+Stack memory:
+3fc8cdec: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0x42012ea6 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0x40384206
+3fc8ce0c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8ce2c: 0xa5a5a5a5 0x00000154 0x3fc8cd4c 0x0000051e 0x3fc89964 0x3fc89964 0x3fc8ce34 0x3fc8995c
+3fc8ce4c: 0x00000018 0xdf6337cf 0xbccacfdd 0x3fc8ce34 0x00000000 0x00000001 0x3fc8be30 0x6e69616d
+3fc8ce6c: 0xfa3b3d00 0x3f2a8cb8 0x002d1f13 0x00000000 0x3fc8ce20 0x00000001 0x00000000 0x00000000
+3fc8ce8c: 0x00000000 0x0000000b 0x3fc8a950 0x3fc8a9b8 0x3fc8aa20 0x00000000 0x00000000 0x00000001
+3fc8ceac: 0x00000000 0x00000000 0x00000000 0x42005b6c 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cecc: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8ceec: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf0c: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf2c: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf4c: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000
+3fc8cf6c: 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x3fc8ce00 0x00000900
+3fc8cf8c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8cfac: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8cfcc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8cfec: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d00c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d02c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d04c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d06c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d08c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d0ac: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d0cc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d0ec: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d10c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d12c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d14c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d16c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d18c: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d1ac: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+3fc8d1cc: 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5 0xa5a5a5a5
+
+
+
+ELF file SHA256: 72e88c31482c8900
+
+Rebooting...
+x�jESP-ROM:esp32c3-20200918
+Build:Sep 18 2020
+rst:0xc (RTC_SW_CPU_RST),boot:0xc (SPI_FAST_FLASH_BOOT)
+Saved PC:0x40381f24
+SPIWP:0xee
+mode:DOUT, clock div:2
+load:0x3fcd6100,len:0x14
+load:0x3fcd6114,len:0x11d8
+load:0x403d0000,len:0xd0c
+load:0x403d2000,len:0x1b84
+entry 0x403d0062
+␛[0;33mW (37) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (184) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (196) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.␛[0m
+Enter test name: 

tools/test_idf_monitor/tests/riscv_panic1_out.txt

@@ -0,0 +1,79 @@
+ESP-ROM:esp32c3-20200918
+Build:Sep 18 2020
+rst:0xc (RTC_SW_CPU_RST),boot:0xc (SPI_FAST_FLASH_BOOT)
+Saved PC:0x40381f24
+SPIWP:0xee
+mode:DOUT, clock div:2
+load:0x3fcd6100,len:0x14
+load:0x3fcd6114,len:0x11d8
+load:0x403d0000,len:0xd0c
+load:0x403d2000,len:0x1b84
+entry 0x403d0062
+␛[0;33mW (37) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (184) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (196) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.␛[0m
+Enter test name: Got test name: test_abort
+abort() was called at PC 0x42003863 on core 0
+Core  0 register dump:
+MEPC    : 0x403825fa  RA      : 0x40382a3e  SP      : 0x3fc8cd5c  GP      : 0x3fc887e0  
+TP      : 0xa5a5a5a5  T0      : 0x37363534  T1      : 0x7271706f  T2      : 0x33323130  
+S0/FP   : 0x00000004  S1      : 0x3fc8cdc0  A0      : 0x3fc8cd88  A1      : 0x3fc8cdbe  
+A2      : 0x00000000  A3      : 0x3fc8cdb5  A4      : 0x00000001  A5      : 0x3fc8a000  
+A6      : 0x7a797877  A7      : 0x76757473  S2      : 0xa5a5a5a5  S3      : 0xa5a5a5a5  
+S4      : 0xa5a5a5a5  S5      : 0xa5a5a5a5  S6      : 0xa5a5a5a5  S7      : 0xa5a5a5a5  
+S8      : 0xa5a5a5a5  S9      : 0xa5a5a5a5  S10     : 0xa5a5a5a5  S11     : 0xa5a5a5a5  
+T3      : 0x6e6d6c6b  T4      : 0x6a696867  T5      : 0x66656463  T6      : 0x62613938  
+MSTATUS : 0x00001881  MTVEC   : 0x40380001  MCAUSE  : 0x00000007  MTVAL   : 0x00000000  
+MHARTID : 0x00000000  
+0x403825fa in ?? ()
+#0  0x403825fa in ?? ()
+Backtrace stopped: previous frame identical to this frame (corrupt stack?)
+ELF file SHA256: 72e88c31482c8900
+Rebooting...
+x�jESP-ROM:esp32c3-20200918
+Build:Sep 18 2020
+rst:0xc (RTC_SW_CPU_RST),boot:0xc (SPI_FAST_FLASH_BOOT)
+Saved PC:0x40381f24
+SPIWP:0xee
+mode:DOUT, clock div:2
+load:0x3fcd6100,len:0x14
+load:0x3fcd6114,len:0x11d8
+load:0x403d0000,len:0xd0c
+load:0x403d2000,len:0x1b84
+entry 0x403d0062
+␛[0;33mW (37) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (184) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (196) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.␛[0m
+Enter test name: Got test name: test_illegal_instruction
+Guru Meditation Error: Core  0 panic'ed (Illegal instruction). Exception was unhandled.
+Core  0 register dump:
+MEPC    : 0x420037ce  RA      : 0x42003a18  SP      : 0x3fc8cdec  GP      : 0x3fc887e0  
+TP      : 0xa5a5a5a5  T0      : 0x7f7f7f7f  T1      : 0x7f7f7f7f  T2      : 0xffffffff  
+S0/FP   : 0x3fc89cc0  S1      : 0xa5a5a5a5  A0      : 0x00000000  A1      : 0x3c022b0c  
+A2      : 0x00000000  A3      : 0x00000000  A4      : 0x00000000  A5      : 0x7f7f7f7f  
+A6      : 0x420019ee  A7      : 0xa5a5a5a5  S2      : 0xa5a5a5a5  S3      : 0xa5a5a5a5  
+S4      : 0xa5a5a5a5  S5      : 0xa5a5a5a5  S6      : 0xa5a5a5a5  S7      : 0xa5a5a5a5  
+S8      : 0xa5a5a5a5  S9      : 0xa5a5a5a5  S10     : 0xa5a5a5a5  S11     : 0xa5a5a5a5  
+T3      : 0xa5a5a5a5  T4      : 0xa5a5a5a5  T5      : 0xa5a5a5a5  T6      : 0xa5a5a5a5  
+MSTATUS : 0x00001881  MTVEC   : 0x40380001  MCAUSE  : 0x00000002  MTVAL   : 0x00000000  
+MHARTID : 0x00000000  
+0x420037ce in ?? ()
+#0  0x420037ce in ?? ()
+Backtrace stopped: previous frame identical to this frame (corrupt stack?)
+ELF file SHA256: 72e88c31482c8900
+Rebooting...
+x�jESP-ROM:esp32c3-20200918
+Build:Sep 18 2020
+rst:0xc (RTC_SW_CPU_RST),boot:0xc (SPI_FAST_FLASH_BOOT)
+Saved PC:0x40381f24
+SPIWP:0xee
+mode:DOUT, clock div:2
+load:0x3fcd6100,len:0x14
+load:0x3fcd6114,len:0x11d8
+load:0x403d0000,len:0xd0c
+load:0x403d2000,len:0x1b84
+entry 0x403d0062
+␛[0;33mW (37) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (184) bootloader_random: RNG for ESP32-C3 not currently supported␛[0m
+␛[0;33mW (196) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.␛[0m
+Enter test name: 

tools/tools.json

@@ -169,54 +169,52 @@
       ]
     },
     {
-      "description": "Toolchain for RISC-V",
+      "description": "Toolchain for 32-bit RISC-V based on GCC",
       "export_paths": [
         [
-          "xPacks",
-          "riscv-none-embed-gcc",
-          "8.2.0-3.1",
+          "riscv32-esp-elf",
           "bin"
         ]
       ],
       "export_vars": {},
-      "info_url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack",
-      "install": "on_request",
-      "license": "MIT",
-      "name": "riscv-none-embed-gcc",
+      "info_url": "https://github.com/espressif/crosstool-NG",
+      "install": "always",
+      "license": "GPL-3.0-with-GCC-exception",
+      "name": "riscv32-esp-elf",
       "version_cmd": [
-        "riscv-none-embed-gcc",
+        "riscv32-esp-elf-gcc",
         "--version"
       ],
-      "version_regex": "(riscv-none-embed-gcc) \\(xPack GNU RISC-V Embedded GCC, 64-bit\\) (8.2.0)",
+      "version_regex": "\\(crosstool-NG\\s+(?:crosstool-ng-)?([0-9a-zA-Z\\.\\-_]+)\\)\\s*([0-9\\.]+)",
       "version_regex_replace": "\\1-\\2",
       "versions": [
         {
           "linux-amd64": {
-            "sha256": "3d40fab50ebad8424ff85748f25d2eaee50f86a5d5222abd7a45a2e490f1e4f5",
-            "size": 216042047,
-            "url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-linux-x64.tgz"
+            "sha256": "425454c5c4e2cde5dd2dd3a1d398befc70addf71547840fb6d0ec4b307b08894",
+            "size": 152042971,
+            "url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-amd64.tar.gz"
           },
-          "linux-i686": {
-            "sha256": "2e856ee33ef544a2405183366cdf299da2cca697e8cc57627dfaad8ab4460a99",
-            "size": 219854326,
-            "url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-linux-x32.tgz"
+          "linux-armel": {
+            "sha256": "8ae098751b5196ca8a80d832cc9930bc4d639762a6cb22be3cfe0a8d71b2f230",
+            "size": 150801079,
+            "url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-armel.tar.gz"
           },
           "macos": {
-            "sha256": "48ece50b7272a8e49e56e37f54f9962f93dce4ca44f1bb4c8113fab0230fbdf1",
-            "size": 214715632,
-            "url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-darwin-x64.tgz"
+            "sha256": "35b1aef85b7e6b4268774f627e8e835d087bcf8b9972cfb6436614aa2e40d4a9",
+            "size": 158594401,
+            "url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-macos.tar.gz"
           },
-          "name": "riscv-none-embed-gcc-8.2.0",
+          "name": "1.24.0.123_64eb9ff-8.4.0",
           "status": "recommended",
           "win32": {
-            "sha256": "78bcd52f7b404133de3b2f9568e7101c1de747f98db3a7b0d6251b75a1754867",
-            "size": 232387519,
-            "url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-win32-x32.zip"
+            "sha256": "4f576b08620f57c270ac677cc94dce2767fff72d27a539e348d448f63b480d1f",
+            "size": 190014086,
+            "url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-win32.zip"
           },
           "win64": {
-            "sha256": "98b60720607f1400081806d60d70796b30399f8b426e2c790a4abb0bffb9e5ec",
-            "size": 241927614,
-            "url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-win32-x64.zip"
+            "sha256": "51e392ed88498f3fc4ad07e9ff4b5225f6533b1c363ecd7dd67c10d8d31b6b23",
+            "size": 191565525,
+            "url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-win64.zip"
           }
         }
       ]

tools/unit-test-app/CMakeLists.txt

@@ -2,7 +2,7 @@
 # CMakeLists in this exact order for cmake to work correctly
 cmake_minimum_required(VERSION 3.5)
 
-list(APPEND EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/examples/cxx/experimental/experimental_cpp_component"
+list(APPEND EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/examples/cxx/experimental/experimental_cpp_component/"
                                  "$ENV{IDF_PATH}/examples/peripherals/rmt/ir_protocols/components")
 
 include($ENV{IDF_PATH}/tools/cmake/project.cmake)

tools/unit-test-app/configs/cxx_exceptions

@@ -1,4 +1,4 @@
-# Only need to test this for one target (e.g. ESP32)
+# Only need to test this for one target (e.g. ESP32) per architecture
 CONFIG_IDF_TARGET="esp32"
 TEST_COMPONENTS=cxx
 CONFIG_COMPILER_CXX_EXCEPTIONS=y

tools/unit-test-app/configs/cxx_exceptions_c3

@@ -0,0 +1,4 @@
+# Only need to test this for one target (e.g. ESP32) per architecture
+CONFIG_IDF_TARGET="esp32c3"
+TEST_COMPONENTS=cxx
+CONFIG_COMPILER_CXX_EXCEPTIONS=y

tools/unit-test-app/configs/cxx_rtti_c3

@@ -0,0 +1,5 @@
+# Only need to test this for one target (e.g. ESP32) per architecture
+CONFIG_IDF_TARGET="esp32c3"
+TEST_COMPONENTS=cxx
+CONFIG_COMPILER_CXX_EXCEPTIONS=y
+CONFIG_COMPILER_CXX_RTTI=y

tools/unit-test-app/configs/default_2_c3

@@ -0,0 +1,3 @@
+# This config is split between targets since different component needs to be excluded (esp32, esp32s2)
+CONFIG_IDF_TARGET="esp32c3"
+TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32c3 esp_ipc esp_pm esp_system esp_timer driver heap pthread soc spi_flash vfs experimental_cpp_component ulp perfmon

tools/unit-test-app/configs/default_c3

@@ -0,0 +1,3 @@
+# This config is split between targets since different component needs to be included
+CONFIG_IDF_TARGET="esp32c3"
+TEST_COMPONENTS=freertos esp32c3 esp_ipc esp_system esp_timer driver heap pthread soc spi_flash vfs

tools/unit-test-app/configs/freertos_compliance_c3

@@ -0,0 +1,4 @@
+# This config is split between targets since different component needs to be included (esp32, esp32s2)
+CONFIG_IDF_TARGET="esp32c3"
+TEST_COMPONENTS=driver esp32c3 esp_system esp_timer spi_flash
+CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

tools/unit-test-app/configs/freertos_options_c3

@@ -0,0 +1,23 @@
+# This is a small set of tests where we enable as many as possible of the optional features
+# in FreeRTOS that are gated behind config
+
+CONFIG_IDF_TARGET="esp32c3"
+TEST_COMPONENTS=freertos
+
+CONFIG_FREERTOS_CORETIMER_1=y
+CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=n
+CONFIG_FREERTOS_HZ=500
+CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL=y
+CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
+CONFIG_FREERTOS_INTERRUPT_BACKTRACE=n
+CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE=y
+CONFIG_FREERTOS_LEGACY_HOOKS=y
+CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
+CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP=y
+CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=10
+CONFIG_FREERTOS_USE_TRACE_FACILITY=y
+CONFIG_FREERTOS_USE_STATS_FORMATTING_FUNCTIONS=y
+CONFIG_FREERTOS_VTASKLIST_INCLUDE_COREID=y
+CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS=y
+CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
+CONFIG_FREERTOS_FPU_IN_ISR=y

tools/unit-test-app/configs/release_c3

@@ -0,0 +1,5 @@
+CONFIG_IDF_TARGET="esp32c3"
+TEST_COMPONENTS=freertos esp32c3 esp_system esp_ipc esp_timer driver heap pthread soc spi_flash vfs
+CONFIG_COMPILER_OPTIMIZATION_SIZE=y
+CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

tools/unit-test-app/configs/rom_options_c3

@@ -0,0 +1,3 @@
+CONFIG_IDF_TARGET="esp32c3"
+TEST_COMPONENTS=spi_flash
+CONFIG_SPI_FLASH_ROM_IMPL=y

tools/unit-test-app/tools/ConfigDependency.yml

@@ -2,3 +2,4 @@
 "8Mpsram": "CONFIG_SPIRAM_BANKSWITCH_ENABLE=y"
 "ESP32_IDF": "CONFIG_IDF_TARGET_ESP32=y"
 "ESP32S2_IDF": "CONFIG_IDF_TARGET_ESP32S2=y"
+"ESP32C3_IDF": "CONFIG_IDF_TARGET_ESP32C3=y"