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esp_hw_support/sleep: fix cannot pd cpu and rc fast at the same time during light sleep

Since cpu retention dma use rc fast as clk source, so rc_fast_digi
will be enabled when we config to pd cpu. And cpu retention does not
need rc fast keep on during light sleep. So, if we use rc_fast_digi
to determine whether rc fast can be powered down, then cpu and and
rc fast cannot pd at the same time.
jingli vor 3 Jahren
Ursprung
Commit
7211b0a89a
2 geänderte Dateien mit 14 neuen und 3 gelöschten Zeilen
  1. 5 0
      components/driver/ledc.c
  2. 9 3
      components/esp_hw_support/sleep_modes.c

+ 5 - 0
components/driver/ledc.c

@@ -480,6 +480,8 @@ static ledc_slow_clk_sel_t ledc_clk_cfg_to_global_clk(const ledc_clk_cfg_t clk_c
     return glb_clk;
 }
 
+extern void esp_sleep_periph_use_8m(bool use_or_not);
+
 /**
  * @brief Function setting the LEDC timer divisor with the given source clock,
  * frequency and resolution. If the clock configuration passed is
@@ -569,6 +571,9 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n
 #endif
         ESP_LOGD(LEDC_TAG, "In slow speed mode, global clk set: %d", glb_clk);
 
+        /* keep ESP_PD_DOMAIN_RTC8M on during light sleep */
+        esp_sleep_periph_use_8m(glb_clk == LEDC_SLOW_CLK_RTC8M);
+
         portENTER_CRITICAL(&ledc_spinlock);
         ledc_hal_set_slow_clk_sel(&(p_ledc_obj[speed_mode]->ledc_hal), glb_clk);
         portEXIT_CRITICAL(&ledc_spinlock);

+ 9 - 3
components/esp_hw_support/sleep_modes.c

@@ -188,6 +188,12 @@ static RTC_FAST_ATTR bool s_adc_tsen_enabled = false;
 //in this mode, 2uA is saved, but RTC memory can't use at high temperature, and RTCIO can't be used as INPUT.
 static bool s_ultra_low_enabled = false;
 
+static bool s_periph_use_8m_flag = false;
+
+void esp_sleep_periph_use_8m(bool use_or_not)
+{
+    s_periph_use_8m_flag = use_or_not;
+}
 
 static uint32_t get_power_down_flags(void);
 #if SOC_PM_SUPPORT_EXT_WAKEUP
@@ -392,10 +398,10 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
     bool rtc_using_8md256 = false;
 #endif
     //Keep the RTC8M_CLK on if the ledc low-speed channel is clocked by RTC8M_CLK in lightsleep mode
-    bool dig_8m_enabled = !deep_sleep && rtc_dig_8m_enabled();
+    bool periph_using_8m = !deep_sleep && s_periph_use_8m_flag;
 
     //Override user-configured power modes.
-    if (rtc_using_8md256 || dig_8m_enabled) {
+    if (rtc_using_8md256 || periph_using_8m) {
         pd_flags &= ~RTC_SLEEP_PD_INT_8M;
     }
 
@@ -472,7 +478,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
     if (!s_ultra_low_enabled) {
         sleep_flags |= RTC_SLEEP_NO_ULTRA_LOW;
     }
-    if (rtc_dig_8m_enabled()) {
+    if (periph_using_8m) {
         sleep_flags |= RTC_SLEEP_DIG_USE_8M;
     }