Merge branch 'bugfix/remove_uart2_c3' into 'master'

uart: remove misleading ld files and soc defs for UART2

See merge request espressif/esp-idf!13340

components/esp32c3/ld/esp32c3.peripherals.ld

@@ -1,6 +1,5 @@
 PROVIDE ( UART0 = 0x60000000 );
 PROVIDE ( UART1 = 0x60010000 );
-PROVIDE ( UART2 = 0x6002e000 );
 PROVIDE ( SPIMEM1 = 0x60002000 );
 PROVIDE ( SPIMEM0 = 0x60003000 );
 PROVIDE ( GPIO = 0x60004000 );

components/esp_rom/include/esp32c3/rom/ets_sys.h

@@ -191,7 +191,7 @@ int ets_printf(const char *fmt, ...);
   * @brief  Set the uart channel of ets_printf(uart_tx_one_char).
   *         ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
+  * @param  uart_no : 0 for UART0, 1 for UART1.
   *
   * @return None
   */

components/esp_rom/include/esp32c3/rom/uart.h

@@ -260,7 +260,7 @@ void uart_tx_flush(uint8_t uart_no);
 /**
   * @brief Wait until uart tx full empty and the last char send ok.
   *
-  * @param  uart_no : 0 for UART0, 1 for UART1, 2 for UART2
+  * @param  uart_no : 0 for UART0, 1 for UART1
   *
   * The function defined in ROM code has a bug, so we define the correct version
   * here for compatibility.

components/esp_system/port/soc/esp32c3/clk.c

@@ -244,9 +244,6 @@ __attribute__((weak)) void esp_perip_clk_init(void)
 #endif
 #if CONFIG_CONSOLE_UART_NUM != 1
                            SYSTEM_UART1_CLK_EN |
-#endif
-#if CONFIG_CONSOLE_UART_NUM != 2
-                           SYSTEM_UART2_CLK_EN |
 #endif
                            SYSTEM_SPI2_CLK_EN |
                            SYSTEM_I2C_EXT0_CLK_EN |
@@ -278,9 +275,6 @@ __attribute__((weak)) void esp_perip_clk_init(void)
 #endif
 #if CONFIG_CONSOLE_UART_NUM != 1
                         SYSTEM_UART1_CLK_EN |
-#endif
-#if CONFIG_CONSOLE_UART_NUM != 2
-                        SYSTEM_UART2_CLK_EN |
 #endif
                         SYSTEM_SPI2_CLK_EN |
                         SYSTEM_I2C_EXT0_CLK_EN |

components/soc/esp32c3/include/soc/soc.h

@@ -67,14 +67,14 @@
 #define DR_REG_APB_SARADC_BASE                  0x60040000
 #define DR_REG_AES_XTS_BASE                     0x600CC000
 
-#define REG_UHCI_BASE(i)         (DR_REG_UHCI0_BASE - (i) * 0x8000)
-#define REG_UART_BASE( i )  (DR_REG_UART_BASE + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
-#define REG_UART_AHB_BASE(i)  (0x60000000 + (i) * 0x10000 + ( (i) > 1 ? 0xe000 : 0 ) )
-#define UART_FIFO_AHB_REG(i)  (REG_UART_AHB_BASE(i) + 0x0)
-#define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000)
-#define REG_TIMG_BASE(i)              (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
-#define REG_SPI_MEM_BASE(i)     (DR_REG_SPI0_BASE - (i) * 0x1000)
-#define REG_I2C_BASE(i)    (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
+#define REG_UHCI_BASE(i)                        (DR_REG_UHCI0_BASE - (i) * 0x8000)
+#define REG_UART_BASE(i)                        (DR_REG_UART_BASE + (i) * 0x10000)
+#define REG_UART_AHB_BASE(i)                    (0x60000000 + (i) * 0x10000)
+#define UART_FIFO_AHB_REG(i)                    (REG_UART_AHB_BASE(i) + 0x0)
+#define REG_I2S_BASE(i)                         (DR_REG_I2S_BASE + (i) * 0x1E000)
+#define REG_TIMG_BASE(i)                        (DR_REG_TIMERGROUP0_BASE + (i)*0x1000)
+#define REG_SPI_MEM_BASE(i)                     (DR_REG_SPI0_BASE - (i) * 0x1000)
+#define REG_I2C_BASE(i)                         (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
 
 //Registers Operation {{
 #define ETS_UNCACHED_ADDR(addr) (addr)