CI: Move all UT in driver to test_app

.gitlab/ci/target-test.yml

@@ -1239,13 +1239,6 @@ UT_006:
     - ESP32_IDF
     - EMMC
 
-UT_022:
-  extends: .unit_test_esp32_template
-  tags:
-    - ESP32_IDF
-    - UT_T2_I2C
-    - psram
-
 UT_028:
   extends: .unit_test_esp32_template
   tags:
@@ -1318,12 +1311,6 @@ UT_C3_FLASH:
     - ESP32C3_IDF
     - UT_T1_ESP_FLASH
 
-UT_C3_I2C:
-  extends: .unit_test_esp32c3_template
-  tags:
-    - ESP32C3_IDF
-    - UT_T2_I2C
-
 UT_C3_SDSPI:
   extends:
     - .unit_test_esp32c3_template

components/driver/i2c/i2c.c

@@ -27,6 +27,7 @@
 #include "esp_rom_sys.h"
 #include <sys/param.h>
 #include "soc/clk_tree_defs.h"
+
 #if SOC_I2C_SUPPORT_APB || SOC_I2C_SUPPORT_XTAL
 #include "esp_private/esp_clk.h"
 #endif
@@ -1343,6 +1344,7 @@ esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t dat
     return ret;
 }
 
+__attribute__((always_inline))
 static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) {
     return cmd->total_bytes == 1;
 }

components/driver/test/CMakeLists.txt

@@ -1,6 +0,0 @@
-idf_component_register(
-    SRC_DIRS .
-    PRIV_INCLUDE_DIRS include
-    PRIV_REQUIRES test_utils driver nvs_flash esp_timer esp_event test_driver_utils esp_serial_slave_link
-)
-target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-format")

components/driver/test/include/test/test_adc_dac_dma.h

@@ -1,57 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-/* Common header for ESP32-S2 ADC/DAC tests */
-
-/**
- * SPI DMA type.
- */
-typedef enum {
-    DMA_ONLY_ADC_INLINK = BIT(1),   /*!<Select ADC-DMA config. */
-    DMA_ONLY_DAC_OUTLINK = BIT(2),  /*!<Select DAC-DMA config. */
-    DMA_BOTH_ADC_DAC,               /*!<Select DAC-DMA and ADC-DMA config. */
-#define DMA_BOTH_ADC_DAC (DMA_ONLY_ADC_INLINK | DMA_ONLY_DAC_OUTLINK)
-} spi_dma_link_type_t;
-
-/**
- * Register SPI-DMA interrupt handler.
- *
- * @param handler       Handler.
- * @param handler_arg   Handler parameter.
- * @param intr_mask     DMA interrupt type mask.
- */
-esp_err_t adc_dac_dma_isr_register(intr_handler_t handler, void* handler_arg, uint32_t intr_mask);
-
-/**
- * Deregister SPI-DMA interrupt handler.
- *
- * @param handler       Handler.
- * @param handler_arg   Handler parameter.
- */
-esp_err_t adc_dac_dma_isr_deregister(intr_handler_t handler, void* handler_arg);
-
-/**
- * Reset DMA linker pointer and start DMA.
- *
- * @param type     DMA linker type. See ``spi_dma_link_type_t``.
- * @param dma_addr DMA linker addr.
- * @param int_msk  DMA interrupt type mask.
- */
-void adc_dac_dma_linker_start(spi_dma_link_type_t type, void *dma_addr, uint32_t int_msk);
-
-/**
- * Stop DMA.
- *
- * @param type DMA linker type. See ``spi_dma_link_type_t``.
- */
-void adc_dac_dma_linker_stop(spi_dma_link_type_t type);
-
-/**
- * Deinit SPI3 DMA. Disable interrupt, stop DMA trans.
- */
-void adc_dac_dma_linker_deinit(void);

components/driver/test/include/test/test_common_adc.h

@@ -1,26 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include "hal/adc_types.h"
-
-/**@{*/
-/**
- * Tie the ADC channel input to the middle (1.4V) by connecting both internal pullup and pulldown.
- *
- * `tie_middle`: 1.4v;
- * `tie_high`  : 3.3v;
- * `tie_low`   : 0v;
- *
- * @param adc_unit_t ADC unit.
- * @param adc_channel_t ADC channel.
- */
-void adc_fake_tie_middle(adc_unit_t adc_unit, adc_channel_t channel);
-void adc_fake_tie_high(adc_unit_t adc_unit, adc_channel_t channel);
-void adc_fake_tie_low(adc_unit_t adc_unit, adc_channel_t channel);
-void adc_io_normal(adc_unit_t adc_unit, adc_channel_t channel);
-/**@}*/

components/driver/test_apps/i2c/CMakeLists.txt

@@ -0,0 +1,22 @@
+# This is the project CMakeLists.txt file for the test subproject
+cmake_minimum_required(VERSION 3.16)
+
+set(EXTRA_COMPONENT_DIRS
+    "$ENV{IDF_PATH}/tools/unit-test-app/components"
+)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(i2c_test)
+
+if(CONFIG_COMPILER_DUMP_RTL_FILES)
+    add_custom_target(check_test_app_sections ALL
+                        COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
+                        --rtl-dir ${CMAKE_BINARY_DIR}/esp-idf/driver/
+                        --elf-file ${CMAKE_BINARY_DIR}/i2c_test.elf
+                        find-refs
+                        --from-sections=.iram0.text
+                        --to-sections=.flash.text,.flash.rodata
+                        --exit-code
+                        DEPENDS ${elf}
+                        )
+endif()

components/driver/test_apps/i2c/README.md

@@ -0,0 +1,2 @@
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |

components/driver/test_apps/i2c/main/CMakeLists.txt

@@ -0,0 +1,6 @@
+set(srcs "test_app_main.c"
+         "test_i2c.c"
+    )
+
+idf_component_register(SRCS ${srcs}
+                       WHOLE_ARCHIVE)

components/driver/test_apps/i2c/main/test_app_main.c

@@ -0,0 +1,42 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "unity.h"
+#include "unity_test_runner.h"
+#include "unity_test_utils_memory.h"
+#include "esp_heap_caps.h"
+
+// Some resources are lazy allocated in I2C driver, so we reserved this threshold when checking memory leak
+// A better way to check a potential memory leak is running a same case by twice, for the second time, the memory usage delta should be zero
+#define LEAKS (400)
+
+void setUp(void)
+{
+    unity_utils_record_free_mem();
+}
+
+void tearDown(void)
+{
+    unity_utils_evaluate_leaks_direct(LEAKS);
+}
+
+void app_main(void)
+{
+
+    //  ___ ____   ____   _____         _
+    // |_ _|___ \ / ___| |_   _|__  ___| |_
+    //  | |  __) | |       | |/ _ \/ __| __|
+    //  | | / __/| |___    | |  __/\__ \ |_
+    // |___|_____|\____|   |_|\___||___/\__|
+
+    printf(" ___ ____   ____   _____         _   \n");
+    printf("|_ _|___ \\ / ___| |_   _|__  ___| |_ \n");
+    printf(" | |  __) | |       | |/ _ \\/ __| __|\n");
+    printf(" | | / __/| |___    | |  __/\\__ \\ |_ \n");
+    printf("|___|_____|\\____|   |_|\\___||___/\\__|\n");
+
+    unity_run_menu();
+}

components/driver/test/test_i2c.c → components/driver/test_apps/i2c/main/test_i2c.c

@@ -1,17 +1,12 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0
- */
-/**
- * test environment UT_T2_I2C:
- * please prepare two ESP32-WROVER-KIT board.
- * Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */
+
 #include <stdio.h>
 #include <string.h>
 #include "unity.h"
-#include "test_utils.h"
 #include "unity_config.h"
 #include "driver/i2c.h"
 #include "esp_attr.h"
@@ -24,36 +19,22 @@
 #include "esp_rom_gpio.h"
 #include "hal/gpio_hal.h"
 #include "hal/uart_ll.h"
-
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6, ESP32H2)
-#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
+#include "hal/i2c_types.h"
+#include "test_utils.h"
 
 #define DATA_LENGTH          512  /*!<Data buffer length for test buffer*/
 #define RW_TEST_LENGTH       129  /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
-#define DELAY_TIME_BETWEEN_ITEMS_MS   1234 /*!< delay time between different test items */
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
-#define I2C_SLAVE_SCL_IO     5     /*!<gpio number for i2c slave clock  */
-#define I2C_SLAVE_SDA_IO     6     /*!<gpio number for i2c slave data */
-#else
-#define I2C_SLAVE_SCL_IO     19    /*!<gpio number for i2c slave clock  */
-#define I2C_SLAVE_SDA_IO     18    /*!<gpio number for i2c slave data */
-#endif
+#define I2C_SLAVE_SCL_IO     0     /*!<gpio number for i2c slave clock  */
+#define I2C_SLAVE_SDA_IO     2     /*!<gpio number for i2c slave data */
 
 #define I2C_SLAVE_NUM I2C_NUM_0    /*!<I2C port number for slave dev */
 #define I2C_SLAVE_TX_BUF_LEN  (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
 #define I2C_SLAVE_RX_BUF_LEN  (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
 
-#if CONFIG_IDF_TARGET_ESP32C3
-#define I2C_MASTER_SCL_IO     5     /*!<gpio number for i2c master clock  */
-#define I2C_MASTER_SDA_IO     6     /*!<gpio number for i2c master data */
-#elif CONFIG_IDF_TARGET_ESP32S3
-#define I2C_MASTER_SCL_IO     2     /*!<gpio number for i2c master clock  */
-#define I2C_MASTER_SDA_IO     1     /*!<gpio number for i2c master data */
-#else
-#define I2C_MASTER_SCL_IO    19     /*!< gpio number for I2C master clock */
-#define I2C_MASTER_SDA_IO    18     /*!< gpio number for I2C master data  */
-#endif
+
+#define I2C_MASTER_SCL_IO     0     /*!<gpio number for i2c master clock  */
+#define I2C_MASTER_SDA_IO     2     /*!<gpio number for i2c master data */
 
 #define I2C_MASTER_NUM I2C_NUM_0   /*!< I2C port number for master dev */
 #define I2C_MASTER_TX_BUF_DISABLE   0   /*!< I2C master do not need buffer */
@@ -64,15 +45,6 @@
 #define WRITE_BIT  I2C_MASTER_WRITE /*!< I2C master write */
 #define READ_BIT   I2C_MASTER_READ  /*!< I2C master read */
 #define ACK_CHECK_EN   0x1     /*!< I2C master will check ack from slave*/
-#define ACK_CHECK_DIS  0x0     /*!< I2C master will not check ack from slave */
-#define ACK_VAL    0x0         /*!< I2C ack value */
-#define NACK_VAL   0x1         /*!< I2C nack value */
-
-#define PULSE_IO 19
-#define PCNT_INPUT_IO 4
-#define PCNT_CTRL_FLOATING_IO 5
-#define HIGHEST_LIMIT 10000
-#define LOWEST_LIMIT -10000
 
 static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
 #if SOC_I2C_NUM > 1
@@ -80,6 +52,8 @@ static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
 #endif
 };
 
+#define ACK_VAL 0
+#define NACK_VAL 1
 
 
 static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
@@ -108,6 +82,9 @@ static i2c_config_t i2c_master_init(void)
     return conf_master;
 }
 
+
+#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
+
 static i2c_config_t i2c_slave_init(void)
 {
     i2c_config_t conf_slave = {
@@ -122,9 +99,11 @@ static i2c_config_t i2c_slave_init(void)
     return conf_slave;
 }
 
+#endif
+
 TEST_CASE("I2C i2c_set_pin() fails if sda and scl gpios are same", "[i2c]")
 {
-    TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, i2c_set_pin(0, 0, 0, true, true , I2C_MODE_SLAVE));
+    TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, i2c_set_pin(0, 0, 0, true, true , I2C_MODE_MASTER));
 }
 
 TEST_CASE("I2C config test", "[i2c]")
@@ -148,6 +127,8 @@ TEST_CASE("I2C config test", "[i2c]")
     }
 
     // slave test
+
+#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
     i2c_config_t conf_slave = i2c_slave_init();
     for (int i = 0; i < 2; i++) {
         for (int j = 0; j < 2; j++) {
@@ -161,7 +142,7 @@ TEST_CASE("I2C config test", "[i2c]")
             TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
         }
     }
-
+#endif
 
 }
 
@@ -188,6 +169,9 @@ TEST_CASE("I2C set and get period test", "[i2c]")
     TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
 }
 
+
+#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
+
 TEST_CASE("I2C config FIFO test", "[i2c]")
 {
     i2c_config_t conf_slave = i2c_slave_init();
@@ -204,6 +188,8 @@ TEST_CASE("I2C config FIFO test", "[i2c]")
     TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
 }
 
+#endif
+
 TEST_CASE("I2C timing test", "[i2c]")
 {
     int test_setup_time, test_data_time, test_stop_time, test_hold_time;
@@ -233,52 +219,25 @@ TEST_CASE("I2C timing test", "[i2c]")
     i2c_driver_delete(I2C_MASTER_NUM);
 }
 
-TEST_CASE("I2C data mode test", "[i2c]")
-{
-    uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
-    i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
-    i2c_config_t conf_master = i2c_master_init();
-    TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
-                                   I2C_MASTER_RX_BUF_DISABLE,
-                                   I2C_MASTER_TX_BUF_DISABLE, 0));
-    TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
-    for (int i = 0; i < DATA_LENGTH; i++) {
-        data_wr[i] = i;
-    }
-    TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
-    TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
-    TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_tx_trans_mode);
-    TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_rx_trans_mode);
-    i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
-    TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST));
-    TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
-    TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_tx_trans_mode);
-    TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_rx_trans_mode);
-    i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
-    free(data_wr);
-    i2c_driver_delete(I2C_MASTER_NUM);
-}
-
-
 TEST_CASE("I2C driver memory leaking check", "[i2c]")
 {
     esp_err_t ret;
 
     int size = esp_get_free_heap_size();
-    for (uint32_t i = 0; i <= 1000; i++) {
-        ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
+    for (uint32_t i = 0; i <= 5; i++) {
+        ret = i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
                                  I2C_SLAVE_RX_BUF_LEN,
                                  I2C_SLAVE_TX_BUF_LEN, 0);
         TEST_ASSERT(ret == ESP_OK);
         vTaskDelay(10 / portTICK_PERIOD_MS);
-        i2c_driver_delete(I2C_SLAVE_NUM);
+        i2c_driver_delete(I2C_MASTER_NUM);
         TEST_ASSERT(ret == ESP_OK);
     }
 
     TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
 }
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C2)
+#if SOC_I2C_SUPPORT_SLAVE
 
 // print the reading buffer
 static void disp_buf(uint8_t *buf, int len)
@@ -347,7 +306,7 @@ static void i2c_slave_read_test(void)
     TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
 }
 
-TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
+TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
 
 static void master_read_slave_test(void)
 {
@@ -406,9 +365,9 @@ static void slave_write_buffer_test(void)
 }
 
 
-TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
+TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test, slave_write_buffer_test);
+
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32)
 static void i2c_master_write_read_test(void)
 {
     uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
@@ -485,7 +444,8 @@ static void i2c_slave_read_write_test(void)
     i2c_driver_delete(I2C_SLAVE_NUM);
 }
 
-TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
+TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
+
 
 static void i2c_master_repeat_write(void)
 {
@@ -546,11 +506,7 @@ static void i2c_slave_repeat_read(void)
     i2c_driver_delete(I2C_SLAVE_NUM);
 }
 
-TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
-
-
-#endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
-#endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
+TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
 
 static volatile bool exit_flag;
 static bool test_read_func;
@@ -595,6 +551,7 @@ TEST_CASE("test i2c_slave_read_buffer is not blocked when ticks_to_wait=0", "[i2
     } else {
         TEST_FAIL_MESSAGE("i2c_slave_read_buffer is blocked");
     }
+    vTaskDelay(2); // wait for task finish
     TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
 }
 
@@ -614,6 +571,7 @@ TEST_CASE("test i2c_slave_write_buffer is not blocked when ticks_to_wait=0", "[i
     } else {
         TEST_FAIL_MESSAGE("i2c_slave_write_buffer is blocked");
     }
+    vTaskDelay(2); // wait for task finish
     TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
 }
 
@@ -721,7 +679,7 @@ TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
     uart_aut_baud_det_init(uart1_rxd_io);
     i2c_cmd_handle_t cmd = i2c_cmd_link_create();
     i2c_master_start(cmd);
-    i2c_master_write(cmd, data, 30, ACK_CHECK_DIS);
+    i2c_master_write(cmd, data, 30, NACK_VAL);
     i2c_master_stop(cmd);
     i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_PERIOD_MS);
     i2c_cmd_link_delete(cmd);
@@ -731,4 +689,3 @@ TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
 }
 
 #endif // SOC_I2C_SUPPORT_SLAVE
-#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6, ESP32H2)

components/driver/test_apps/i2c/pytest_i2c.py

@@ -0,0 +1,39 @@
+# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+# SPDX-License-Identifier: CC0-1.0
+
+import pytest
+from pytest_embedded import Dut
+
+
+@pytest.mark.supported_targets
+@pytest.mark.generic
+@pytest.mark.parametrize(
+    'config',
+    [
+        'release',
+        'iram_safe',
+    ],
+    indirect=True,
+)
+def test_i2c(dut: Dut) -> None:
+    dut.run_all_single_board_cases()
+
+
+@pytest.mark.esp32
+@pytest.mark.esp32c3
+@pytest.mark.esp32c6
+@pytest.mark.esp32h2
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.generic_multi_device
+@pytest.mark.parametrize(
+    'count, config',
+    [
+        (2, 'defaults',),
+    ],
+    indirect=True
+)
+def test_i2c_multi_dev(case_tester) -> None:        # type: ignore
+    for case in case_tester.test_menu:
+        if case.attributes.get('test_env', 'generic_multi_device') == 'generic_multi_device':
+            case_tester.run_multi_dev_case(case=case, reset=True)

components/driver/test_apps/i2c/sdkconfig.ci.defaults

@@ -0,0 +1,2 @@
+CONFIG_FREERTOS_HZ=1000
+CONFIG_ESP_TASK_WDT=n

components/driver/test_apps/i2c/sdkconfig.ci.iram_safe

@@ -0,0 +1,5 @@
+CONFIG_PM_ENABLE=y
+CONFIG_COMPILER_DUMP_RTL_FILES=y
+CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
+CONFIG_COMPILER_OPTIMIZATION_NONE=y
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

tools/unit-test-app/configs/release_c3 → components/driver/test_apps/i2c/sdkconfig.ci.release

@@ -1,5 +1,5 @@
-CONFIG_IDF_TARGET="esp32c3"
-TEST_COMPONENTS=driver
+CONFIG_PM_ENABLE=y
+CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
-CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

components/driver/test_apps/i2c/sdkconfig.defaults

@@ -0,0 +1,2 @@
+CONFIG_FREERTOS_HZ=1000
+CONFIG_ESP_TASK_WDT=n

components/hal/esp32/include/hal/i2c_ll.h

@@ -275,6 +275,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_ll_hw_cmd_t cmd, int cmd_idx)
 {
     hw->command[cmd_idx].val = cmd.val;
@@ -454,6 +455,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_trans_start(i2c_dev_t *hw)
 {
     hw->ctr.trans_start = 1;
@@ -666,6 +668,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_update(i2c_dev_t *hw)
 {
     ;// ESP32 do not support
@@ -861,6 +864,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;
@@ -874,6 +878,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;

components/hal/esp32c2/include/hal/i2c_ll.h

@@ -281,6 +281,7 @@ static inline void i2c_ll_set_tout(i2c_dev_t *hw, int tout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_ll_hw_cmd_t cmd, int cmd_idx)
 {
     hw->command[cmd_idx].val = cmd.val;
@@ -483,6 +484,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_trans_start(i2c_dev_t *hw)
 {
     hw->ctr.trans_start = 1;
@@ -781,6 +783,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;
@@ -794,6 +797,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;

components/hal/esp32c3/include/hal/i2c_ll.h

@@ -297,6 +297,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_ll_hw_cmd_t cmd, int cmd_idx)
 {
     hw->command[cmd_idx].val = cmd.val;
@@ -499,6 +500,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_trans_start(i2c_dev_t *hw)
 {
     hw->ctr.trans_start = 1;
@@ -854,6 +856,7 @@ static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;
@@ -867,6 +870,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;

components/hal/esp32c6/include/hal/i2c_ll.h

@@ -299,6 +299,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_ll_hw_cmd_t cmd, int cmd_idx)
 {
     hw->command[cmd_idx].val = cmd.val;
@@ -501,6 +502,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_trans_start(i2c_dev_t *hw)
 {
     hw->ctr.trans_start = 1;
@@ -855,6 +857,7 @@ static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;
@@ -868,6 +871,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;

components/hal/esp32h2/include/hal/i2c_ll.h

@@ -300,6 +300,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_ll_hw_cmd_t cmd, int cmd_idx)
 {
     hw->command[cmd_idx].val = cmd.val;
@@ -502,6 +503,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_trans_start(i2c_dev_t *hw)
 {
     hw->ctr.trans_start = 1;
@@ -855,6 +857,7 @@ static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;
@@ -868,6 +871,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;

components/hal/esp32s2/include/hal/i2c_ll.h

@@ -264,6 +264,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_ll_hw_cmd_t cmd, int cmd_idx)
 {
     hw->command[cmd_idx].val = cmd.val;
@@ -466,6 +467,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_trans_start(i2c_dev_t *hw)
 {
     hw->ctr.trans_start = 1;
@@ -848,6 +850,7 @@ static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;
@@ -861,6 +864,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;

components/hal/esp32s3/include/hal/i2c_ll.h

@@ -297,6 +297,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_ll_hw_cmd_t cmd, int cmd_idx)
 {
     ESP_STATIC_ASSERT(sizeof(i2c_comd0_reg_t) == sizeof(i2c_ll_hw_cmd_t),
@@ -502,6 +503,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_trans_start(i2c_dev_t *hw)
 {
     hw->ctr.trans_start = 1;
@@ -849,6 +851,7 @@ static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;
@@ -862,6 +865,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
  *
  * @return None
  */
+__attribute__((always_inline))
 static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
 {
     hw->int_clr.val = UINT32_MAX;

tools/unit-test-app/configs/default

@@ -1,4 +0,0 @@
-# This config is split between targets since different component needs to be included (esp32, esp32s2)
-# IRAM is full... split some component to default_32_2
-CONFIG_IDF_TARGET="esp32"
-TEST_COMPONENTS=driver

tools/unit-test-app/configs/default_32_2

@@ -1,3 +1,3 @@
 # continue from default
 CONFIG_IDF_TARGET="esp32"
-TEST_COMPONENTS=soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs

tools/unit-test-app/configs/default_3_c3

@@ -1,3 +1,3 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32c3"
-TEST_COMPONENTS=soc spi_flash vfs lwip
+TEST_COMPONENTS=spi_flash vfs lwip

tools/unit-test-app/configs/default_c2

@@ -1,3 +1,3 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32c2"
-TEST_COMPONENTS= driver soc spi_flash vfs
+TEST_COMPONENTS= soc spi_flash vfs

tools/unit-test-app/configs/default_c3

@@ -1,3 +0,0 @@
-# This config is split between targets since different component needs to be included
-CONFIG_IDF_TARGET="esp32c3"
-TEST_COMPONENTS=driver

tools/unit-test-app/configs/default_c6

@@ -1,3 +1,3 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32c6"
-TEST_COMPONENTS=driver soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs

tools/unit-test-app/configs/default_h2

@@ -1,3 +1,3 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32h2"
-TEST_COMPONENTS=driver soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs

tools/unit-test-app/configs/default_s2_1

@@ -1,3 +0,0 @@
-# This config is split between targets since different component needs to be included (esp32, esp32s2)
-CONFIG_IDF_TARGET="esp32s2"
-TEST_COMPONENTS=driver

tools/unit-test-app/configs/default_s2_2

@@ -1,3 +1,3 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32s2"
-TEST_COMPONENTS=soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs

tools/unit-test-app/configs/default_s3

@@ -1,3 +1,3 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32s3"
-TEST_COMPONENTS=driver soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs

tools/unit-test-app/configs/freertos_compliance

@@ -1,4 +1,4 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32"
-TEST_COMPONENTS=driver spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

tools/unit-test-app/configs/freertos_compliance_c2

@@ -1,4 +1,4 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32c2"
-TEST_COMPONENTS=driver spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

tools/unit-test-app/configs/freertos_compliance_c3

@@ -1,4 +1,4 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32c3"
-TEST_COMPONENTS=driver spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

tools/unit-test-app/configs/freertos_compliance_c6

@@ -1,4 +1,4 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32c6"
-TEST_COMPONENTS=driver esp_hw_support spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

tools/unit-test-app/configs/freertos_compliance_h2

@@ -1,4 +1,4 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32h2"
-TEST_COMPONENTS=driver esp_hw_support spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

tools/unit-test-app/configs/freertos_compliance_s2

@@ -1,4 +1,4 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32s2"
-TEST_COMPONENTS=driver spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

tools/unit-test-app/configs/freertos_flash

@@ -1,2 +1,2 @@
-TEST_COMPONENTS=driver spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y

tools/unit-test-app/configs/psram_3

@@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32"
-TEST_COMPONENTS=driver sdmmc
+TEST_COMPONENTS=sdmmc
 CONFIG_SPIRAM=y
 CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
 CONFIG_SPIRAM_OCCUPY_NO_HOST=y

tools/unit-test-app/configs/psram_all_ext_1

@@ -1,8 +0,0 @@
-CONFIG_IDF_TARGET="esp32"
-TEST_COMPONENTS=driver
-CONFIG_SPIRAM=y
-CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
-CONFIG_SPIRAM_OCCUPY_NO_HOST=y
-CONFIG_ESP_WIFI_RX_IRAM_OPT=n
-CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y
-CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0

tools/unit-test-app/configs/psram_all_ext_2

@@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32"
-TEST_COMPONENTS=soc spi_flash
+TEST_COMPONENTS=spi_flash
 CONFIG_SPIRAM=y
 CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
 CONFIG_SPIRAM_OCCUPY_NO_HOST=y

tools/unit-test-app/configs/release_c2

@@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32c2"
-TEST_COMPONENTS=driver soc spi_flash vfs sdmmc
+TEST_COMPONENTS=spi_flash vfs sdmmc
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y

tools/unit-test-app/configs/release_c3_2

@@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32c3"
-TEST_COMPONENTS=soc spi_flash vfs sdmmc
+TEST_COMPONENTS=spi_flash vfs sdmmc
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y

tools/unit-test-app/configs/release_c6

@@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32c6"
-TEST_COMPONENTS=esp_hw_support esp_ipc driver soc spi_flash vfs sdmmc
+TEST_COMPONENTS=esp_ipc spi_flash vfs sdmmc
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y

tools/unit-test-app/configs/release_h2

@@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32h2"
-TEST_COMPONENTS=esp_hw_support esp_ipc driver soc spi_flash vfs sdmmc
+TEST_COMPONENTS=esp_ipc spi_flash vfs sdmmc
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y

tools/unit-test-app/configs/release_s2

@@ -1,6 +1,6 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32s2"
-TEST_COMPONENTS=driver soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

tools/unit-test-app/configs/release_s3

@@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32s3"
-TEST_COMPONENTS=driver soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

tools/unit-test-app/configs/single_core

@@ -1,6 +1,6 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32"
-TEST_COMPONENTS=driver soc spi_flash vfs
+TEST_COMPONENTS=spi_flash vfs
 CONFIG_FREERTOS_UNICORE=y
 CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY=y
 CONFIG_ESP32_RTCDATA_IN_FAST_MEM=y

tools/unit-test-app/configs/single_core_s2

@@ -1,4 +1,4 @@
 # This config is split between targets since different component needs to be included (esp32, esp32s2)
 CONFIG_IDF_TARGET="esp32s2"
-TEST_COMPONENTS=driver soc spi_flash test_utils
+TEST_COMPONENTS=spi_flash test_utils
 CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM=y

tools/unit-test-app/disabled_configs/psram_2_s2

@@ -1,4 +1,4 @@
-TEST_COMPONENTS=driver spi_flash mbedtls
+TEST_COMPONENTS=spi_flash mbedtls
 CONFIG_SPIRAM=y
 CONFIG_IDF_TARGET="esp32s2"
 CONFIG_SPIRAM_OCCUPY_NO_HOST=y