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@@ -85,9 +85,8 @@ static void IRAM_ATTR frc_timer_isr()
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{
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// Write to FRC_TIMER_INT_REG may not take effect in some cases (root cause TBD)
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// This extra write works around this issue.
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- // There is no register at DR_REG_FRC_TIMER_BASE + 0x60 (in fact, any DPORT register address can be used).
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- WRITE_PERI_REG(DR_REG_FRC_TIMER_BASE + 0x60, 0xabababab);
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- // Clear interrupt status
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+ // FRC_TIMER_LOAD_REG(0) is used here, but any other DPORT register address can also be used.
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+ WRITE_PERI_REG(FRC_TIMER_LOAD_REG(0), FRC_TIMER_LOAD_VALUE(0));
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WRITE_PERI_REG(FRC_TIMER_INT_REG(0), FRC_TIMER_INT_CLR);
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s_microseconds += FRC1_ISR_PERIOD_US;
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}
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