esp_system: ipc_isr does not use its own initialization task, it is done from ipc_task()

It helps to reduce the memory usage at startup.

Closes https://github.com/espressif/esp-idf/issues/8111

components/esp_ipc/include/esp_ipc_isr.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -22,20 +22,6 @@ extern "C" {
  */
 typedef void (*esp_ipc_isr_func_t)(void* arg);
 
-/**
- * @brief Initialize the IPC ISR feature
- *
- * This function initializes the IPC ISR feature and must be called before any other esp_ipc_isr...() functions.
- * The IPC ISR feature allows for callbacks (written in assembly) to be run on a particular CPU in the context of a
- * High Priority Interrupt.
- *
- * - This function will register a High Priority Interrupt on each CPU. The priority of the interrupts is dependent on
- *   the CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL option.
- * - Callbacks written in assembly can then run in context of the registered High Priority Interrupts
- * - Callbacks can be executed by calling esp_ipc_isr_asm_call() or esp_ipc_isr_asm_call_blocking()
- */
-void esp_ipc_isr_init(void);
-
 /**
  * @brief Execute an assembly callback on the other CPU
  *

components/esp_ipc/src/esp_ipc.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,7 +10,7 @@
 #include <assert.h>
 #include "esp_err.h"
 #include "esp_ipc.h"
-#include "esp_ipc_isr.h"
+#include "esp_private/esp_ipc_isr.h"
 #include "esp_attr.h"
 
 #include "freertos/FreeRTOS.h"
@@ -44,6 +44,9 @@ static void IRAM_ATTR ipc_task(void* arg)
 {
     const int cpuid = (int) arg;
     assert(cpuid == xPortGetCoreID());
+#ifdef CONFIG_ESP_IPC_ISR_ENABLE
+    esp_ipc_isr_init();
+#endif
     while (true) {
         // Wait for IPC to be initiated.
         // This will be indicated by giving the semaphore corresponding to
@@ -97,9 +100,6 @@ static void esp_ipc_init(void) __attribute__((constructor));
 
 static void esp_ipc_init(void)
 {
-#ifdef CONFIG_ESP_IPC_ISR_ENABLE
-	esp_ipc_isr_init();
-#endif
     char task_name[15];
 
     for (int i = 0; i < portNUM_PROCESSORS; ++i) {

components/esp_ipc/src/esp_ipc_isr/esp_ipc_isr.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -23,6 +23,7 @@
 #include "freertos/task.h"
 #include "freertos/portmacro.h"
 #include "esp_intr_alloc.h"
+#include "esp_private/esp_ipc_isr.h"
 #include "esp_ipc_isr.h"
 #include "xtensa/core-macros.h"
 #include "sdkconfig.h"
@@ -60,31 +61,17 @@ static void esp_ipc_isr_call_and_wait(esp_ipc_isr_func_t func, void* arg, esp_ip
 
 /* Initializing IPC_ISR */
 
-static void esp_ipc_isr_init_cpu(void* arg)
+void esp_ipc_isr_init(void)
 {
-    (void) arg;
     const uint32_t cpuid = xPortGetCoreID();
     uint32_t intr_source = ETS_FROM_CPU_INTR2_SOURCE + cpuid; // ETS_FROM_CPU_INTR2_SOURCE and ETS_FROM_CPU_INTR3_SOURCE
     ESP_INTR_DISABLE(ETS_IPC_ISR_INUM);
     intr_matrix_set(cpuid, intr_source, ETS_IPC_ISR_INUM);
     ESP_INTR_ENABLE(ETS_IPC_ISR_INUM);
 
-    /* If this fails then the minimum stack size for this config is too close to running out */
-    assert(uxTaskGetStackHighWaterMark(NULL) > 128);
-
     if (cpuid != 0) {
         s_stall_state = STALL_STATE_RUNNING;
     }
-    vTaskDelete(NULL);
-}
-
-void esp_ipc_isr_init(void)
-{
-    for (unsigned i = 0; i < portNUM_PROCESSORS; ++i) {
-        portBASE_TYPE res = xTaskCreatePinnedToCore(esp_ipc_isr_init_cpu, "ipc_isr_init", configMINIMAL_STACK_SIZE, NULL, 5, NULL, i);
-        assert(res == pdTRUE);
-        (void)res;
-    }
 }
 
 /* End initializing IPC_ISR */

components/esp_system/include/esp_private/esp_ipc_isr.h

@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ESP_IPC_ISR_ENABLE
+
+/**
+ * @brief Initialize the IPC ISR feature, must be called for each CPU
+ *
+ * @note This function is called from ipc_task().
+ *
+ * This function initializes the IPC ISR feature and must be called before any other esp_ipc_isr...() functions.
+ * The IPC ISR feature allows for callbacks (written in assembly) to be run on a particular CPU in the context of a
+ * High Priority Interrupt.
+ *
+ * - This function will register a High Priority Interrupt for a CPU where it is called. The priority of the interrupts is dependent on
+ *   the CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL option.
+ * - Callbacks written in assembly can then run in context of the registered High Priority Interrupts
+ * - Callbacks can be executed by calling esp_ipc_isr_asm_call() or esp_ipc_isr_asm_call_blocking()
+ */
+void esp_ipc_isr_init(void);
+
+#endif // CONFIG_ESP_IPC_ISR_ENABLE
+
+#ifdef __cplusplus
+}
+#endif