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@@ -79,7 +79,7 @@ esp_err_t mcpwm_gpio_init(mcpwm_unit_t mcpwm_num, mcpwm_io_signals_t io_signal,
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MCPWM_CHECK((GPIO_IS_VALID_OUTPUT_GPIO(gpio_num)), MCPWM_GPIO_ERROR, ESP_ERR_INVALID_ARG);
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gpio_set_direction(gpio_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(gpio_num, PWM1_OUT0A_IDX + io_signal, 0, 0);
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- } else if (io_signal >= MCPWM_SYNC_0 && io_signal < MCPWM_FAULT_2) {
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+ } else if (io_signal >= MCPWM_SYNC_0 && io_signal <= MCPWM_FAULT_2) {
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gpio_set_direction(gpio_num, GPIO_MODE_INPUT);
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gpio_matrix_in(gpio_num, PWM1_SYNC0_IN_IDX + io_signal - OFFSET_FOR_GPIO_IDX_1, 0);
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} else {
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@@ -625,6 +625,9 @@ esp_err_t mcpwm_fault_set_oneshot_mode(mcpwm_unit_t mcpwm_num, mcpwm_timer_t tim
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MCPWM_CHECK(mcpwm_num < MCPWM_UNIT_MAX, MCPWM_UNIT_NUM_ERROR, ESP_ERR_INVALID_ARG);
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MCPWM_CHECK(timer_num < MCPWM_TIMER_MAX, MCPWM_TIMER_ERROR, ESP_ERR_INVALID_ARG);
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portENTER_CRITICAL(&mcpwm_spinlock);
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+ //clear the ost triggered status
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+ MCPWM[mcpwm_num]->channel[timer_num].tz_cfg1.clr_ost = 1;
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+ MCPWM[mcpwm_num]->channel[timer_num].tz_cfg1.clr_ost = 0;
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if (fault_sig == MCPWM_SELECT_F0) {
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MCPWM[mcpwm_num]->channel[timer_num].tz_cfg0.f0_ost = 1;
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MCPWM[mcpwm_num]->channel[timer_num].tz_cfg0.f0_cbc = 0;
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@@ -656,6 +659,9 @@ esp_err_t mcpwm_capture_enable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t ca
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{
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MCPWM_CHECK(mcpwm_num < MCPWM_UNIT_MAX, MCPWM_UNIT_NUM_ERROR, ESP_ERR_INVALID_ARG);
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portENTER_CRITICAL(&mcpwm_spinlock);
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+ //We have to do this here, since there is no standalone init function
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+ //without enabling any PWM channels.
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+ MCPWM[mcpwm_num]->clk_cfg.prescale = MCPWM_CLK_PRESCL;
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MCPWM[mcpwm_num]->cap_timer_cfg.timer_en = 1;
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MCPWM[mcpwm_num]->cap_cfg_ch[cap_sig].en = 1;
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MCPWM[mcpwm_num]->cap_cfg_ch[cap_sig].mode = (1 << cap_edge);
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