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deep sleep: fix some rtc fast memory definition errors in esp32s3

Li Shuai %!s(int64=4) %!d(string=hai) anos
pai
achega
9298db641e

+ 1 - 5
components/esp_system/Kconfig

@@ -87,11 +87,7 @@ menu "ESP System Settings"
 
     config ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
         bool "Enable RTC fast memory for dynamic allocations"
-        default y if IDF_TARGET_ESP32
-        default y if IDF_TARGET_ESP32S2
-        default y if IDF_TARGET_ESP32C3
-        default n if IDF_TARGET_ESP32S3  # TODO
-        default y if IDF_TARGET_ESP32H2
+        default y
         depends on ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK
         help
             This config option allows to add RTC fast memory region to system heap with capability

+ 1 - 1
components/esp_system/ld/esp32s3/memory.ld.in

@@ -103,7 +103,7 @@ MEMORY
   /**
    * RTC fast memory (same block as above), viewed from data bus
    */
-  rtc_data_seg(RW) :                 org = 0x600fe000, len = 0x2000
+  rtc_data_seg(RW) :                 org = 0x600fe000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC
 
   /**
    * RTC slow memory (data accessible). Persists over deep sleep.

+ 13 - 2
components/heap/port/esp32s3/memory_layout.c

@@ -46,6 +46,8 @@ const soc_memory_type_desc_t soc_memory_types[] = {
     { "SPIRAM", { MALLOC_CAP_SPIRAM | MALLOC_CAP_DEFAULT, 0, MALLOC_CAP_8BIT | MALLOC_CAP_32BIT}, false, false},
     // Type 5: DRAM which is not DMA accesible
     { "NON_DMA_DRAM", { MALLOC_CAP_8BIT | MALLOC_CAP_DEFAULT, MALLOC_CAP_INTERNAL | MALLOC_CAP_32BIT, 0 }, false, false},
+    // Type 6: RTC Fast RAM
+    { "RTCRAM", { MALLOC_CAP_8BIT | MALLOC_CAP_DEFAULT, MALLOC_CAP_INTERNAL | MALLOC_CAP_32BIT, 0 }, false, false},
 };
 
 const size_t soc_memory_type_count = sizeof(soc_memory_types) / sizeof(soc_memory_type_desc_t);
@@ -78,13 +80,13 @@ const soc_memory_region_t soc_memory_regions[] = {
     { 0x3C000000, 0x4000,  5, 0}
 #endif
 #ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
-    { 0x50000000, 0x2000,  4, 0}, //Fast RTC memory
+    { 0x600fe000, 0x2000,  6, 0}, //Fast RTC memory
 #endif
 };
 
 const size_t soc_memory_region_count = sizeof(soc_memory_regions) / sizeof(soc_memory_region_t);
 
-extern int _data_start, _heap_start, _iram_start, _iram_end; // defined in sections.ld.in
+extern int _data_start, _heap_start, _iram_start, _iram_end, _rtc_force_fast_end, _rtc_noinit_end; // defined in sections.ld.in
 
 /**
  * Reserved memory regions.
@@ -115,4 +117,13 @@ SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_dat
 SOC_RESERVE_MEMORY_REGION(0x3fffc000 - CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM, 0x3fffc000, trace_mem);
 #endif
 
+// RTC Fast RAM region
+#ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
+#ifdef CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM
+SOC_RESERVE_MEMORY_REGION(SOC_RTC_DRAM_LOW, (intptr_t)&_rtc_noinit_end, rtcram_data);
+#else
+SOC_RESERVE_MEMORY_REGION(SOC_RTC_DRAM_LOW, (intptr_t)&_rtc_force_fast_end, rtcram_data);
+#endif
+#endif
+
 #endif // BOOTLOADER_BUILD