Merge branch 'bugfix/twai_caps_naming_and_tidy_up_v4.3' into 'release/v4.3'

Fix TWAI caps (backport v4.3)

See merge request espressif/esp-idf!13304

components/driver/twai.c

@@ -412,11 +412,7 @@ esp_err_t twai_driver_install(const twai_general_config_t *g_config, const twai_
     TWAI_CHECK(g_config->rx_queue_len > 0, ESP_ERR_INVALID_ARG);
     TWAI_CHECK(g_config->tx_io >= 0 && g_config->tx_io < GPIO_NUM_MAX, ESP_ERR_INVALID_ARG);
     TWAI_CHECK(g_config->rx_io >= 0 && g_config->rx_io < GPIO_NUM_MAX, ESP_ERR_INVALID_ARG);
-#if (CONFIG_ESP32_REV_MIN >= 2)
-    TWAI_CHECK(t_config->brp >= SOC_TWAI_BRP_MIN && t_config->brp <= SOC_TWAI_BRP_MAX_ECO, ESP_ERR_INVALID_ARG);
-#else
     TWAI_CHECK(t_config->brp >= SOC_TWAI_BRP_MIN && t_config->brp <= SOC_TWAI_BRP_MAX, ESP_ERR_INVALID_ARG);
-#endif
 #ifndef CONFIG_TWAI_ISR_IN_IRAM
     TWAI_CHECK(!(g_config->intr_flags & ESP_INTR_FLAG_IRAM), ESP_ERR_INVALID_ARG);
 #endif

components/hal/esp32/include/hal/twai_ll.h

@@ -395,7 +395,7 @@ static inline uint32_t twai_ll_get_and_clear_intrs(twai_dev_t *hw)
  */
 static inline void twai_ll_set_enabled_intrs(twai_dev_t *hw, uint32_t intr_mask)
 {
-#if TWAI_BRP_DIV_SUPPORTED
+#if SOC_TWAI_BRP_DIV_SUPPORTED
     //ESP32 Rev 2 or later has brp div field. Need to mask it out
     hw->interrupt_enable_reg.val = (hw->interrupt_enable_reg.val & 0x10) | intr_mask;
 #else
@@ -421,7 +421,7 @@ static inline void twai_ll_set_enabled_intrs(twai_dev_t *hw, uint32_t intr_mask)
  */
 static inline void twai_ll_set_bus_timing(twai_dev_t *hw, uint32_t brp, uint32_t sjw, uint32_t tseg1, uint32_t tseg2, bool triple_sampling)
 {
-#if TWAI_BRP_DIV_SUPPORTED
+#if SOC_TWAI_BRP_DIV_SUPPORTED
     if (brp > SOC_TWAI_BRP_DIV_THRESH) {
         //Need to set brp_div bit
         hw->interrupt_enable_reg.brp_div = 1;

components/soc/esp32/include/soc/soc_caps.h

@@ -220,25 +220,14 @@
 
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_BRP_MIN                        2
-#define SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT   1
-
-#define SOC_TWAI_BRP_MAX_ECO0               128
-//Any even number from 2 to 128
-#define SOC_TWAI_BRP_IS_VALID_ECO0(brp)     ((brp) >= 2 && (brp) <= 128 && ((brp) & 0x1) == 0)
-
-#define SOC_TWAI_BRP_MAX_ECO                256
-//Any even number from 2 to 128, or multiples of 4 from 132 to 256
-#define SOC_TWAI_BRP_IS_VALID_ECO(brp)      (((brp) >= 2 && (brp) <= 128 && ((brp) & 0x1) == 0) || ((brp) >= 132 && (brp) <= 256 && ((brp) & 0x3) == 0))
-
 #if SOC_CAPS_ECO_VER >= 2
+#  define SOC_TWAI_BRP_MAX              256
 #  define SOC_TWAI_BRP_DIV_SUPPORTED    1
 #  define SOC_TWAI_BRP_DIV_THRESH       128
-#  define SOC_TWAI_BRP_IS_VALID         SOC_TWAI_BRP_IS_VALID_ECO
-#  define SOC_TWAI_BRP_MAX              SOC_TWAI_BRP_MAX_ECO
 #else
-#  define SOC_TWAI_BRP_IS_VALID         SOC_TWAI_BRP_IS_VALID_ECO0
-#  define SOC_TWAI_BRP_MAX              SOC_TWAI_BRP_MAX_ECO0
+#  define SOC_TWAI_BRP_MAX              128
 #endif
+#define SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT   1
 
 /*-------------------------- UART CAPS ---------------------------------------*/
 // ESP32 have 3 UART.
@@ -281,5 +270,8 @@
 #define SOC_CAN_SUPPORTED                   SOC_TWAI_SUPPORTED
 #define CAN_BRP_MIN                         SOC_TWAI_BRP_MIN
 #define CAN_BRP_MAX                         SOC_TWAI_BRP_MAX
-#define CAN_BRP_DIV_THRESH                  SOC_TWAI_BRP_DIV_THRESH
 #define CAN_SUPPORT_MULTI_ADDRESS_LAYOUT    SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT
+#if SOC_CAPS_ECO_VER >= 2
+#  define CAN_BRP_DIV_SUPPORTED             SOC_TWAI_BRP_DIV_SUPPORTED
+#  define CAN_BRP_DIV_THRESH                SOC_TWAI_BRP_DIV_THRESH
+#endif