Merge branch 'bugfix/rtc_vddsdio_details' into 'master'

Fix minor VDDSDIO details

See merge request idf/esp-idf!2449

components/bootloader_support/src/bootloader_init.c

@@ -276,7 +276,7 @@ static void vddsdio_configure()
 {
 #if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
     rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
-    if (cfg.enable == 1 && cfg.tieh == 0) {    // VDDSDIO regulator is enabled @ 1.8V
+    if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) {    // VDDSDIO regulator is enabled @ 1.8V
         cfg.drefh = 3;
         cfg.drefm = 3;
         cfg.drefl = 3;

components/esp32/spiram_psram.c

@@ -570,7 +570,7 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
     #if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
         // For flash 80Mhz, we must update ldo voltage in case older version of bootloader didn't do this.
         rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
-        if (cfg.enable == 1 && cfg.tieh == 0) {    // VDDSDIO regulator is enabled @ 1.8V
+        if (cfg.enable == 1 && cfg.tieh == RTC_VDDSDIO_TIEH_1_8V) {    // VDDSDIO regulator is enabled @ 1.8V
             cfg.drefh = 3;
             cfg.drefm = 3;
             cfg.drefl = 3;

components/soc/esp32/include/soc/rtc.h

@@ -578,13 +578,16 @@ typedef struct {
  */
 void rtc_init(rtc_config_t cfg);
 
+#define RTC_VDDSDIO_TIEH_1_8V 0 //!< TIEH field value for 1.8V VDDSDIO
+#define RTC_VDDSDIO_TIEH_3_3V 1 //!< TIEH field value for 3.3V VDDSDIO
+
 /**
  * Structure describing vddsdio configuration
  */
 typedef struct {
     uint32_t force : 1;     //!< If 1, use configuration from RTC registers; if 0, use EFUSE/bootstrapping pins.
     uint32_t enable : 1;    //!< Enable VDDSDIO regulator
-    uint32_t tieh  : 1;     //!< Select VDDSDIO voltage: 1 — 1.8V, 0 — 3.3V
+    uint32_t tieh  : 1;     //!< Select VDDSDIO voltage. One of RTC_VDDSDIO_TIEH_1_8V, RTC_VDDSDIO_TIEH_3_3V
     uint32_t drefh : 2;     //!< Tuning parameter for VDDSDIO regulator
     uint32_t drefm : 2;     //!< Tuning parameter for VDDSDIO regulator
     uint32_t drefl : 2;     //!< Tuning parameter for VDDSDIO regulator

components/soc/esp32/rtc_init.c

@@ -132,8 +132,8 @@ rtc_vddsdio_config_t rtc_vddsdio_get_config()
     // Otherwise, VDD_SDIO is controlled by bootstrapping pin
     uint32_t strap_reg = REG_READ(GPIO_STRAP_REG);
     result.force = 0;
-    result.tieh = (strap_reg & BIT(5)) ? 0 : 1;
-    result.enable = result.tieh == 0; // only power on the regulator if VDD=1.8
+    result.tieh = (strap_reg & BIT(5)) ? RTC_VDDSDIO_TIEH_1_8V : RTC_VDDSDIO_TIEH_3_3V;
+    result.enable = 1;
     return result;
 }