global: enable build uinit test for esp32-s3

components/driver/test/adc_dma_test/test_esp32.c

@@ -29,7 +29,7 @@
 #include "test_utils.h"
 #include "esp_rom_sys.h"
 
-#if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2) // This testcase for ESP32
+#if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2, ESP32S3) // This testcase for ESP32
 
 /*
  * ADC DMA testcase

components/driver/test/adc_dma_test/test_esp32s2.c

@@ -36,7 +36,7 @@
 #include "test/test_common_adc.h"
 #include "esp_rom_sys.h"
 
-#if !DISABLED_FOR_TARGETS(ESP8266, ESP32) // This testcase for ESP32S2
+#if !DISABLED_FOR_TARGETS(ESP8266, ESP32, ESP32S3) // This testcase for ESP32S2
 
 #include "soc/system_reg.h"
 #include "soc/lldesc.h"

components/driver/test/dac_dma_test/test_esp32.c

@@ -31,7 +31,7 @@
 #include "test_dac_audio_file.h"
 #include "driver/i2s.h"
 
-#if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2) // This testcase for ESP32
+#if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2, ESP32S3) // This testcase for ESP32
 
 /*
  * DAC DMA config.

components/driver/test/dac_dma_test/test_esp32s2.c

@@ -37,7 +37,7 @@
 #include "soc/dac_periph.h"
 #include "test/test_common_adc.h"
 
-#if !DISABLED_FOR_TARGETS(ESP8266, ESP32) // This testcase for ESP32S2
+#if !DISABLED_FOR_TARGETS(ESP8266, ESP32, ESP32S3) // This testcase for ESP32S2
 
 #include "soc/system_reg.h"
 #include "esp32s2/rom/lldesc.h"

components/driver/test/test_adc2_with_wifi.c

@@ -12,6 +12,8 @@
 #include "nvs_flash.h"
 #include "test_utils.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 static const char* TAG = "test_adc2";
 
 #ifdef CONFIG_IDF_TARGET_ESP32
@@ -165,3 +167,5 @@ TEST_CASE("adc2 work with wifi","[adc]")
 
     TEST_IGNORE_MESSAGE("this test case is ignored due to the critical memory leak of esp_netif and event_loop.");
 }
+
+#endif

components/driver/test/test_adc_common.c

@@ -15,6 +15,8 @@
 #include "test_utils.h"
 #include "soc/adc_periph.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 static const char *TAG = "test_adc";
 
 #ifdef CONFIG_IDF_TARGET_ESP32
@@ -382,4 +384,6 @@ void test_adc_slope_debug(void)
         vTaskDelay(SCOPE_DEBUG_FREQ_MS / portTICK_RATE_MS);
     }
 #endif
-}
+}
+
+#endif

components/driver/test/test_common_spi.c

@@ -3,6 +3,8 @@
 #include "esp_log.h"
 #include "driver/gpio.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 int test_freq_default[]=TEST_FREQ_DEFAULT();
 
 const char MASTER_TAG[] = "test_master";
@@ -204,4 +206,6 @@ void spitest_gpio_output_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
 {
     PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[gpio_num], func);
     GPIO.func_out_sel_cfg[gpio_num].func_sel=signal_idx;
-}
+}
+
+#endif

components/driver/test/test_dac.c

@@ -14,6 +14,7 @@
 #include "test_utils.h"
 #include "driver/i2s.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 #include "esp_adc_cal.h"
 
 static const char *TAG = "test_dac";
@@ -180,3 +181,5 @@ TEST_CASE("esp32s2 adc2-dac with adc2 calibration", "[adc-dac]")
     subtest_adc_dac(2500, &chars);
 }
 #endif
+
+#endif

components/driver/test/test_gpio.c

@@ -16,6 +16,8 @@
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define WAKE_UP_IGNORE 1  // gpio_wakeup function development is not completed yet, set it deprecated.
 
 #if CONFIG_IDF_TARGET_ESP32
@@ -770,3 +772,5 @@ TEST_CASE("GPIO ISR service test", "[gpio][ignore]")
     gpio_uninstall_isr_service();
     TEST_ASSERT((io18_param.isr_cnt == 1) && (io19_param.isr_cnt == 1));
 }
+
+#endif

components/driver/test/test_i2c.c

@@ -19,6 +19,7 @@
 #include "driver/periph_ctrl.h"
 #include "esp_rom_gpio.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 
 #define DATA_LENGTH          512  /*!<Data buffer length for test buffer*/
 #define RW_TEST_LENGTH       129  /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
@@ -686,3 +687,5 @@ TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
     free(data);
     TEST_ESP_OK(i2c_driver_delete(i2c_num));
 }
+
+#endif

components/driver/test/test_i2s.c

@@ -15,6 +15,8 @@
 #include "math.h"
 #include "esp_rom_gpio.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define SAMPLE_RATE     (36000)
 #define SAMPLE_BITS     (16)
 #define MASTER_BCK_IO 15
@@ -516,3 +518,5 @@ TEST_CASE("I2S APLL clock variation test", "[i2s]")
     vTaskDelay(100 / portTICK_PERIOD_MS);
     TEST_ASSERT(initial_size == esp_get_free_heap_size());
 }
+
+#endif

components/driver/test/test_ledc.c

@@ -25,6 +25,8 @@
 #include "driver/ledc.h"
 #include "driver/gpio.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define PULSE_IO 18
 #define PCNT_INPUT_IO 4
 #define PCNT_CTRL_FLOATING_IO 5
@@ -543,3 +545,5 @@ TEST_CASE("LEDC memory test", "[ledc][test_env=UT_T1_LEDC]")
 }
 
 #endif  //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
+
+#endif

components/driver/test/test_pcnt.c

@@ -25,6 +25,8 @@
 #include "unity.h"
 #include "esp_rom_gpio.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define PULSE_IO 21
 #define PCNT_INPUT_IO 4
 #define PCNT_CTRL_VCC_IO 5
@@ -669,4 +671,6 @@ TEST_CASE("PCNT counting mode test", "[pcnt]")
     count_mode_test(PCNT_CTRL_VCC_IO);
     printf("PCNT mode test for negative count\n");
     count_mode_test(PCNT_CTRL_GND_IO);
-}
+}
+
+#endif

components/driver/test/test_pwm.c

@@ -25,6 +25,8 @@
 #include "soc/rtc.h"
 #include "soc/soc_caps.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #ifdef SOC_MCPWM_SUPPORTED
 #include "soc/mcpwm_periph.h"
 #include "driver/mcpwm.h"
@@ -786,4 +788,6 @@ TEST_CASE("MCPWM unit1, timer2 capture test", "[mcpwm][test_env=UT_T1_MCPWM][tim
     capture_test(MCPWM_UNIT_1, MCPWM_TIMER_2, MCPWM_POS_EDGE);
 }
 
-#endif
+#endif
+
+#endif

components/driver/test/test_rmt.c

@@ -12,6 +12,8 @@
 #include "test_utils.h"
 #include "esp_rom_gpio.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 // CI ONLY: Don't connect any other signals to this GPIO
 #define RMT_DATA_IO (12) // bind signal RMT_SIG_OUT0_IDX and RMT_SIG_IN0_IDX on the same GPIO
 
@@ -519,3 +521,5 @@ TEST_CASE("RMT TX loop", "[rmt]")
     rmt_clean_testbench(tx_channel, rx_channel);
 }
 #endif
+
+#endif

components/driver/test/test_rs485.c

@@ -9,6 +9,8 @@
 #include "esp_log.h"
 #include "esp_system.h"             // for uint32_t esp_random()
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define UART_TAG         "Uart"
 #define UART_NUM1        (UART_NUM_1)
 #define BUF_SIZE         (100)
@@ -283,4 +285,6 @@ static void rs485_master(void)
 */
 TEST_CASE_MULTIPLE_DEVICES("RS485 half duplex uart multiple devices test.", "[driver_RS485][test_env=UT_T2_RS485]", rs485_master, rs485_slave);
 
-#endif
+#endif
+
+#endif

components/driver/test/test_rtcio.c

@@ -16,6 +16,8 @@
 #include "esp_log.h"
 #include "soc/rtc_io_periph.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK")
 #define RTCIO_VERIFY(condition, msg) TEST_ASSERT_MESSAGE((condition), msg)
 
@@ -267,4 +269,6 @@ TEST_CASE("RTCIO output hold test", "[rtcio]")
         }
     }
     ESP_LOGI(TAG, "RTCIO hold test over");
-}
+}
+
+#endif

components/driver/test/test_sdio.c

@@ -22,6 +22,8 @@
 #include "soc/soc_caps.h"
 #include "ccomp_timer.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #if defined(SOC_SDMMC_HOST_SUPPORTED) && defined(SOC_SDIO_SLAVE_SUPPORTED)
 #include "driver/sdio_slave.h"
 #include "driver/sdmmc_host.h"
@@ -805,4 +807,6 @@ ptest_func_t tohost_slave = {
 
 TEST_MASTER_SLAVE(SDIO_TOHOST, test_cfg_array, "[sdio][timeout=180][test_env=UT_SDIO]", &tohost_master, &tohost_slave);
 
-#endif
+#endif
+
+#endif

components/driver/test/test_sigmadelta.c

@@ -9,6 +9,8 @@
 #include "freertos/task.h"
 #include "driver/sigmadelta.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 TEST_CASE("SigmaDelta config test", "[sigma_delta]")
 {
     sigmadelta_config_t sigmadelta_cfg = {
@@ -85,3 +87,5 @@ TEST_CASE("SigmaDelta pin, duty, prescale set", "[sigma_delta][ignore]")
     TEST_ESP_OK(sigmadelta_set_pin(SIGMADELTA_CHANNEL_0, 5));
     vTaskDelay(3000 / portTICK_PERIOD_MS);
 }
+
+#endif

components/driver/test/test_spi_bus_lock.c

@@ -7,6 +7,7 @@
 #include "test/test_common_spi.h"
 #include "unity.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 
 #if CONFIG_IDF_TARGET_ESP32
 // The VSPI pins on UT_T1_ESP_FLASH are connected to a external flash
@@ -344,4 +345,6 @@ TEST_CASE("spi master can be used on SPI1", "[spi]")
 
 //TODO: add a case when a non-polling transaction happened in the bus-acquiring time and then release the bus then queue a new trans
 
+#endif
+
 #endif

components/driver/test/test_spi_master.c

@@ -26,6 +26,7 @@
 #include "soc/soc_memory_layout.h"
 #include "driver/spi_common_internal.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 
 const static char TAG[] = "test_spi";
 
@@ -1094,3 +1095,5 @@ TEST_CASE("spi_speed","[spi]")
     master_free_device_bus(spi);
 }
 #endif
+
+#endif

components/driver/test/test_spi_param.c

@@ -6,6 +6,8 @@
 #include "test/test_common_spi.h"
 #include "sdkconfig.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #ifndef MIN
 #define MIN(a, b)((a) > (b)? (b): (a))
 #endif
@@ -1164,3 +1166,5 @@ spitest_param_set_t mode_conf[] = {
 TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "")
 
 #endif
+
+#endif

components/driver/test/test_spi_sio.c

@@ -25,6 +25,7 @@
 
 #include "hal/spi_ll.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 
 /********************************************************************************
  *      Test SIO
@@ -221,3 +222,5 @@ void test_sio_slave(void)
 
 TEST_CASE_MULTIPLE_DEVICES("sio mode", "[spi][test_env=Example_SPI_Multi_device]", test_sio_master, test_sio_slave);
 #endif
+
+#endif

components/driver/test/test_spi_slave.c

@@ -12,6 +12,8 @@
 #include "test/test_common_spi.h"
 #include "esp_rom_gpio.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #ifndef CONFIG_SPIRAM
 //This test should be removed once the timing test is merged.
 
@@ -142,3 +144,5 @@ TEST_CASE("test slave send unaligned","[spi]")
 }
 
 #endif // !CONFIG_SPIRAM
+
+#endif

components/driver/test/test_spi_slave_hd.c

@@ -17,6 +17,7 @@
 #include "unity.h"
 #include "test/test_common_spi.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
 
 #define TEST_DMA_MAX_SIZE    14000
 #define TEST_BUFFER_SIZE 256     ///< buffer size of each wrdma buffer in fifo mode
@@ -573,4 +574,6 @@ TEST_CASE("test spi slave hd continuous mode, master too long", "[spi][spi_slv_h
     master_free_device_bus(spi);
 }
 
-#endif //SOC_SPI_SUPPORT_SLAVE_HD_VER2
+#endif //SOC_SPI_SUPPORT_SLAVE_HD_VER2
+
+#endif

components/driver/test/test_timer.c

@@ -9,6 +9,8 @@
 #include "soc/rtc.h"
 #include "esp_rom_sys.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define TIMER_DIVIDER  16
 #define TIMER_SCALE    (TIMER_BASE_CLK / TIMER_DIVIDER)  /*!< used to calculate counter value */
 #define TIMER_DELTA    0.001
@@ -973,3 +975,5 @@ TEST_CASE_MULTIPLE_STAGES("timer_group software reset test",
         "[intr_status][intr_status = 0]",
         timer_group_test_first_stage,
         timer_group_test_second_stage);
+
+#endif

components/driver/test/test_uart.c

@@ -6,6 +6,8 @@
 #include "esp_log.h"
 #include "esp_system.h"             // for uint32_t esp_random()
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 #define UART_TAG         "Uart"
 #define UART_NUM1        (UART_NUM_1)
 #define BUF_SIZE         (100)
@@ -312,3 +314,5 @@ TEST_CASE("uart tx with ringbuffer test", "[uart]")
     free(rd_data);
     free(wr_data);
 }
+
+#endif

components/driver/test/touch_sensor_test/test_esp32.c

@@ -34,7 +34,7 @@
 #include "soc/rtc_io_struct.h"
 #include "esp_rom_sys.h"
 
-#if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2) // This testcase for ESP32
+#if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2, ESP32S3) // This testcase for ESP32
 
 static const char *TAG = "test_touch";
 

components/driver/test/touch_sensor_test/test_esp32s2.c

@@ -38,7 +38,7 @@
 #include "driver/rtc_io.h"
 #include "esp_rom_sys.h"
 
-#if !DISABLED_FOR_TARGETS(ESP8266, ESP32) // This testcase for ESP32S2
+#if !DISABLED_FOR_TARGETS(ESP8266, ESP32, ESP32S3) // This testcase for ESP32S2
 
 static const char *TAG = "test_touch";
 

components/efuse/test/test_efuse.c

@@ -19,6 +19,8 @@
 #include "esp_rom_efuse.h"
 #include "bootloader_common.h"
 
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
+
 static const char* TAG = "efuse_test";
 
 static void test_read_blob(void)
@@ -858,3 +860,5 @@ TEST_CASE("Test chip_revision APIs return the same value", "[efuse]")
     esp_efuse_utility_update_virt_blocks();
     TEST_ASSERT_EQUAL_INT(esp_efuse_get_chip_ver(), bootloader_common_get_chip_revision());
 }
+
+#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)

components/esp_eth/test/test_emac.c

@@ -35,6 +35,8 @@ static const char *TAG = "esp32_eth_test";
 #define ETH_PING_DURATION_MS (5000)
 #define ETH_PING_END_TIMEOUT_MS (ETH_PING_DURATION_MS * 2)
 
+#define TEST_ICMP_DESTINATION_DOMAIN_NAME "127.0.0.1"
+
 // compute md5 of download file
 static md5_context_t md5_context;
 static uint8_t digest[16];
@@ -343,7 +345,7 @@ TEST_CASE("esp32 ethernet icmp test", "[ethernet][test_env=UT_T2_Ethernet]")
     memset(&hint, 0, sizeof(hint));
     memset(&target_addr, 0, sizeof(target_addr));
     /* convert URL to IP */
-    TEST_ASSERT(getaddrinfo("www.espressif.com", NULL, &hint, &res) == 0);
+    TEST_ASSERT(getaddrinfo(TEST_ICMP_DESTINATION_DOMAIN_NAME, NULL, &hint, &res) == 0);
     struct in_addr addr4 = ((struct sockaddr_in *)(res->ai_addr))->sin_addr;
     inet_addr_to_ip4addr(ip_2_ip4(&target_addr), &addr4);
     freeaddrinfo(res);

components/newlib/test/test_time.c

@@ -9,6 +9,7 @@
 #include "freertos/semphr.h"
 #include "sdkconfig.h"
 #include "soc/rtc.h"
+#include "soc/rtc_cntl_reg.h"
 #include "esp_system.h"
 #include "test_utils.h"
 #include "esp_log.h"
@@ -17,8 +18,13 @@
 
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/clk.h"
+#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/clk.h"
+#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/clk.h"
+#define TARGET_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
 #endif
 
 #if portNUM_PROCESSORS == 2
@@ -32,7 +38,7 @@ TEST_CASE("Reading RTC registers on APP CPU doesn't affect clock", "[newlib]")
         for (int i = 0; i < 200000; ++i) {
             // wait for 20us, reading one of RTC registers
             uint32_t ccount = xthal_get_ccount();
-            while (xthal_get_ccount() - ccount < 20 * CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ) {
+            while (xthal_get_ccount() - ccount < 20 * TARGET_DEFAULT_CPU_FREQ_MHZ) {
                 volatile uint32_t val = REG_READ(RTC_CNTL_STATE0_REG);
                 (void) val;
             }

components/soc/test/test_rtc_clk.c

@@ -17,7 +17,7 @@
 
 extern void rtc_clk_select_rtc_slow_clk(void);
 
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
+#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
 
 #include "esp32/clk.h"
 

components/ulp/test/CMakeLists.txt

@@ -1,3 +1,6 @@
+if(IDF_TARGET STREQUAL "esp32s3")
+    return()
+endif()
 idf_component_register(SRC_DIRS ${IDF_TARGET}
 PRIV_INCLUDE_DIRS .
 PRIV_REQUIRES cmock ulp soc esp_common)

components/wear_levelling/test/test_wl.c

@@ -7,10 +7,12 @@
 #include "freertos/portable.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
-#ifdef CONFIG_IDF_TARGET_ESP32
+#if CONFIG_IDF_TARGET_ESP32
 #include "esp32/clk.h"
-#elif defined(CONFIG_IDF_TARGET_ESP32S2)
+#elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/clk.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/clk.h"
 #endif
 #include "soc/cpu.h"
 #include "esp_rom_sys.h"

docs/en/api-guides/tools/idf-tools-notes.inc

@@ -10,6 +10,11 @@
 .. tool-xtensa-esp32s2-elf-notes
 
 
+---
+
+.. tool-xtensa-esp32s3-elf-notes
+
+
 ---
 
 .. tool-esp32ulp-elf-notes

docs/zh_CN/api-guides/tools/idf-tools-notes.inc

@@ -12,6 +12,11 @@
 .. tool-xtensa-esp32s2-elf-notes
 
 
+---
+
+.. tool-xtensa-esp32s3-elf-notes
+
+
 ---
 
 .. tool-esp32ulp-elf-notes

examples/cxx/experimental/experimental_cpp_component/test/test_cxx_exceptions.cpp

@@ -13,7 +13,7 @@ using namespace idf;
 
 #if CONFIG_IDF_TARGET_ESP32
 #define LEAKS "300"
-#elif CONFIG_IDF_TARGET_ESP32S2
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 #define LEAKS "800"
 #else
 #error "unknown target in CXX tests, can't set leaks threshold"

examples/cxx/experimental/experimental_cpp_component/test/test_i2c.cpp

@@ -20,9 +20,8 @@
 #include <iostream>
 #include "test_utils.h" // unity_send_signal
 
-#include "i2c_cxx.hpp"
-
 #ifdef __cpp_exceptions
+#include "i2c_cxx.hpp"
 
 using namespace std;
 using namespace idf;

tools/ci/config/build.yml

@@ -83,6 +83,11 @@ build_esp_idf_tests_cmake_esp32s2:
   variables:
     IDF_TARGET: esp32s2
 
+build_esp_idf_tests_cmake_esp32s3:
+  extends: .build_esp_idf_tests_cmake
+  variables:
+    IDF_TARGET: esp32s3
+
 .build_examples_template:
   extends: .build_template
   artifacts:

tools/ci/config/target-test.yml

@@ -432,7 +432,7 @@ UT_001:
 
 UT_002:
   extends: .unit_test_template
-  parallel: 12
+  parallel: 13
   tags:
     - ESP32_IDF
     - UT_T1_1

tools/ci/python_packages/ttfw_idf/CIScanTests.py

@@ -8,7 +8,7 @@ from collections import defaultdict
 from find_apps import find_apps
 from find_build_apps import BUILD_SYSTEMS, BUILD_SYSTEM_CMAKE
 from ttfw_idf.IDFAssignTest import ExampleAssignTest, TestAppsAssignTest
-from idf_py_actions.constants import SUPPORTED_TARGETS
+from idf_py_actions.constants import SUPPORTED_TARGETS, PREVIEW_TARGETS
 
 TEST_LABELS = {
     'example_test': 'BOT_LABEL_EXAMPLE_TEST',
@@ -90,6 +90,8 @@ def main():
             if e.errno != errno.EEXIST:
                 raise e
 
+    SUPPORTED_TARGETS.extend(PREVIEW_TARGETS)
+
     if (not build_standalone_apps) and (not build_test_case_apps):
         for target in SUPPORTED_TARGETS:
             output_json([], target, args.build_system, args.output_path)

tools/ci/python_packages/ttfw_idf/IDFAssignTest.py

@@ -17,7 +17,7 @@ except ImportError:
 import gitlab_api
 from tiny_test_fw.Utility import CIAssignTest
 
-from idf_py_actions.constants import SUPPORTED_TARGETS
+from idf_py_actions.constants import SUPPORTED_TARGETS, PREVIEW_TARGETS
 
 IDF_PATH_FROM_ENV = os.getenv('IDF_PATH')
 
@@ -311,6 +311,8 @@ if __name__ == '__main__':
     parser.add_argument('--test-case-file-pattern', help='file name pattern used to find Python test case files')
     args = parser.parse_args()
 
+    SUPPORTED_TARGETS.extend(PREVIEW_TARGETS)
+
     test_case_paths = [os.path.join(IDF_PATH_FROM_ENV, path) if not os.path.isabs(path) else path for path in args.test_case_paths]
     args_list = [test_case_paths, args.config]
     if args.case_group == 'example_test':

tools/find_build_apps/cmake.py

@@ -19,6 +19,7 @@ SUPPORTED_TARGETS_REGEX = re.compile(r'Supported [Tt]argets((?:[\s|]+(?:ESP[0-9A
 FORMAL_TO_USUAL = {
     'ESP32': 'esp32',
     'ESP32-S2': 'esp32s2',
+    'ESP32-S3': 'esp32s3',
 }
 
 
@@ -99,6 +100,7 @@ class CMakeBuildSystem(BuildSystem):
         formal_to_usual = {
             'ESP32': 'esp32',
             'ESP32-S2': 'esp32s2',
+            'ESP32-S3': 'esp32s3',
         }
 
         readme_file_content = BuildSystem._read_readme(app_path)

tools/idf_size.py

@@ -124,6 +124,10 @@ class MemRegions(object):
                 # MemRegDef(0x3FFF8000, 0x4000, MemRegions.DIRAM_ID, 0x40068000),
                 # MemRegDef(0x3FFFC000, 0x4000, MemRegions.DIRAM_ID, 0x4006C000),
             ])
+        elif target == 'esp32s3':
+            return sorted([
+                MemRegDef(0x3FC88000, 0x8000 + 6 * 0x10000, MemRegions.DIRAM_ID, 0x40378000),
+            ])
         else:
             return None
 

tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c

@@ -14,6 +14,8 @@
 #include "esp32/clk.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/clk.h"
+#elif CONFIG_IDF_TARTGET_ESP32S3
+#include "esp32s3/clk.h"
 #endif
 
 #include "unity.h"
@@ -28,7 +30,7 @@ static const char* TAG = "test_ccomp_timer";
 #define CACHE_SIZE              (1 << 15)
 // Only test half due to lack of memory
 #define TEST_SIZE               (CACHE_SIZE / 2) 
-#elif CONFIG_IDF_TARGET_ESP32S2
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 // Default cache configuration - no override specified on
 // test_utils config
 #define CACHE_WAYS              8

tools/unit-test-app/components/test_utils/test/ccomp_timer_test_inst.c

@@ -17,7 +17,7 @@
 #define CACHE_LINE_SIZE         32
 #define CACHE_SIZE              (1 << 15)
 // Only test half due to lack of memory
-#elif CONFIG_IDF_TARGET_ESP32S2
+#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 // Default cache configuration - no override specified on
 // test_utils config
 #define CACHE_WAYS              8

tools/unit-test-app/sdkconfig.defaults.esp32s3

@@ -0,0 +1 @@
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240=y