crypto: also apply cache writeback/invalidate for SPIRAM_USE_MEMMAP

Closes https://github.com/espressif/esp-idf/issues/7944

.gitlab/ci/target-test.yml

@@ -664,7 +664,7 @@ UT_046:
 
 UT_047:
   extends: .unit_test_esp32s2_template
-  parallel: 5
+  parallel: 6
   tags:
     - ESP32S2_IDF
     - UT_T1_1

components/mbedtls/port/aes/dma/esp_aes.c

@@ -80,6 +80,18 @@ static esp_pm_lock_handle_t s_pm_sleep_lock;
 #endif
 #endif
 
+#if SOC_PSRAM_DMA_CAPABLE
+
+#if (CONFIG_ESP32S2_DATA_CACHE_LINE_16B || CONFIG_ESP32S3_DATA_CACHE_LINE_16B)
+#define DCACHE_LINE_SIZE 16
+#elif (CONFIG_ESP32S2_DATA_CACHE_LINE_32B || CONFIG_ESP32S3_DATA_CACHE_LINE_32B)
+#define DCACHE_LINE_SIZE 32
+#elif CONFIG_ESP32S3_DATA_CACHE_LINE_64B
+#define DCACHE_LINE_SIZE 64
+#endif //(CONFIG_ESP32S2_DATA_CACHE_LINE_16B || CONFIG_ESP32S3_DATA_CACHE_LINE_16B)
+
+#endif //SOC_PSRAM_DMA_CAPABLE
+
 static const char *TAG = "esp-aes";
 
 /* These are static due to:
@@ -325,12 +337,12 @@ static int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input,
 
     if (block_bytes > 0) {
         /* Flush cache if input in external ram */
-#if (CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC)
+#if (CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE)
         if (esp_ptr_external_ram(input)) {
             Cache_WriteBack_Addr((uint32_t)input, len);
         }
         if (esp_ptr_external_ram(output)) {
-            if (((intptr_t)(output) & 0xF) != 0) {
+            if ((((intptr_t)(output) & (DCACHE_LINE_SIZE - 1)) != 0) || (block_bytes % DCACHE_LINE_SIZE != 0)) {
                 // Non aligned ext-mem buffer
                 output_needs_realloc = true;
             }
@@ -422,7 +434,7 @@ static int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input,
     aes_hal_transform_dma_start(blocks);
     esp_aes_dma_wait_complete(use_intr, out_desc_tail);
 
-#if (CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC)
+#if (CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE)
     if (block_bytes > 0) {
         if (esp_ptr_external_ram(output)) {
             Cache_Invalidate_Addr((uint32_t)output, block_bytes);

components/mbedtls/port/sha/dma/sha.c

@@ -228,7 +228,7 @@ int esp_sha_dma(esp_sha_type sha_type, const void *input, uint32_t ilen,
         return 0;
     }
 
-#if (CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC)
+#if (CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE)
     if (esp_ptr_external_ram(input)) {
         Cache_WriteBack_Addr((uint32_t)input, ilen);
     }

components/mbedtls/test/test_aes.c

@@ -782,10 +782,10 @@ TEST_CASE("mbedtls OFB, chained DMA descriptors", "[aes]")
 
 
 const uint8_t expected_cipher_ctr_end[] = {
-    0x7e, 0xdf, 0x13, 0xf3, 0x56, 0xef, 0x67, 0x01,
-    0xfc, 0x08, 0x49, 0x62, 0xfa, 0xfe, 0x0c, 0x8b,
-    0x99, 0x39, 0x09, 0x51, 0x2c, 0x9a, 0xd5, 0x48,
-    0x4f, 0x76, 0xa2, 0x19, 0x2c, 0x08, 0x9d, 0x6a,
+    0x93, 0xca, 0xe0, 0x44, 0x96, 0x6d, 0xcb, 0xb2,
+    0xcf, 0x8a, 0x8d, 0x73, 0x8c, 0x6b, 0xfa, 0x4d,
+    0xd6, 0xc4, 0x18, 0x49, 0xdd, 0xc6, 0xbf, 0xc2,
+    0xb9, 0xf0, 0x09, 0x69, 0x45, 0x42, 0xc6, 0x05,
 };
 
 
@@ -795,8 +795,8 @@ void aes_ctr_alignment_test(uint32_t input_buf_caps, uint32_t output_buf_caps)
     uint8_t nonce[16];
     uint8_t key[16];
     uint8_t stream_block[16];
-    size_t SZ = 6000;
-    size_t ALIGNMENT_SIZE_BYTES = 16;
+    size_t SZ = 32*200;
+    size_t ALIGNMENT_SIZE_BYTES = 64;
     memset(nonce, 0x2F, 16);
     memset(key, 0x1E, 16);
 
@@ -854,8 +854,8 @@ void aes_psram_one_buf_ctr_test(void)
     uint8_t nonce[16];
     uint8_t key[16];
     uint8_t stream_block[16];
-    size_t SZ = 6000;
-    size_t ALIGNMENT_SIZE_BYTES = 16;
+    size_t SZ = 32*200;
+    size_t ALIGNMENT_SIZE_BYTES = 32;
     memset(nonce, 0x2F, 16);
     memset(key, 0x1E, 16);