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@@ -182,22 +182,6 @@ menu "ESP32S2-specific"
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help
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The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
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endmenu
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- config SPIRAM_SPIWP_SD3_PIN
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- int "SPI PSRAM WP(SD3) Pin when customising pins via eFuse (read help)"
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- depends on ESPTOOLPY_FLASHMODE_DIO || ESPTOOLPY_FLASHMODE_DOUT
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- range 0 33
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- default 28
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- help
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- This value is ignored unless flash mode is set to DIO or DOUT and the SPI flash pins have been
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- overriden by setting the eFuses SPI_PAD_CONFIG_xxx.
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-
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- Different from esp32 chip, on esp32s2, the WP pin would also be defined in efuse. This value would only
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- be used if the WP pin recorded in efuse SPI_PAD_CONFIG_xxx is invalid.
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-
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- When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set as the value configured in
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- bootloader.
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-
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-
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config SPIRAM_FETCH_INSTRUCTIONS
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bool "Cache fetch instructions from SPI RAM"
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default n
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