Merge branch 'fix/spi_test_memory_layout' into 'master'

test: fix the unit test fail issue under single_core config

See merge request idf/esp-idf!3596

components/soc/esp32/include/soc/soc.h

@@ -286,6 +286,10 @@
 #define SOC_DROM_HIGH   0x3F800000
 #define SOC_IROM_LOW    0x400D0000
 #define SOC_IROM_HIGH   0x40400000
+#define SOC_CACHE_PRO_LOW   0x40070000
+#define SOC_CACHE_PRO_HIGH  0x40078000
+#define SOC_CACHE_APP_LOW   0x40078000
+#define SOC_CACHE_APP_HIGH  0x40080000
 #define SOC_IRAM_LOW    0x40080000
 #define SOC_IRAM_HIGH   0x400A0000
 #define SOC_RTC_IRAM_LOW  0x400C0000

components/soc/esp32/soc_memory_layout.c

@@ -130,9 +130,9 @@ const size_t soc_memory_region_count = sizeof(soc_memory_regions)/sizeof(soc_mem
 
    These are removed from the soc_memory_regions array when heaps are created.
  */
-SOC_RESERVE_MEMORY_REGION(0x40070000, 0x40078000, cpu0_cache);
+SOC_RESERVE_MEMORY_REGION(SOC_CACHE_PRO_LOW, SOC_CACHE_PRO_HIGH, cpu0_cache);
 #ifndef CONFIG_FREERTOS_UNICORE
-SOC_RESERVE_MEMORY_REGION(0x40078000, 0x40080000, cpu1_cache);
+SOC_RESERVE_MEMORY_REGION(SOC_CACHE_APP_LOW, SOC_CACHE_APP_HIGH, cpu1_cache);
 #endif
 
     /* Warning: The ROM stack is located in the 0x3ffe0000 area. We do not specifically disable that area here because

components/soc/include/soc/soc_memory_layout.h

@@ -175,7 +175,11 @@ inline static bool IRAM_ATTR esp_ptr_external_ram(const void *p) {
 }
 
 inline static bool IRAM_ATTR esp_ptr_in_iram(const void *p) {
+#ifndef CONFIG_FREERTOS_UNICORE
     return ((intptr_t)p >= SOC_IRAM_LOW && (intptr_t)p < SOC_IRAM_HIGH);
+#else
+    return ((intptr_t)p >= SOC_CACHE_APP_LOW && (intptr_t)p < SOC_IRAM_HIGH);
+#endif
 }
 
 inline static bool IRAM_ATTR esp_ptr_in_drom(const void *p) {