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@@ -29,6 +29,7 @@
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#include "esp_memory_utils.h"
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#include "hal/dma_types.h"
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#include "hal/gpio_hal.h"
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+#include "hal/cache_hal.h"
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#include "esp_private/gdma.h"
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#include "driver/gpio.h"
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#include "esp_private/periph_ctrl.h"
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@@ -38,6 +39,9 @@
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#include "hal/lcd_hal.h"
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#include "esp_cache.h"
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+#define ALIGN_UP(size, align) (((size) + (align) - 1) & ~((align) - 1))
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+#define ALIGN_DOWN(size, align) ((size) & ~((align) - 1))
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+
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static const char *TAG = "lcd_panel.io.i80";
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typedef struct esp_lcd_i80_bus_t esp_lcd_i80_bus_t;
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@@ -469,9 +473,10 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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trans_desc->user_ctx = i80_device->user_ctx;
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if (esp_ptr_external_ram(color)) {
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+ uint32_t dcache_line_size = cache_hal_get_cache_line_size(CACHE_TYPE_DATA);
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// flush frame buffer from cache to the physical PSRAM
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- // note the esp_cache_msync function will check the alignment of the address and size, and error out if either of them is not matched
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- ESP_RETURN_ON_ERROR(esp_cache_msync((void *)color, color_size, 0), TAG, "flush cache buffer failed");
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+ // note the esp_cache_msync function will check the alignment of the address and size, make sure they're aligned to current cache line size
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+ esp_cache_msync((void *)ALIGN_DOWN((intptr_t)color, dcache_line_size), ALIGN_UP(color_size, dcache_line_size), 0);
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}
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// send transaction to trans_queue
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morris