Merge branch 'feature/move_memory_layout_to_heap' into 'master'

G0: Memory layouts are now part of heap components

Closes IDF-1264

See merge request espressif/esp-idf!14028

components/bootloader_support/CMakeLists.txt

@@ -34,7 +34,8 @@ else()
         "src/idf/bootloader_sha.c")
     set(include_dirs "include")
     set(priv_include_dirs "include_bootloader")
-    set(priv_requires spi_flash mbedtls efuse app_update)
+    # heap is required for `heap_memory_layout.h` header
+    set(priv_requires spi_flash mbedtls efuse app_update heap)
 endif()
 
 if(BOOTLOADER_BUILD)

components/bootloader_support/src/bootloader_common_loader.c

@@ -22,7 +22,7 @@
 #include "soc/gpio_periph.h"
 #include "soc/rtc.h"
 #include "soc/efuse_reg.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 #include "hal/gpio_ll.h"
 #include "esp_image_format.h"
 #include "bootloader_sha.h"
@@ -141,7 +141,8 @@ esp_err_t bootloader_common_get_partition_description(const esp_partition_pos_t
 
 rtc_retain_mem_t *const rtc_retain_mem = (rtc_retain_mem_t *)RTC_RETAIN_MEM_ADDR;
 
-#if !IS_BOOTLOADER_BUILD
+#ifndef BOOTLOADER_BUILD
+#include "heap_memory_layout.h"
 /* The app needs to be told this memory is reserved, important if configured to use RTC memory as heap.
 
    Note that keeping this macro here only works when other symbols in this file are referenced by the app, as

components/bootloader_support/src/esp_image_format.c

@@ -18,7 +18,7 @@
 #include "bootloader_util.h"
 #include "bootloader_common.h"
 #include "esp_rom_sys.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32S2

components/bt/include/esp32/include/esp_bt.h

@@ -25,6 +25,38 @@
 extern "C" {
 #endif
 
+#ifdef CONFIG_BT_ENABLED
+
+#define SOC_MEM_BT_DATA_START               0x3ffae6e0
+#define SOC_MEM_BT_DATA_END                 0x3ffaff10
+#define SOC_MEM_BT_EM_START                 0x3ffb0000
+#define SOC_MEM_BT_EM_END                   0x3ffb7cd8
+#define SOC_MEM_BT_EM_BTDM0_START           0x3ffb0000
+#define SOC_MEM_BT_EM_BTDM0_END             0x3ffb09a8
+#define SOC_MEM_BT_EM_BLE_START             0x3ffb09a8
+#define SOC_MEM_BT_EM_BLE_END               0x3ffb1ddc
+#define SOC_MEM_BT_EM_BTDM1_START           0x3ffb1ddc
+#define SOC_MEM_BT_EM_BTDM1_END             0x3ffb2730
+#define SOC_MEM_BT_EM_BREDR_START           0x3ffb2730
+#define SOC_MEM_BT_EM_BREDR_NO_SYNC_END     0x3ffb6388  //Not calculate with synchronize connection support
+#define SOC_MEM_BT_EM_BREDR_END             0x3ffb7cd8  //Calculate with synchronize connection support
+#define SOC_MEM_BT_EM_SYNC0_START           0x3ffb6388
+#define SOC_MEM_BT_EM_SYNC0_END             0x3ffb6bf8
+#define SOC_MEM_BT_EM_SYNC1_START           0x3ffb6bf8
+#define SOC_MEM_BT_EM_SYNC1_END             0x3ffb7468
+#define SOC_MEM_BT_EM_SYNC2_START           0x3ffb7468
+#define SOC_MEM_BT_EM_SYNC2_END             0x3ffb7cd8
+#define SOC_MEM_BT_BSS_START                0x3ffb8000
+#define SOC_MEM_BT_BSS_END                  0x3ffb9a20
+#define SOC_MEM_BT_MISC_START               0x3ffbdb28
+#define SOC_MEM_BT_MISC_END                 0x3ffbdb5c
+
+#define SOC_MEM_BT_EM_PER_SYNC_SIZE         0x870
+
+#define SOC_MEM_BT_EM_BREDR_REAL_END        (SOC_MEM_BT_EM_BREDR_NO_SYNC_END + CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF * SOC_MEM_BT_EM_PER_SYNC_SIZE)
+
+#endif //CONFIG_BT_ENABLED
+
 #define ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL  0x20200622
 
 /**

components/esp_hw_support/include/soc/compare_set.h

@@ -17,7 +17,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/cpu.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 #if __XTENSA__
 #include "xtensa/xtruntime.h"

components/esp_hw_support/include/soc/spinlock.h

@@ -18,7 +18,6 @@
 #include "sdkconfig.h"
 #include "soc/cpu.h"
 #include "hal/cpu_hal.h"
-#include "soc/soc_memory_layout.h"
 #include "soc/compare_set.h"
 
 #if __XTENSA__

components/hal/include/hal/spi_flash_hal.h

@@ -25,7 +25,7 @@
 #include "hal/spi_flash_ll.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
-#include "soc/soc_memory_layout.h"
+#include "soc/soc_memory_types.h"
 
 /* Hardware host-specific constants */
 #define SPI_FLASH_HAL_MAX_WRITE_BYTES 64

components/heap/CMakeLists.txt

@@ -19,6 +19,11 @@ if(CONFIG_HEAP_TRACING_STANDALONE)
         -Wno-frame-address)
 endif()
 
+# Add SoC memory layout to the sources
+list(APPEND srcs "port/memory_layout_utils.c")
+list(APPEND srcs "port/${target}/memory_layout.c")
+
+
 idf_component_register(SRCS "${srcs}"
                     INCLUDE_DIRS include
                     LDFRAGMENTS linker.lf

components/heap/component.mk

@@ -2,7 +2,9 @@
 # Component Makefile
 #
 
-COMPONENT_OBJS := heap_caps_init.o heap_caps.o multi_heap.o heap_tlsf.o
+COMPONENT_SRCDIRS := . port port/$(IDF_TARGET)
+COMPONENT_ADD_INCLUDEDIRS := include
+COMPONENT_OBJS := heap_caps_init.o heap_caps.o multi_heap.o heap_tlsf.o port/memory_layout_utils.o port/$(IDF_TARGET)/memory_layout.o
 
 ifndef CONFIG_HEAP_POISONING_DISABLED
 COMPONENT_OBJS += multi_heap_poisoning.o

components/heap/heap_caps_init.c

@@ -20,7 +20,7 @@
 #include "multi_heap.h"
 #include "multi_heap_platform.h"
 #include "esp_heap_caps_init.h"
-#include "soc/soc_memory_layout.h"
+#include "heap_memory_layout.h"
 
 static const char *TAG = "heap_init";
 

components/heap/include/heap_memory_layout.h

@@ -0,0 +1,113 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+
+#define SOC_MEMORY_TYPE_NO_PRIOS 3
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Type descriptor holds a description for a particular type of memory on a particular SoC.
+ */
+typedef struct {
+    const char *name;  ///< Name of this memory type
+    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
+    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
+    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
+} soc_memory_type_desc_t;
+
+/* Constant table of tag descriptors for all this SoC's tags */
+extern const soc_memory_type_desc_t soc_memory_types[];
+extern const size_t soc_memory_type_count;
+
+/* Region descriptor holds a description for a particular region of memory on a particular SoC.
+ */
+typedef struct {
+    intptr_t start;  ///< Start address of the region
+    size_t size;            ///< Size of the region in bytes
+    size_t type;             ///< Type of the region (index into soc_memory_types array)
+    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
+} soc_memory_region_t;
+
+extern const soc_memory_region_t soc_memory_regions[];
+extern const size_t soc_memory_region_count;
+
+/* Region descriptor holds a description for a particular region of
+   memory reserved on this SoC for a particular use (ie not available
+   for stack/heap usage.) */
+typedef struct {
+    intptr_t start;
+    intptr_t end;
+} soc_reserved_region_t;
+
+/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
+ * for a particular purpose.
+ *
+ * Usually used to mark out memory addresses needed for hardware or ROM code
+ * purposes.
+ *
+ * Don't call this macro from user code which can use normal C static allocation
+ * instead.
+ *
+ * @param START Start address to be reserved.
+ * @param END One after the address of the last byte to be reserved. (ie length of
+ * the reserved region is (END - START) in bytes.
+ * @param NAME Name for the reserved region. Must be a valid variable name,
+ * unique to this source file.
+ */
+#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
+    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
+    static soc_reserved_region_t reserved_region_##NAME = { START, END };
+
+/* Return available memory regions for this SoC. Each available memory
+ * region is a contiguous piece of memory which is not being used by
+ * static data, used by ROM code, or reserved by a component using
+ * the SOC_RESERVE_MEMORY_REGION() macro.
+ *
+ * This result is soc_memory_regions[] minus all regions reserved
+ * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
+ * some regions up.)
+ *
+ * At startup, all available memory returned by this function is
+ * registered as heap space.
+ *
+ * @note OS-level startup function only, not recommended to call from
+ * app code.
+ *
+ * @param regions Pointer to an array for reading available regions into.
+ * Size of the array should be at least the result of
+ * soc_get_available_memory_region_max_count(). Entries in the array
+ * will be ordered by memory address.
+ *
+ * @return Number of entries copied to 'regions'. Will be no greater than
+ * the result of soc_get_available_memory_region_max_count().
+ */
+size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
+
+/* Return the maximum number of available memory regions which could be
+ * returned by soc_get_available_memory_regions(). Used to size the
+ * array passed to that function.
+ */
+size_t soc_get_available_memory_region_max_count(void);
+
+
+#ifdef __cplusplus
+}
+#endif

components/heap/include/soc/soc_memory_layout.h

@@ -0,0 +1,21 @@
+// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/**
+ * Compatibility header file.
+ */
+#pragma once
+
+#include "heap_memory_layout.h"
+#include "soc/soc_memory_types.h"

components/soc/esp32/soc_memory_layout.c → components/heap/port/esp32/memory_layout.c

@@ -17,7 +17,7 @@
 #include <stdint.h>
 
 #include "soc/soc.h"
-#include "soc/soc_memory_layout.h"
+#include "heap_memory_layout.h"
 #include "esp_heap_caps.h"
 #include "sdkconfig.h"
 

components/soc/esp32c3/soc_memory_layout.c → components/heap/port/esp32c3/memory_layout.c

@@ -18,7 +18,7 @@
 #include "esp_attr.h"
 #include "sdkconfig.h"
 #include "soc/soc.h"
-#include "soc/soc_memory_layout.h"
+#include "heap_memory_layout.h"
 #include "esp_heap_caps.h"
 
 /**

components/soc/esp32h2/soc_memory_layout.c → components/heap/port/esp32h2/memory_layout.c

@@ -18,7 +18,7 @@
 #include "esp_attr.h"
 #include "sdkconfig.h"
 #include "soc/soc.h"
-#include "soc/soc_memory_layout.h"
+#include "heap_memory_layout.h"
 #include "esp_heap_caps.h"
 
 /**

components/soc/esp32s2/soc_memory_layout.c → components/heap/port/esp32s2/memory_layout.c

@@ -18,7 +18,7 @@
 
 #include "sdkconfig.h"
 #include "soc/soc.h"
-#include "soc/soc_memory_layout.h"
+#include "heap_memory_layout.h"
 #include "esp_heap_caps.h"
 
 /* Memory layout for ESP32 SoC */

components/soc/esp32s3/soc_memory_layout.c → components/heap/port/esp32s3/memory_layout.c

@@ -18,7 +18,7 @@
 #include "sdkconfig.h"
 #include "esp_attr.h"
 #include "soc/soc.h"
-#include "soc/soc_memory_layout.h"
+#include "heap_memory_layout.h"
 #include "esp_heap_caps.h"
 
 /**

components/log/log_buffers.c

@@ -8,7 +8,7 @@
 #include <ctype.h>
 #include <string.h>
 #include "esp_log.h"
-#include "soc/soc_memory_layout.h"  // for esp_ptr_byte_accessible
+#include "soc/soc_memory_types.h"  // for esp_ptr_byte_accessible
 
 
 //print number of bytes per line for esp_log_buffer_char and esp_log_buffer_hex

components/soc/CMakeLists.txt

@@ -1,6 +1,5 @@
 idf_component_register(SRCS "lldesc.c"
                             "soc_include_legacy_warn.c"
-                            "memory_layout_utils.c"
                        INCLUDE_DIRS include
                        LDFRAGMENTS "linker.lf")
 

components/soc/esp32/CMakeLists.txt

@@ -13,7 +13,6 @@ set(srcs
     "sdio_slave_periph.c"
     "sdmmc_periph.c"
     "sigmadelta_periph.c"
-    "soc_memory_layout.c"
     "spi_periph.c"
     "timer_periph.c"
     "touch_sensor_periph.c"

components/soc/esp32c3/CMakeLists.txt

@@ -6,9 +6,7 @@ set(srcs
     "spi_periph.c"
     "ledc_periph.c"
     "rmt_periph.c"
-    "soc_memory_layout.c"
     "sigmadelta_periph.c"
-    "soc_memory_layout.c"
     "i2s_periph.c"
     "i2c_periph.c"
     "uart_periph.c"

components/soc/esp32h2/CMakeLists.txt

@@ -6,9 +6,7 @@ set(srcs
     "spi_periph.c"
     "ledc_periph.c"
     "rmt_periph.c"
-    "soc_memory_layout.c"
     "sigmadelta_periph.c"
-    "soc_memory_layout.c"
     "i2s_periph.c"
     "i2c_periph.c"
     "uart_periph.c"

components/soc/esp32s2/CMakeLists.txt

@@ -11,7 +11,6 @@ set(srcs
     "rmt_periph.c"
     "rtc_io_periph.c"
     "sigmadelta_periph.c"
-    "soc_memory_layout.c"
     "spi_periph.c"
     "timer_periph.c"
     "touch_sensor_periph.c"

components/soc/esp32s2/include/soc/soc_caps.h

@@ -57,6 +57,7 @@
 #define SOC_CACHE_SUPPORT_WRAP          1
 #define SOC_FLASH_ENCRYPTION_XTS_AES      1
 #define SOC_FLASH_ENCRYPTION_XTS_AES_256 1
+#define SOC_PSRAM_DMA_CAPABLE           1
 
 /*-------------------------- ADC CAPS ----------------------------------------*/
 #define SOC_ADC_PERIPH_NUM              (2)

components/soc/esp32s3/CMakeLists.txt

@@ -15,7 +15,6 @@ set(srcs
     "sdio_slave_periph.c"
     "sdmmc_periph.c"
     "sigmadelta_periph.c"
-    "soc_memory_layout.c"
     "spi_periph.c"
     "timer_periph.c"
     "touch_sensor_periph.c"

components/soc/esp32s3/include/soc/soc_caps.h

@@ -25,7 +25,7 @@
 #define SOC_SDMMC_HOST_SUPPORTED        1
 #define SOC_FLASH_ENCRYPTION_XTS_AES      1
 #define SOC_FLASH_ENCRYPTION_XTS_AES_256 1
-
+#define SOC_PSRAM_DMA_CAPABLE           1
 
 /*-------------------------- ADC CAPS ----------------------------------------*/
 #define SOC_ADC_PERIPH_NUM              (2)

components/soc/include/soc/soc_memory_layout.h → components/soc/include/soc/soc_memory_types.h

@@ -22,124 +22,9 @@
 #include "sdkconfig.h"
 #include "esp_attr.h"
 
-#ifdef CONFIG_BT_ENABLED
-
-#define SOC_MEM_BT_DATA_START               0x3ffae6e0
-#define SOC_MEM_BT_DATA_END                 0x3ffaff10
-#define SOC_MEM_BT_EM_START                 0x3ffb0000
-#define SOC_MEM_BT_EM_END                   0x3ffb7cd8
-#define SOC_MEM_BT_EM_BTDM0_START           0x3ffb0000
-#define SOC_MEM_BT_EM_BTDM0_END             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_START             0x3ffb09a8
-#define SOC_MEM_BT_EM_BLE_END               0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_START           0x3ffb1ddc
-#define SOC_MEM_BT_EM_BTDM1_END             0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_START           0x3ffb2730
-#define SOC_MEM_BT_EM_BREDR_NO_SYNC_END     0x3ffb6388  //Not calculate with synchronize connection support
-#define SOC_MEM_BT_EM_BREDR_END             0x3ffb7cd8  //Calculate with synchronize connection support
-#define SOC_MEM_BT_EM_SYNC0_START           0x3ffb6388
-#define SOC_MEM_BT_EM_SYNC0_END             0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_START           0x3ffb6bf8
-#define SOC_MEM_BT_EM_SYNC1_END             0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_START           0x3ffb7468
-#define SOC_MEM_BT_EM_SYNC2_END             0x3ffb7cd8
-#define SOC_MEM_BT_BSS_START                0x3ffb8000
-#define SOC_MEM_BT_BSS_END                  0x3ffb9a20
-#define SOC_MEM_BT_MISC_START               0x3ffbdb28
-#define SOC_MEM_BT_MISC_END                 0x3ffbdb5c
-
-#define SOC_MEM_BT_EM_PER_SYNC_SIZE         0x870
-
-#define SOC_MEM_BT_EM_BREDR_REAL_END        (SOC_MEM_BT_EM_BREDR_NO_SYNC_END + CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF * SOC_MEM_BT_EM_PER_SYNC_SIZE)
-
-#endif //CONFIG_BT_ENABLED
-
-#define SOC_MEMORY_TYPE_NO_PRIOS 3
-
-/* Type descriptor holds a description for a particular type of memory on a particular SoC.
- */
-typedef struct {
-    const char *name;  ///< Name of this memory type
-    uint32_t caps[SOC_MEMORY_TYPE_NO_PRIOS]; ///< Capabilities for this memory type (as a prioritised set)
-    bool aliased_iram;   ///< If true, this is data memory that is is also mapped in IRAM
-    bool startup_stack; ///< If true, memory of this type is used for ROM stack during startup
-} soc_memory_type_desc_t;
-
-/* Constant table of tag descriptors for all this SoC's tags */
-extern const soc_memory_type_desc_t soc_memory_types[];
-extern const size_t soc_memory_type_count;
-
-/* Region descriptor holds a description for a particular region of memory on a particular SoC.
- */
-typedef struct
-{
-    intptr_t start;  ///< Start address of the region
-    size_t size;            ///< Size of the region in bytes
-    size_t type;             ///< Type of the region (index into soc_memory_types array)
-    intptr_t iram_address; ///< If non-zero, is equivalent address in IRAM
-} soc_memory_region_t;
-
-extern const soc_memory_region_t soc_memory_regions[];
-extern const size_t soc_memory_region_count;
-
-/* Region descriptor holds a description for a particular region of
-   memory reserved on this SoC for a particular use (ie not available
-   for stack/heap usage.) */
-typedef struct
-{
-    intptr_t start;
-    intptr_t end;
-} soc_reserved_region_t;
-
-/* Use this macro to reserved a fixed region of RAM (hardcoded addresses)
- * for a particular purpose.
- *
- * Usually used to mark out memory addresses needed for hardware or ROM code
- * purposes.
- *
- * Don't call this macro from user code which can use normal C static allocation
- * instead.
- *
- * @param START Start address to be reserved.
- * @param END One after the address of the last byte to be reserved. (ie length of
- * the reserved region is (END - START) in bytes.
- * @param NAME Name for the reserved region. Must be a valid variable name,
- * unique to this source file.
- */
-#define SOC_RESERVE_MEMORY_REGION(START, END, NAME)     \
-    __attribute__((section(".reserved_memory_address"))) __attribute__((used)) \
-    static soc_reserved_region_t reserved_region_##NAME = { START, END };
-
-/* Return available memory regions for this SoC. Each available memory
- * region is a contiguous piece of memory which is not being used by
- * static data, used by ROM code, or reserved by a component using
- * the SOC_RESERVE_MEMORY_REGION() macro.
- *
- * This result is soc_memory_regions[] minus all regions reserved
- * via the SOC_RESERVE_MEMORY_REGION() macro (which may also split
- * some regions up.)
- *
- * At startup, all available memory returned by this function is
- * registered as heap space.
- *
- * @note OS-level startup function only, not recommended to call from
- * app code.
- *
- * @param regions Pointer to an array for reading available regions into.
- * Size of the array should be at least the result of
- * soc_get_available_memory_region_max_count(). Entries in the array
- * will be ordered by memory address.
- *
- * @return Number of entries copied to 'regions'. Will be no greater than
- * the result of soc_get_available_memory_region_max_count().
- */
-size_t soc_get_available_memory_regions(soc_memory_region_t *regions);
-
-/* Return the maximum number of available memory regions which could be
- * returned by soc_get_available_memory_regions(). Used to size the
- * array passed to that function.
- */
-size_t soc_get_available_memory_region_max_count(void);
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 {
@@ -148,7 +33,7 @@ inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
 
 inline static bool IRAM_ATTR esp_ptr_dma_ext_capable(const void *p)
 {
-#if CONFIG_IDF_TARGET_ESP32S2  || CONFIG_IDF_TARGET_ESP32S3
+#ifdef SOC_PSRAM_DMA_CAPABLE
     return (intptr_t)p >= SOC_DMA_EXT_LOW && (intptr_t)p < SOC_DMA_EXT_HIGH;
 #else
     return false;
@@ -302,3 +187,7 @@ inline static bool IRAM_ATTR esp_stack_ptr_is_sane(uint32_t sp)
 #endif
         ;
 }
+
+#ifdef __cplusplus
+}
+#endif