soc: regenerate modem header with regtool

components/soc/esp32c6/include/modem/modem_lpcon_reg.h

@@ -1,7 +1,7 @@
-/*
+/**
  * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0
+ *  SPDX-License-Identifier: Apache-2.0
  */
 #pragma once
 
@@ -11,373 +11,372 @@
 extern "C" {
 #endif
 
-#define MODEM_LPCON_TEST_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x0)
-/* MODEM_LPCON_CLK_DEBUG_ENA : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_DEBUG_ENA    (BIT(1))
-#define MODEM_LPCON_CLK_DEBUG_ENA_M  (BIT(1))
-#define MODEM_LPCON_CLK_DEBUG_ENA_V  0x1
-#define MODEM_LPCON_CLK_DEBUG_ENA_S  1
-/* MODEM_LPCON_CLK_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_TEST_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x0)
+/* MODEM_LPCON_CLK_EN : R/W; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_CLK_EN    (BIT(0))
-#define MODEM_LPCON_CLK_EN_M  (BIT(0))
-#define MODEM_LPCON_CLK_EN_V  0x1
+#define MODEM_LPCON_CLK_EN_M  (MODEM_LPCON_CLK_EN_V << MODEM_LPCON_CLK_EN_S)
+#define MODEM_LPCON_CLK_EN_V  0x00000001U
 #define MODEM_LPCON_CLK_EN_S  0
+/* MODEM_LPCON_CLK_DEBUG_ENA : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_DEBUG_ENA    (BIT(1))
+#define MODEM_LPCON_CLK_DEBUG_ENA_M  (MODEM_LPCON_CLK_DEBUG_ENA_V << MODEM_LPCON_CLK_DEBUG_ENA_S)
+#define MODEM_LPCON_CLK_DEBUG_ENA_V  0x00000001U
+#define MODEM_LPCON_CLK_DEBUG_ENA_S  1
 
-#define MODEM_LPCON_LP_TIMER_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x4)
-/* MODEM_LPCON_CLK_LP_TIMER_DIV_NUM : R/W ;bitpos:[15:4] ;default: 12'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM    0x00000FFF
-#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_M  ((MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_V)<<(MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_S))
-#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_V  0xFFF
-#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_S  4
-/* MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K    (BIT(3))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_M  (BIT(3))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_V  0x1
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_S  3
-/* MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL    (BIT(2))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_M  (BIT(2))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_V  0x1
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_S  2
-/* MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST    (BIT(1))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_M  (BIT(1))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_V  0x1
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_S  1
-/* MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_LP_TIMER_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x4)
+/* MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW : R/W; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW    (BIT(0))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_M  (BIT(0))
-#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_V  0x1
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_M  (MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_V << MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_S)
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_V  0x00000001U
 #define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_SLOW_S  0
+/* MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST    (BIT(1))
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_M  (MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_V << MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_S)
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_V  0x00000001U
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_OSC_FAST_S  1
+/* MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL : R/W; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL    (BIT(2))
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_M  (MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_V << MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_S)
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_V  0x00000001U
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL_S  2
+/* MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K    (BIT(3))
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_M  (MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_V << MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_S)
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_V  0x00000001U
+#define MODEM_LPCON_CLK_LP_TIMER_SEL_XTAL32K_S  3
+/* MODEM_LPCON_CLK_LP_TIMER_DIV_NUM : R/W; bitpos: [15:4]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM    0x00000FFFU
+#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_M  (MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_V << MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_S)
+#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_V  0x00000FFFU
+#define MODEM_LPCON_CLK_LP_TIMER_DIV_NUM_S  4
 
-#define MODEM_LPCON_COEX_LP_CLK_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x8)
-/* MODEM_LPCON_CLK_COEX_LP_DIV_NUM : R/W ;bitpos:[15:4] ;default: 12'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM    0x00000FFF
-#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_M  ((MODEM_LPCON_CLK_COEX_LP_DIV_NUM_V)<<(MODEM_LPCON_CLK_COEX_LP_DIV_NUM_S))
-#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_V  0xFFF
-#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_S  4
-/* MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K    (BIT(3))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_M  (BIT(3))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_V  0x1
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_S  3
-/* MODEM_LPCON_CLK_COEX_LP_SEL_XTAL : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL    (BIT(2))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_M  (BIT(2))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_V  0x1
-#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_S  2
-/* MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST    (BIT(1))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_M  (BIT(1))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_V  0x1
-#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_S  1
-/* MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_COEX_LP_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x8)
+/* MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW : R/W; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW    (BIT(0))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_M  (BIT(0))
-#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_V  0x1
+#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_M  (MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_V << MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_S)
+#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_V  0x00000001U
 #define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_SLOW_S  0
+/* MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST    (BIT(1))
+#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_M  (MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_V << MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_S)
+#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_V  0x00000001U
+#define MODEM_LPCON_CLK_COEX_LP_SEL_OSC_FAST_S  1
+/* MODEM_LPCON_CLK_COEX_LP_SEL_XTAL : R/W; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL    (BIT(2))
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_M  (MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_V << MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_S)
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_V  0x00000001U
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL_S  2
+/* MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K    (BIT(3))
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_M  (MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_V << MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_S)
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_V  0x00000001U
+#define MODEM_LPCON_CLK_COEX_LP_SEL_XTAL32K_S  3
+/* MODEM_LPCON_CLK_COEX_LP_DIV_NUM : R/W; bitpos: [15:4]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM    0x00000FFFU
+#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_M  (MODEM_LPCON_CLK_COEX_LP_DIV_NUM_V << MODEM_LPCON_CLK_COEX_LP_DIV_NUM_S)
+#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_V  0x00000FFFU
+#define MODEM_LPCON_CLK_COEX_LP_DIV_NUM_S  4
 
-#define MODEM_LPCON_WIFI_LP_CLK_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0xC)
-/* MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM : R/W ;bitpos:[15:4] ;default: 12'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM    0x00000FFF
-#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_M  ((MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_V)<<(MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_S))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_V  0xFFF
-#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_S  4
-/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K    (BIT(3))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_M  (BIT(3))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_V  0x1
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_S  3
-/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL    (BIT(2))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_M  (BIT(2))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_V  0x1
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_S  2
-/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST    (BIT(1))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_M  (BIT(1))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_V  0x1
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_S  1
-/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_WIFI_LP_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0xc)
+/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW : R/W; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW    (BIT(0))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_M  (BIT(0))
-#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_V  0x1
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_M  (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_S)
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_V  0x00000001U
 #define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_SLOW_S  0
+/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST    (BIT(1))
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_M  (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_S)
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_V  0x00000001U
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_OSC_FAST_S  1
+/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL : R/W; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL    (BIT(2))
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_M  (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_S)
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_V  0x00000001U
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL_S  2
+/* MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K    (BIT(3))
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_M  (MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_V << MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_S)
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_V  0x00000001U
+#define MODEM_LPCON_CLK_WIFIPWR_LP_SEL_XTAL32K_S  3
+/* MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM : R/W; bitpos: [15:4]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM    0x00000FFFU
+#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_M  (MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_V << MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_S)
+#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_V  0x00000FFFU
+#define MODEM_LPCON_CLK_WIFIPWR_LP_DIV_NUM_S  4
 
-#define MODEM_LPCON_I2C_MST_CLK_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x10)
-/* MODEM_LPCON_CLK_I2C_MST_SEL_160M : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_I2C_MST_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x10)
+/* MODEM_LPCON_CLK_I2C_MST_SEL_160M : R/W; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_CLK_I2C_MST_SEL_160M    (BIT(0))
-#define MODEM_LPCON_CLK_I2C_MST_SEL_160M_M  (BIT(0))
-#define MODEM_LPCON_CLK_I2C_MST_SEL_160M_V  0x1
+#define MODEM_LPCON_CLK_I2C_MST_SEL_160M_M  (MODEM_LPCON_CLK_I2C_MST_SEL_160M_V << MODEM_LPCON_CLK_I2C_MST_SEL_160M_S)
+#define MODEM_LPCON_CLK_I2C_MST_SEL_160M_V  0x00000001U
 #define MODEM_LPCON_CLK_I2C_MST_SEL_160M_S  0
 
-#define MODEM_LPCON_MODEM_32K_CLK_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x14)
-/* MODEM_LPCON_CLK_MODEM_32K_SEL : R/W ;bitpos:[1:0] ;default: 2'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_MODEM_32K_SEL    0x00000003
-#define MODEM_LPCON_CLK_MODEM_32K_SEL_M  ((MODEM_LPCON_CLK_MODEM_32K_SEL_V)<<(MODEM_LPCON_CLK_MODEM_32K_SEL_S))
-#define MODEM_LPCON_CLK_MODEM_32K_SEL_V  0x3
+#define MODEM_LPCON_MODEM_32K_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x14)
+/* MODEM_LPCON_CLK_MODEM_32K_SEL : R/W; bitpos: [1:0]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_MODEM_32K_SEL    0x00000003U
+#define MODEM_LPCON_CLK_MODEM_32K_SEL_M  (MODEM_LPCON_CLK_MODEM_32K_SEL_V << MODEM_LPCON_CLK_MODEM_32K_SEL_S)
+#define MODEM_LPCON_CLK_MODEM_32K_SEL_V  0x00000003U
 #define MODEM_LPCON_CLK_MODEM_32K_SEL_S  0
 
-#define MODEM_LPCON_CLK_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x18)
-/* MODEM_LPCON_CLK_LP_TIMER_EN : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_LP_TIMER_EN    (BIT(3))
-#define MODEM_LPCON_CLK_LP_TIMER_EN_M  (BIT(3))
-#define MODEM_LPCON_CLK_LP_TIMER_EN_V  0x1
-#define MODEM_LPCON_CLK_LP_TIMER_EN_S  3
-/* MODEM_LPCON_CLK_I2C_MST_EN : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_I2C_MST_EN    (BIT(2))
-#define MODEM_LPCON_CLK_I2C_MST_EN_M  (BIT(2))
-#define MODEM_LPCON_CLK_I2C_MST_EN_V  0x1
-#define MODEM_LPCON_CLK_I2C_MST_EN_S  2
-/* MODEM_LPCON_CLK_COEX_EN : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_COEX_EN    (BIT(1))
-#define MODEM_LPCON_CLK_COEX_EN_M  (BIT(1))
-#define MODEM_LPCON_CLK_COEX_EN_V  0x1
-#define MODEM_LPCON_CLK_COEX_EN_S  1
-/* MODEM_LPCON_CLK_WIFIPWR_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_CLK_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x18)
+/* MODEM_LPCON_CLK_WIFIPWR_EN : R/W; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_CLK_WIFIPWR_EN    (BIT(0))
-#define MODEM_LPCON_CLK_WIFIPWR_EN_M  (BIT(0))
-#define MODEM_LPCON_CLK_WIFIPWR_EN_V  0x1
+#define MODEM_LPCON_CLK_WIFIPWR_EN_M  (MODEM_LPCON_CLK_WIFIPWR_EN_V << MODEM_LPCON_CLK_WIFIPWR_EN_S)
+#define MODEM_LPCON_CLK_WIFIPWR_EN_V  0x00000001U
 #define MODEM_LPCON_CLK_WIFIPWR_EN_S  0
+/* MODEM_LPCON_CLK_COEX_EN : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_COEX_EN    (BIT(1))
+#define MODEM_LPCON_CLK_COEX_EN_M  (MODEM_LPCON_CLK_COEX_EN_V << MODEM_LPCON_CLK_COEX_EN_S)
+#define MODEM_LPCON_CLK_COEX_EN_V  0x00000001U
+#define MODEM_LPCON_CLK_COEX_EN_S  1
+/* MODEM_LPCON_CLK_I2C_MST_EN : R/W; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_I2C_MST_EN    (BIT(2))
+#define MODEM_LPCON_CLK_I2C_MST_EN_M  (MODEM_LPCON_CLK_I2C_MST_EN_V << MODEM_LPCON_CLK_I2C_MST_EN_S)
+#define MODEM_LPCON_CLK_I2C_MST_EN_V  0x00000001U
+#define MODEM_LPCON_CLK_I2C_MST_EN_S  2
+/* MODEM_LPCON_CLK_LP_TIMER_EN : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_LP_TIMER_EN    (BIT(3))
+#define MODEM_LPCON_CLK_LP_TIMER_EN_M  (MODEM_LPCON_CLK_LP_TIMER_EN_V << MODEM_LPCON_CLK_LP_TIMER_EN_S)
+#define MODEM_LPCON_CLK_LP_TIMER_EN_V  0x00000001U
+#define MODEM_LPCON_CLK_LP_TIMER_EN_S  3
 
-#define MODEM_LPCON_CLK_CONF_FORCE_ON_REG          (DR_REG_MODEM_LPCON_BASE + 0x1C)
-/* MODEM_LPCON_CLK_DC_MEM_FO : R/W ;bitpos:[9] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_DC_MEM_FO    (BIT(9))
-#define MODEM_LPCON_CLK_DC_MEM_FO_M  (BIT(9))
-#define MODEM_LPCON_CLK_DC_MEM_FO_V  0x1
-#define MODEM_LPCON_CLK_DC_MEM_FO_S  9
-/* MODEM_LPCON_CLK_AGC_MEM_FO : R/W ;bitpos:[8] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_AGC_MEM_FO    (BIT(8))
-#define MODEM_LPCON_CLK_AGC_MEM_FO_M  (BIT(8))
-#define MODEM_LPCON_CLK_AGC_MEM_FO_V  0x1
-#define MODEM_LPCON_CLK_AGC_MEM_FO_S  8
-/* MODEM_LPCON_CLK_PBUS_MEM_FO : R/W ;bitpos:[7] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_PBUS_MEM_FO    (BIT(7))
-#define MODEM_LPCON_CLK_PBUS_MEM_FO_M  (BIT(7))
-#define MODEM_LPCON_CLK_PBUS_MEM_FO_V  0x1
-#define MODEM_LPCON_CLK_PBUS_MEM_FO_S  7
-/* MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO : R/W ;bitpos:[6] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO    (BIT(6))
-#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_M  (BIT(6))
-#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_V  0x1
-#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_S  6
-/* MODEM_LPCON_CLK_I2C_MST_MEM_FO : R/W ;bitpos:[5] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_I2C_MST_MEM_FO    (BIT(5))
-#define MODEM_LPCON_CLK_I2C_MST_MEM_FO_M  (BIT(5))
-#define MODEM_LPCON_CLK_I2C_MST_MEM_FO_V  0x1
-#define MODEM_LPCON_CLK_I2C_MST_MEM_FO_S  5
-/* MODEM_LPCON_CLK_BCMEM_FO : R/W ;bitpos:[4] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_BCMEM_FO    (BIT(4))
-#define MODEM_LPCON_CLK_BCMEM_FO_M  (BIT(4))
-#define MODEM_LPCON_CLK_BCMEM_FO_V  0x1
-#define MODEM_LPCON_CLK_BCMEM_FO_S  4
-/* MODEM_LPCON_CLK_LP_TIMER_FO : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_LP_TIMER_FO    (BIT(3))
-#define MODEM_LPCON_CLK_LP_TIMER_FO_M  (BIT(3))
-#define MODEM_LPCON_CLK_LP_TIMER_FO_V  0x1
-#define MODEM_LPCON_CLK_LP_TIMER_FO_S  3
-/* MODEM_LPCON_CLK_I2C_MST_FO : R/W ;bitpos:[2] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_I2C_MST_FO    (BIT(2))
-#define MODEM_LPCON_CLK_I2C_MST_FO_M  (BIT(2))
-#define MODEM_LPCON_CLK_I2C_MST_FO_V  0x1
-#define MODEM_LPCON_CLK_I2C_MST_FO_S  2
-/* MODEM_LPCON_CLK_COEX_FO : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_COEX_FO    (BIT(1))
-#define MODEM_LPCON_CLK_COEX_FO_M  (BIT(1))
-#define MODEM_LPCON_CLK_COEX_FO_V  0x1
-#define MODEM_LPCON_CLK_COEX_FO_S  1
-/* MODEM_LPCON_CLK_WIFIPWR_FO : R/W ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_CLK_CONF_FORCE_ON_REG (DR_REG_MODEM_LPCON_BASE + 0x1c)
+/* MODEM_LPCON_CLK_WIFIPWR_FO : R/W; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_CLK_WIFIPWR_FO    (BIT(0))
-#define MODEM_LPCON_CLK_WIFIPWR_FO_M  (BIT(0))
-#define MODEM_LPCON_CLK_WIFIPWR_FO_V  0x1
+#define MODEM_LPCON_CLK_WIFIPWR_FO_M  (MODEM_LPCON_CLK_WIFIPWR_FO_V << MODEM_LPCON_CLK_WIFIPWR_FO_S)
+#define MODEM_LPCON_CLK_WIFIPWR_FO_V  0x00000001U
 #define MODEM_LPCON_CLK_WIFIPWR_FO_S  0
+/* MODEM_LPCON_CLK_COEX_FO : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_COEX_FO    (BIT(1))
+#define MODEM_LPCON_CLK_COEX_FO_M  (MODEM_LPCON_CLK_COEX_FO_V << MODEM_LPCON_CLK_COEX_FO_S)
+#define MODEM_LPCON_CLK_COEX_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_COEX_FO_S  1
+/* MODEM_LPCON_CLK_I2C_MST_FO : R/W; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_I2C_MST_FO    (BIT(2))
+#define MODEM_LPCON_CLK_I2C_MST_FO_M  (MODEM_LPCON_CLK_I2C_MST_FO_V << MODEM_LPCON_CLK_I2C_MST_FO_S)
+#define MODEM_LPCON_CLK_I2C_MST_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_I2C_MST_FO_S  2
+/* MODEM_LPCON_CLK_LP_TIMER_FO : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_LP_TIMER_FO    (BIT(3))
+#define MODEM_LPCON_CLK_LP_TIMER_FO_M  (MODEM_LPCON_CLK_LP_TIMER_FO_V << MODEM_LPCON_CLK_LP_TIMER_FO_S)
+#define MODEM_LPCON_CLK_LP_TIMER_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_LP_TIMER_FO_S  3
+/* MODEM_LPCON_CLK_BCMEM_FO : R/W; bitpos: [4]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_BCMEM_FO    (BIT(4))
+#define MODEM_LPCON_CLK_BCMEM_FO_M  (MODEM_LPCON_CLK_BCMEM_FO_V << MODEM_LPCON_CLK_BCMEM_FO_S)
+#define MODEM_LPCON_CLK_BCMEM_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_BCMEM_FO_S  4
+/* MODEM_LPCON_CLK_I2C_MST_MEM_FO : R/W; bitpos: [5]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_I2C_MST_MEM_FO    (BIT(5))
+#define MODEM_LPCON_CLK_I2C_MST_MEM_FO_M  (MODEM_LPCON_CLK_I2C_MST_MEM_FO_V << MODEM_LPCON_CLK_I2C_MST_MEM_FO_S)
+#define MODEM_LPCON_CLK_I2C_MST_MEM_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_I2C_MST_MEM_FO_S  5
+/* MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO : R/W; bitpos: [6]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO    (BIT(6))
+#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_M  (MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_V << MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_S)
+#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_CHAN_FREQ_MEM_FO_S  6
+/* MODEM_LPCON_CLK_PBUS_MEM_FO : R/W; bitpos: [7]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_PBUS_MEM_FO    (BIT(7))
+#define MODEM_LPCON_CLK_PBUS_MEM_FO_M  (MODEM_LPCON_CLK_PBUS_MEM_FO_V << MODEM_LPCON_CLK_PBUS_MEM_FO_S)
+#define MODEM_LPCON_CLK_PBUS_MEM_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_PBUS_MEM_FO_S  7
+/* MODEM_LPCON_CLK_AGC_MEM_FO : R/W; bitpos: [8]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_AGC_MEM_FO    (BIT(8))
+#define MODEM_LPCON_CLK_AGC_MEM_FO_M  (MODEM_LPCON_CLK_AGC_MEM_FO_V << MODEM_LPCON_CLK_AGC_MEM_FO_S)
+#define MODEM_LPCON_CLK_AGC_MEM_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_AGC_MEM_FO_S  8
+/* MODEM_LPCON_CLK_DC_MEM_FO : R/W; bitpos: [9]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_DC_MEM_FO    (BIT(9))
+#define MODEM_LPCON_CLK_DC_MEM_FO_M  (MODEM_LPCON_CLK_DC_MEM_FO_V << MODEM_LPCON_CLK_DC_MEM_FO_S)
+#define MODEM_LPCON_CLK_DC_MEM_FO_V  0x00000001U
+#define MODEM_LPCON_CLK_DC_MEM_FO_S  9
 
-#define MODEM_LPCON_CLK_CONF_POWER_ST_REG          (DR_REG_MODEM_LPCON_BASE + 0x20)
-/* MODEM_LPCON_CLK_LP_APB_ST_MAP : R/W ;bitpos:[31:28] ;default: 4'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_LP_APB_ST_MAP    0x0000000F
-#define MODEM_LPCON_CLK_LP_APB_ST_MAP_M  ((MODEM_LPCON_CLK_LP_APB_ST_MAP_V)<<(MODEM_LPCON_CLK_LP_APB_ST_MAP_S))
-#define MODEM_LPCON_CLK_LP_APB_ST_MAP_V  0xF
-#define MODEM_LPCON_CLK_LP_APB_ST_MAP_S  28
-/* MODEM_LPCON_CLK_I2C_MST_ST_MAP : R/W ;bitpos:[27:24] ;default: 4'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_I2C_MST_ST_MAP    0x0000000F
-#define MODEM_LPCON_CLK_I2C_MST_ST_MAP_M  ((MODEM_LPCON_CLK_I2C_MST_ST_MAP_V)<<(MODEM_LPCON_CLK_I2C_MST_ST_MAP_S))
-#define MODEM_LPCON_CLK_I2C_MST_ST_MAP_V  0xF
-#define MODEM_LPCON_CLK_I2C_MST_ST_MAP_S  24
-/* MODEM_LPCON_CLK_COEX_ST_MAP : R/W ;bitpos:[23:20] ;default: 4'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_COEX_ST_MAP    0x0000000F
-#define MODEM_LPCON_CLK_COEX_ST_MAP_M  ((MODEM_LPCON_CLK_COEX_ST_MAP_V)<<(MODEM_LPCON_CLK_COEX_ST_MAP_S))
-#define MODEM_LPCON_CLK_COEX_ST_MAP_V  0xF
-#define MODEM_LPCON_CLK_COEX_ST_MAP_S  20
-/* MODEM_LPCON_CLK_WIFIPWR_ST_MAP : R/W ;bitpos:[19:16] ;default: 4'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_CLK_WIFIPWR_ST_MAP    0x0000000F
-#define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_M  ((MODEM_LPCON_CLK_WIFIPWR_ST_MAP_V)<<(MODEM_LPCON_CLK_WIFIPWR_ST_MAP_S))
-#define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_V  0xF
+#define MODEM_LPCON_CLK_CONF_POWER_ST_REG (DR_REG_MODEM_LPCON_BASE + 0x20)
+/* MODEM_LPCON_CLK_WIFIPWR_ST_MAP : R/W; bitpos: [19:16]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_WIFIPWR_ST_MAP    0x0000000FU
+#define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_M  (MODEM_LPCON_CLK_WIFIPWR_ST_MAP_V << MODEM_LPCON_CLK_WIFIPWR_ST_MAP_S)
+#define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_V  0x0000000FU
 #define MODEM_LPCON_CLK_WIFIPWR_ST_MAP_S  16
+/* MODEM_LPCON_CLK_COEX_ST_MAP : R/W; bitpos: [23:20]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_COEX_ST_MAP    0x0000000FU
+#define MODEM_LPCON_CLK_COEX_ST_MAP_M  (MODEM_LPCON_CLK_COEX_ST_MAP_V << MODEM_LPCON_CLK_COEX_ST_MAP_S)
+#define MODEM_LPCON_CLK_COEX_ST_MAP_V  0x0000000FU
+#define MODEM_LPCON_CLK_COEX_ST_MAP_S  20
+/* MODEM_LPCON_CLK_I2C_MST_ST_MAP : R/W; bitpos: [27:24]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_I2C_MST_ST_MAP    0x0000000FU
+#define MODEM_LPCON_CLK_I2C_MST_ST_MAP_M  (MODEM_LPCON_CLK_I2C_MST_ST_MAP_V << MODEM_LPCON_CLK_I2C_MST_ST_MAP_S)
+#define MODEM_LPCON_CLK_I2C_MST_ST_MAP_V  0x0000000FU
+#define MODEM_LPCON_CLK_I2C_MST_ST_MAP_S  24
+/* MODEM_LPCON_CLK_LP_APB_ST_MAP : R/W; bitpos: [31:28]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CLK_LP_APB_ST_MAP    0x0000000FU
+#define MODEM_LPCON_CLK_LP_APB_ST_MAP_M  (MODEM_LPCON_CLK_LP_APB_ST_MAP_V << MODEM_LPCON_CLK_LP_APB_ST_MAP_S)
+#define MODEM_LPCON_CLK_LP_APB_ST_MAP_V  0x0000000FU
+#define MODEM_LPCON_CLK_LP_APB_ST_MAP_S  28
 
-#define MODEM_LPCON_RST_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x24)
-/* MODEM_LPCON_RST_LP_TIMER : WO ;bitpos:[3] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_RST_LP_TIMER    (BIT(3))
-#define MODEM_LPCON_RST_LP_TIMER_M  (BIT(3))
-#define MODEM_LPCON_RST_LP_TIMER_V  0x1
-#define MODEM_LPCON_RST_LP_TIMER_S  3
-/* MODEM_LPCON_RST_I2C_MST : WO ;bitpos:[2] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_RST_I2C_MST    (BIT(2))
-#define MODEM_LPCON_RST_I2C_MST_M  (BIT(2))
-#define MODEM_LPCON_RST_I2C_MST_V  0x1
-#define MODEM_LPCON_RST_I2C_MST_S  2
-/* MODEM_LPCON_RST_COEX : WO ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_RST_COEX    (BIT(1))
-#define MODEM_LPCON_RST_COEX_M  (BIT(1))
-#define MODEM_LPCON_RST_COEX_V  0x1
-#define MODEM_LPCON_RST_COEX_S  1
-/* MODEM_LPCON_RST_WIFIPWR : WO ;bitpos:[0] ;default: 1'b0 ; */
-/*description: .*/
+#define MODEM_LPCON_RST_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x24)
+/* MODEM_LPCON_RST_WIFIPWR : WO; bitpos: [0]; default: 0; */
+/*description: */
 #define MODEM_LPCON_RST_WIFIPWR    (BIT(0))
-#define MODEM_LPCON_RST_WIFIPWR_M  (BIT(0))
-#define MODEM_LPCON_RST_WIFIPWR_V  0x1
+#define MODEM_LPCON_RST_WIFIPWR_M  (MODEM_LPCON_RST_WIFIPWR_V << MODEM_LPCON_RST_WIFIPWR_S)
+#define MODEM_LPCON_RST_WIFIPWR_V  0x00000001U
 #define MODEM_LPCON_RST_WIFIPWR_S  0
+/* MODEM_LPCON_RST_COEX : WO; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_RST_COEX    (BIT(1))
+#define MODEM_LPCON_RST_COEX_M  (MODEM_LPCON_RST_COEX_V << MODEM_LPCON_RST_COEX_S)
+#define MODEM_LPCON_RST_COEX_V  0x00000001U
+#define MODEM_LPCON_RST_COEX_S  1
+/* MODEM_LPCON_RST_I2C_MST : WO; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_LPCON_RST_I2C_MST    (BIT(2))
+#define MODEM_LPCON_RST_I2C_MST_M  (MODEM_LPCON_RST_I2C_MST_V << MODEM_LPCON_RST_I2C_MST_S)
+#define MODEM_LPCON_RST_I2C_MST_V  0x00000001U
+#define MODEM_LPCON_RST_I2C_MST_S  2
+/* MODEM_LPCON_RST_LP_TIMER : WO; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_LPCON_RST_LP_TIMER    (BIT(3))
+#define MODEM_LPCON_RST_LP_TIMER_M  (MODEM_LPCON_RST_LP_TIMER_V << MODEM_LPCON_RST_LP_TIMER_S)
+#define MODEM_LPCON_RST_LP_TIMER_V  0x00000001U
+#define MODEM_LPCON_RST_LP_TIMER_S  3
 
-#define MODEM_LPCON_MEM_CONF_REG          (DR_REG_MODEM_LPCON_BASE + 0x28)
-/* MODEM_LPCON_MODEM_PWR_MEM_RA : R/W ;bitpos:[19:18] ;default: 2'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_MODEM_PWR_MEM_RA    0x00000003
-#define MODEM_LPCON_MODEM_PWR_MEM_RA_M  ((MODEM_LPCON_MODEM_PWR_MEM_RA_V)<<(MODEM_LPCON_MODEM_PWR_MEM_RA_S))
-#define MODEM_LPCON_MODEM_PWR_MEM_RA_V  0x3
-#define MODEM_LPCON_MODEM_PWR_MEM_RA_S  18
-/* MODEM_LPCON_MODEM_PWR_MEM_WA : R/W ;bitpos:[17:15] ;default: 3'h4 ; */
-/*description: .*/
-#define MODEM_LPCON_MODEM_PWR_MEM_WA    0x00000007
-#define MODEM_LPCON_MODEM_PWR_MEM_WA_M  ((MODEM_LPCON_MODEM_PWR_MEM_WA_V)<<(MODEM_LPCON_MODEM_PWR_MEM_WA_S))
-#define MODEM_LPCON_MODEM_PWR_MEM_WA_V  0x7
-#define MODEM_LPCON_MODEM_PWR_MEM_WA_S  15
-/* MODEM_LPCON_MODEM_PWR_MEM_WP : R/W ;bitpos:[14:12] ;default: 3'h0 ; */
-/*description: .*/
-#define MODEM_LPCON_MODEM_PWR_MEM_WP    0x00000007
-#define MODEM_LPCON_MODEM_PWR_MEM_WP_M  ((MODEM_LPCON_MODEM_PWR_MEM_WP_V)<<(MODEM_LPCON_MODEM_PWR_MEM_WP_S))
-#define MODEM_LPCON_MODEM_PWR_MEM_WP_V  0x7
-#define MODEM_LPCON_MODEM_PWR_MEM_WP_S  12
-/* MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD : R/W ;bitpos:[11] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD    (BIT(11))
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_M  (BIT(11))
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_V  0x1
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_S  11
-/* MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU : R/W ;bitpos:[10] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU    (BIT(10))
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_M  (BIT(10))
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_V  0x1
-#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_S  10
-/* MODEM_LPCON_I2C_MST_MEM_FORCE_PD : R/W ;bitpos:[9] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD    (BIT(9))
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_M  (BIT(9))
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_V  0x1
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_S  9
-/* MODEM_LPCON_I2C_MST_MEM_FORCE_PU : R/W ;bitpos:[8] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU    (BIT(8))
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_M  (BIT(8))
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_V  0x1
-#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_S  8
-/* MODEM_LPCON_BC_MEM_FORCE_PD : R/W ;bitpos:[7] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_BC_MEM_FORCE_PD    (BIT(7))
-#define MODEM_LPCON_BC_MEM_FORCE_PD_M  (BIT(7))
-#define MODEM_LPCON_BC_MEM_FORCE_PD_V  0x1
-#define MODEM_LPCON_BC_MEM_FORCE_PD_S  7
-/* MODEM_LPCON_BC_MEM_FORCE_PU : R/W ;bitpos:[6] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_BC_MEM_FORCE_PU    (BIT(6))
-#define MODEM_LPCON_BC_MEM_FORCE_PU_M  (BIT(6))
-#define MODEM_LPCON_BC_MEM_FORCE_PU_V  0x1
-#define MODEM_LPCON_BC_MEM_FORCE_PU_S  6
-/* MODEM_LPCON_PBUS_MEM_FORCE_PD : R/W ;bitpos:[5] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_PBUS_MEM_FORCE_PD    (BIT(5))
-#define MODEM_LPCON_PBUS_MEM_FORCE_PD_M  (BIT(5))
-#define MODEM_LPCON_PBUS_MEM_FORCE_PD_V  0x1
-#define MODEM_LPCON_PBUS_MEM_FORCE_PD_S  5
-/* MODEM_LPCON_PBUS_MEM_FORCE_PU : R/W ;bitpos:[4] ;default: 1'b1 ; */
-/*description: .*/
-#define MODEM_LPCON_PBUS_MEM_FORCE_PU    (BIT(4))
-#define MODEM_LPCON_PBUS_MEM_FORCE_PU_M  (BIT(4))
-#define MODEM_LPCON_PBUS_MEM_FORCE_PU_V  0x1
-#define MODEM_LPCON_PBUS_MEM_FORCE_PU_S  4
-/* MODEM_LPCON_AGC_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_AGC_MEM_FORCE_PD    (BIT(3))
-#define MODEM_LPCON_AGC_MEM_FORCE_PD_M  (BIT(3))
-#define MODEM_LPCON_AGC_MEM_FORCE_PD_V  0x1
-#define MODEM_LPCON_AGC_MEM_FORCE_PD_S  3
-/* MODEM_LPCON_AGC_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
-/*description: .*/
-#define MODEM_LPCON_AGC_MEM_FORCE_PU    (BIT(2))
-#define MODEM_LPCON_AGC_MEM_FORCE_PU_M  (BIT(2))
-#define MODEM_LPCON_AGC_MEM_FORCE_PU_V  0x1
-#define MODEM_LPCON_AGC_MEM_FORCE_PU_S  2
-/* MODEM_LPCON_DC_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
-/*description: .*/
-#define MODEM_LPCON_DC_MEM_FORCE_PD    (BIT(1))
-#define MODEM_LPCON_DC_MEM_FORCE_PD_M  (BIT(1))
-#define MODEM_LPCON_DC_MEM_FORCE_PD_V  0x1
-#define MODEM_LPCON_DC_MEM_FORCE_PD_S  1
-/* MODEM_LPCON_DC_MEM_FORCE_PU : R/W ;bitpos:[0] ;default: 1'b1 ; */
-/*description: .*/
+#define MODEM_LPCON_MEM_CONF_REG (DR_REG_MODEM_LPCON_BASE + 0x28)
+/* MODEM_LPCON_DC_MEM_FORCE_PU : R/W; bitpos: [0]; default: 1; */
+/*description: */
 #define MODEM_LPCON_DC_MEM_FORCE_PU    (BIT(0))
-#define MODEM_LPCON_DC_MEM_FORCE_PU_M  (BIT(0))
-#define MODEM_LPCON_DC_MEM_FORCE_PU_V  0x1
+#define MODEM_LPCON_DC_MEM_FORCE_PU_M  (MODEM_LPCON_DC_MEM_FORCE_PU_V << MODEM_LPCON_DC_MEM_FORCE_PU_S)
+#define MODEM_LPCON_DC_MEM_FORCE_PU_V  0x00000001U
 #define MODEM_LPCON_DC_MEM_FORCE_PU_S  0
+/* MODEM_LPCON_DC_MEM_FORCE_PD : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_LPCON_DC_MEM_FORCE_PD    (BIT(1))
+#define MODEM_LPCON_DC_MEM_FORCE_PD_M  (MODEM_LPCON_DC_MEM_FORCE_PD_V << MODEM_LPCON_DC_MEM_FORCE_PD_S)
+#define MODEM_LPCON_DC_MEM_FORCE_PD_V  0x00000001U
+#define MODEM_LPCON_DC_MEM_FORCE_PD_S  1
+/* MODEM_LPCON_AGC_MEM_FORCE_PU : R/W; bitpos: [2]; default: 1; */
+/*description: */
+#define MODEM_LPCON_AGC_MEM_FORCE_PU    (BIT(2))
+#define MODEM_LPCON_AGC_MEM_FORCE_PU_M  (MODEM_LPCON_AGC_MEM_FORCE_PU_V << MODEM_LPCON_AGC_MEM_FORCE_PU_S)
+#define MODEM_LPCON_AGC_MEM_FORCE_PU_V  0x00000001U
+#define MODEM_LPCON_AGC_MEM_FORCE_PU_S  2
+/* MODEM_LPCON_AGC_MEM_FORCE_PD : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_LPCON_AGC_MEM_FORCE_PD    (BIT(3))
+#define MODEM_LPCON_AGC_MEM_FORCE_PD_M  (MODEM_LPCON_AGC_MEM_FORCE_PD_V << MODEM_LPCON_AGC_MEM_FORCE_PD_S)
+#define MODEM_LPCON_AGC_MEM_FORCE_PD_V  0x00000001U
+#define MODEM_LPCON_AGC_MEM_FORCE_PD_S  3
+/* MODEM_LPCON_PBUS_MEM_FORCE_PU : R/W; bitpos: [4]; default: 1; */
+/*description: */
+#define MODEM_LPCON_PBUS_MEM_FORCE_PU    (BIT(4))
+#define MODEM_LPCON_PBUS_MEM_FORCE_PU_M  (MODEM_LPCON_PBUS_MEM_FORCE_PU_V << MODEM_LPCON_PBUS_MEM_FORCE_PU_S)
+#define MODEM_LPCON_PBUS_MEM_FORCE_PU_V  0x00000001U
+#define MODEM_LPCON_PBUS_MEM_FORCE_PU_S  4
+/* MODEM_LPCON_PBUS_MEM_FORCE_PD : R/W; bitpos: [5]; default: 0; */
+/*description: */
+#define MODEM_LPCON_PBUS_MEM_FORCE_PD    (BIT(5))
+#define MODEM_LPCON_PBUS_MEM_FORCE_PD_M  (MODEM_LPCON_PBUS_MEM_FORCE_PD_V << MODEM_LPCON_PBUS_MEM_FORCE_PD_S)
+#define MODEM_LPCON_PBUS_MEM_FORCE_PD_V  0x00000001U
+#define MODEM_LPCON_PBUS_MEM_FORCE_PD_S  5
+/* MODEM_LPCON_BC_MEM_FORCE_PU : R/W; bitpos: [6]; default: 0; */
+/*description: */
+#define MODEM_LPCON_BC_MEM_FORCE_PU    (BIT(6))
+#define MODEM_LPCON_BC_MEM_FORCE_PU_M  (MODEM_LPCON_BC_MEM_FORCE_PU_V << MODEM_LPCON_BC_MEM_FORCE_PU_S)
+#define MODEM_LPCON_BC_MEM_FORCE_PU_V  0x00000001U
+#define MODEM_LPCON_BC_MEM_FORCE_PU_S  6
+/* MODEM_LPCON_BC_MEM_FORCE_PD : R/W; bitpos: [7]; default: 0; */
+/*description: */
+#define MODEM_LPCON_BC_MEM_FORCE_PD    (BIT(7))
+#define MODEM_LPCON_BC_MEM_FORCE_PD_M  (MODEM_LPCON_BC_MEM_FORCE_PD_V << MODEM_LPCON_BC_MEM_FORCE_PD_S)
+#define MODEM_LPCON_BC_MEM_FORCE_PD_V  0x00000001U
+#define MODEM_LPCON_BC_MEM_FORCE_PD_S  7
+/* MODEM_LPCON_I2C_MST_MEM_FORCE_PU : R/W; bitpos: [8]; default: 0; */
+/*description: */
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU    (BIT(8))
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_M  (MODEM_LPCON_I2C_MST_MEM_FORCE_PU_V << MODEM_LPCON_I2C_MST_MEM_FORCE_PU_S)
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_V  0x00000001U
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PU_S  8
+/* MODEM_LPCON_I2C_MST_MEM_FORCE_PD : R/W; bitpos: [9]; default: 0; */
+/*description: */
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD    (BIT(9))
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_M  (MODEM_LPCON_I2C_MST_MEM_FORCE_PD_V << MODEM_LPCON_I2C_MST_MEM_FORCE_PD_S)
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_V  0x00000001U
+#define MODEM_LPCON_I2C_MST_MEM_FORCE_PD_S  9
+/* MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU : R/W; bitpos: [10]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU    (BIT(10))
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_M  (MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_V << MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_S)
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_V  0x00000001U
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PU_S  10
+/* MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD : R/W; bitpos: [11]; default: 0; */
+/*description: */
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD    (BIT(11))
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_M  (MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_V << MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_S)
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_V  0x00000001U
+#define MODEM_LPCON_CHAN_FREQ_MEM_FORCE_PD_S  11
+/* MODEM_LPCON_MODEM_PWR_MEM_WP : R/W; bitpos: [14:12]; default: 0; */
+/*description: */
+#define MODEM_LPCON_MODEM_PWR_MEM_WP    0x00000007U
+#define MODEM_LPCON_MODEM_PWR_MEM_WP_M  (MODEM_LPCON_MODEM_PWR_MEM_WP_V << MODEM_LPCON_MODEM_PWR_MEM_WP_S)
+#define MODEM_LPCON_MODEM_PWR_MEM_WP_V  0x00000007U
+#define MODEM_LPCON_MODEM_PWR_MEM_WP_S  12
+/* MODEM_LPCON_MODEM_PWR_MEM_WA : R/W; bitpos: [17:15]; default: 4; */
+/*description: */
+#define MODEM_LPCON_MODEM_PWR_MEM_WA    0x00000007U
+#define MODEM_LPCON_MODEM_PWR_MEM_WA_M  (MODEM_LPCON_MODEM_PWR_MEM_WA_V << MODEM_LPCON_MODEM_PWR_MEM_WA_S)
+#define MODEM_LPCON_MODEM_PWR_MEM_WA_V  0x00000007U
+#define MODEM_LPCON_MODEM_PWR_MEM_WA_S  15
+/* MODEM_LPCON_MODEM_PWR_MEM_RA : R/W; bitpos: [19:18]; default: 0; */
+/*description: */
+#define MODEM_LPCON_MODEM_PWR_MEM_RA    0x00000003U
+#define MODEM_LPCON_MODEM_PWR_MEM_RA_M  (MODEM_LPCON_MODEM_PWR_MEM_RA_V << MODEM_LPCON_MODEM_PWR_MEM_RA_S)
+#define MODEM_LPCON_MODEM_PWR_MEM_RA_V  0x00000003U
+#define MODEM_LPCON_MODEM_PWR_MEM_RA_S  18
 
-#define MODEM_LPCON_DATE_REG          (DR_REG_MODEM_LPCON_BASE + 0x2C)
-/* MODEM_LPCON_DATE : R/W ;bitpos:[27:0] ;default: 28'h2206240 ; */
-/*description: .*/
-#define MODEM_LPCON_DATE    0x0FFFFFFF
-#define MODEM_LPCON_DATE_M  ((MODEM_LPCON_DATE_V)<<(MODEM_LPCON_DATE_S))
-#define MODEM_LPCON_DATE_V  0xFFFFFFF
+#define MODEM_LPCON_DATE_REG (DR_REG_MODEM_LPCON_BASE + 0x2c)
+/* MODEM_LPCON_DATE : R/W; bitpos: [27:0]; default: 35676736; */
+/*description: */
+#define MODEM_LPCON_DATE    0x0FFFFFFFU
+#define MODEM_LPCON_DATE_M  (MODEM_LPCON_DATE_V << MODEM_LPCON_DATE_S)
+#define MODEM_LPCON_DATE_V  0x0FFFFFFFU
 #define MODEM_LPCON_DATE_S  0
 
-
 #ifdef __cplusplus
 }
 #endif

components/soc/esp32c6/include/modem/modem_lpcon_struct.h

@@ -1,7 +1,7 @@
-/*
+/**
  * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0
+ *  SPDX-License-Identifier: Apache-2.0
  */
 #pragma once
 
@@ -10,226 +10,169 @@
 extern "C" {
 #endif
 
-typedef volatile struct {
-    union {
-        struct {
-            uint32_t reg_clk_en                    :    1;
-            uint32_t reg_clk_debug_ena             :    1;
-            uint32_t reserved2                     :    30;
-        };
-        uint32_t val;
-    } test_conf;
-    union {
-        struct {
-            uint32_t reg_clk_lp_timer_sel_osc_slow :    1;
-            uint32_t reg_clk_lp_timer_sel_osc_fast :    1;
-            uint32_t reg_clk_lp_timer_sel_xtal     :    1;
-            uint32_t reg_clk_lp_timer_sel_xtal32k  :    1;
-            uint32_t reg_clk_lp_timer_div_num      :    12;
-            uint32_t reserved16                    :    16;
-        };
-        uint32_t val;
-    } lp_timer_conf;
-    union {
-        struct {
-            uint32_t reg_clk_coex_lp_sel_osc_slow  :    1;
-            uint32_t reg_clk_coex_lp_sel_osc_fast  :    1;
-            uint32_t reg_clk_coex_lp_sel_xtal      :    1;
-            uint32_t reg_clk_coex_lp_sel_xtal32k   :    1;
-            uint32_t reg_clk_coex_lp_div_num       :    12;
-            uint32_t reserved16                    :    16;
-        };
-        uint32_t val;
-    } coex_lp_clk_conf;
-    union {
-        struct {
-            uint32_t reg_clk_wifipwr_lp_sel_osc_slow:    1;
-            uint32_t reg_clk_wifipwr_lp_sel_osc_fast:    1;
-            uint32_t reg_clk_wifipwr_lp_sel_xtal   :    1;
-            uint32_t reg_clk_wifipwr_lp_sel_xtal32k:    1;
-            uint32_t reg_clk_wifipwr_lp_div_num    :    12;
-            uint32_t reserved16                    :    16;
-        };
-        uint32_t val;
-    } wifi_lp_clk_conf;
-    union {
-        struct {
-            uint32_t reg_clk_i2c_mst_sel_160m      :    1;
-            uint32_t reserved1                     :    31;
-        };
-        uint32_t val;
-    } i2c_mst_clk_conf;
-    union {
-        struct {
-            uint32_t reg_clk_modem_32k_sel         :    2;
-            uint32_t reserved2                     :    30;
-        };
-        uint32_t val;
-    } modem_32k_clk_conf;
-    union {
-        struct {
-            uint32_t reg_clk_wifipwr_en            :    1;
-            uint32_t reg_clk_coex_en               :    1;
-            uint32_t reg_clk_i2c_mst_en            :    1;
-            uint32_t reg_clk_lp_timer_en           :    1;
-            uint32_t reserved4                     :    1;
-            uint32_t reserved5                     :    1;
-            uint32_t reserved6                     :    1;
-            uint32_t reserved7                     :    1;
-            uint32_t reserved8                     :    1;
-            uint32_t reserved9                     :    1;
-            uint32_t reserved10                    :    1;
-            uint32_t reserved11                    :    1;
-            uint32_t reserved12                    :    1;
-            uint32_t reserved13                    :    1;
-            uint32_t reserved14                    :    1;
-            uint32_t reserved15                    :    1;
-            uint32_t reserved16                    :    1;
-            uint32_t reserved17                    :    1;
-            uint32_t reserved18                    :    1;
-            uint32_t reserved19                    :    1;
-            uint32_t reserved20                    :    1;
-            uint32_t reserved21                    :    1;
-            uint32_t reserved22                    :    1;
-            uint32_t reserved23                    :    1;
-            uint32_t reserved24                    :    1;
-            uint32_t reserved25                    :    1;
-            uint32_t reserved26                    :    1;
-            uint32_t reserved27                    :    1;
-            uint32_t reserved28                    :    1;
-            uint32_t reserved29                    :    1;
-            uint32_t reserved30                    :    1;
-            uint32_t reserved31                    :    1;
-        };
-        uint32_t val;
-    } clk_conf;
-    union {
-        struct {
-            uint32_t reg_clk_wifipwr_fo            :    1;
-            uint32_t reg_clk_coex_fo               :    1;
-            uint32_t reg_clk_i2c_mst_fo            :    1;
-            uint32_t reg_clk_lp_timer_fo           :    1;
-            uint32_t reg_clk_bcmem_fo              :    1;
-            uint32_t reg_clk_i2c_mst_mem_fo        :    1;
-            uint32_t reg_clk_chan_freq_mem_fo      :    1;
-            uint32_t reg_clk_pbus_mem_fo           :    1;
-            uint32_t reg_clk_agc_mem_fo            :    1;
-            uint32_t reg_clk_dc_mem_fo             :    1;
-            uint32_t reserved10                    :    1;
-            uint32_t reserved11                    :    1;
-            uint32_t reserved12                    :    1;
-            uint32_t reserved13                    :    1;
-            uint32_t reserved14                    :    1;
-            uint32_t reserved15                    :    1;
-            uint32_t reserved16                    :    1;
-            uint32_t reserved17                    :    1;
-            uint32_t reserved18                    :    1;
-            uint32_t reserved19                    :    1;
-            uint32_t reserved20                    :    1;
-            uint32_t reserved21                    :    1;
-            uint32_t reserved22                    :    1;
-            uint32_t reserved23                    :    1;
-            uint32_t reserved24                    :    1;
-            uint32_t reserved25                    :    1;
-            uint32_t reserved26                    :    1;
-            uint32_t reserved27                    :    1;
-            uint32_t reserved28                    :    1;
-            uint32_t reserved29                    :    1;
-            uint32_t reserved30                    :    1;
-            uint32_t reserved31                    :    1;
-        };
-        uint32_t val;
-    } clk_conf_force_on;
-    union {
-        struct {
-            uint32_t reserved0                     :    16;
-            uint32_t reg_clk_wifipwr_st_map        :    4;
-            uint32_t reg_clk_coex_st_map           :    4;
-            uint32_t reg_clk_i2c_mst_st_map        :    4;
-            uint32_t reg_clk_lp_apb_st_map         :    4;
-        };
-        uint32_t val;
-    } clk_conf_power_st;
-    union {
-        struct {
-            uint32_t reg_rst_wifipwr               :    1;
-            uint32_t reg_rst_coex                  :    1;
-            uint32_t reg_rst_i2c_mst               :    1;
-            uint32_t reg_rst_lp_timer              :    1;
-            uint32_t reserved4                     :    1;
-            uint32_t reserved5                     :    1;
-            uint32_t reserved6                     :    1;
-            uint32_t reserved7                     :    1;
-            uint32_t reserved8                     :    1;
-            uint32_t reserved9                     :    1;
-            uint32_t reserved10                    :    1;
-            uint32_t reserved11                    :    1;
-            uint32_t reserved12                    :    1;
-            uint32_t reserved13                    :    1;
-            uint32_t reserved14                    :    1;
-            uint32_t reserved15                    :    1;
-            uint32_t reserved16                    :    1;
-            uint32_t reserved17                    :    1;
-            uint32_t reserved18                    :    1;
-            uint32_t reserved19                    :    1;
-            uint32_t reserved20                    :    1;
-            uint32_t reserved21                    :    1;
-            uint32_t reserved22                    :    1;
-            uint32_t reserved23                    :    1;
-            uint32_t reserved24                    :    1;
-            uint32_t reserved25                    :    1;
-            uint32_t reserved26                    :    1;
-            uint32_t reserved27                    :    1;
-            uint32_t reserved28                    :    1;
-            uint32_t reserved29                    :    1;
-            uint32_t reserved30                    :    1;
-            uint32_t reserved31                    :    1;
-        };
-        uint32_t val;
-    } rst_conf;
-    union {
-        struct {
-            uint32_t reg_dc_mem_force_pu           :    1;
-            uint32_t reg_dc_mem_force_pd           :    1;
-            uint32_t reg_agc_mem_force_pu          :    1;
-            uint32_t reg_agc_mem_force_pd          :    1;
-            uint32_t reg_pbus_mem_force_pu         :    1;
-            uint32_t reg_pbus_mem_force_pd         :    1;
-            uint32_t reg_bc_mem_force_pu           :    1;
-            uint32_t reg_bc_mem_force_pd           :    1;
-            uint32_t reg_i2c_mst_mem_force_pu      :    1;
-            uint32_t reg_i2c_mst_mem_force_pd      :    1;
-            uint32_t reg_chan_freq_mem_force_pu    :    1;
-            uint32_t reg_chan_freq_mem_force_pd    :    1;
-            uint32_t reg_modem_pwr_mem_wp          :    3;
-            uint32_t reg_modem_pwr_mem_wa          :    3;
-            uint32_t reg_modem_pwr_mem_ra          :    2;
-            uint32_t reserved20                    :    1;
-            uint32_t reserved21                    :    1;
-            uint32_t reserved22                    :    1;
-            uint32_t reserved23                    :    1;
-            uint32_t reserved24                    :    1;
-            uint32_t reserved25                    :    1;
-            uint32_t reserved26                    :    1;
-            uint32_t reserved27                    :    1;
-            uint32_t reserved28                    :    1;
-            uint32_t reserved29                    :    1;
-            uint32_t reserved30                    :    1;
-            uint32_t reserved31                    :    1;
-        };
-        uint32_t val;
-    } mem_conf;
-    union {
-        struct {
-            uint32_t reg_date                      :    28;
-            uint32_t reserved28                    :    4;
-        };
-        uint32_t val;
-    } date;
+typedef union {
+    struct {
+        uint32_t clk_en:1;
+        uint32_t clk_debug_ena:1;
+        uint32_t reserved_2:30;
+    };
+    uint32_t val;
+} modem_lpcon_test_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_lp_timer_sel_osc_slow:1;
+        uint32_t clk_lp_timer_sel_osc_fast:1;
+        uint32_t clk_lp_timer_sel_xtal:1;
+        uint32_t clk_lp_timer_sel_xtal32k:1;
+        uint32_t clk_lp_timer_div_num:12;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} modem_lpcon_lp_timer_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_coex_lp_sel_osc_slow:1;
+        uint32_t clk_coex_lp_sel_osc_fast:1;
+        uint32_t clk_coex_lp_sel_xtal:1;
+        uint32_t clk_coex_lp_sel_xtal32k:1;
+        uint32_t clk_coex_lp_div_num:12;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} modem_lpcon_coex_lp_clk_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_wifipwr_lp_sel_osc_slow:1;
+        uint32_t clk_wifipwr_lp_sel_osc_fast:1;
+        uint32_t clk_wifipwr_lp_sel_xtal:1;
+        uint32_t clk_wifipwr_lp_sel_xtal32k:1;
+        uint32_t clk_wifipwr_lp_div_num:12;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} modem_lpcon_wifi_lp_clk_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_i2c_mst_sel_160m:1;
+        uint32_t reserved_1:31;
+    };
+    uint32_t val;
+} modem_lpcon_i2c_mst_clk_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_modem_32k_sel:2;
+        uint32_t reserved_2:30;
+    };
+    uint32_t val;
+} modem_lpcon_modem_32k_clk_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_wifipwr_en:1;
+        uint32_t clk_coex_en:1;
+        uint32_t clk_i2c_mst_en:1;
+        uint32_t clk_lp_timer_en:1;
+        uint32_t reserved_4:28;
+    };
+    uint32_t val;
+} modem_lpcon_clk_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_wifipwr_fo:1;
+        uint32_t clk_coex_fo:1;
+        uint32_t clk_i2c_mst_fo:1;
+        uint32_t clk_lp_timer_fo:1;
+        uint32_t clk_bcmem_fo:1;
+        uint32_t clk_i2c_mst_mem_fo:1;
+        uint32_t clk_chan_freq_mem_fo:1;
+        uint32_t clk_pbus_mem_fo:1;
+        uint32_t clk_agc_mem_fo:1;
+        uint32_t clk_dc_mem_fo:1;
+        uint32_t reserved_10:22;
+    };
+    uint32_t val;
+} modem_lpcon_clk_conf_force_on_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved_0:16;
+        uint32_t clk_wifipwr_st_map:4;
+        uint32_t clk_coex_st_map:4;
+        uint32_t clk_i2c_mst_st_map:4;
+        uint32_t clk_lp_apb_st_map:4;
+    };
+    uint32_t val;
+} modem_lpcon_clk_conf_power_st_reg_t;
+
+typedef union {
+    struct {
+        uint32_t rst_wifipwr:1;
+        uint32_t rst_coex:1;
+        uint32_t rst_i2c_mst:1;
+        uint32_t rst_lp_timer:1;
+        uint32_t reserved_4:28;
+    };
+    uint32_t val;
+} modem_lpcon_rst_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t dc_mem_force_pu:1;
+        uint32_t dc_mem_force_pd:1;
+        uint32_t agc_mem_force_pu:1;
+        uint32_t agc_mem_force_pd:1;
+        uint32_t pbus_mem_force_pu:1;
+        uint32_t pbus_mem_force_pd:1;
+        uint32_t bc_mem_force_pu:1;
+        uint32_t bc_mem_force_pd:1;
+        uint32_t i2c_mst_mem_force_pu:1;
+        uint32_t i2c_mst_mem_force_pd:1;
+        uint32_t chan_freq_mem_force_pu:1;
+        uint32_t chan_freq_mem_force_pd:1;
+        uint32_t modem_pwr_mem_wp:3;
+        uint32_t modem_pwr_mem_wa:3;
+        uint32_t modem_pwr_mem_ra:2;
+        uint32_t reserved_20:12;
+    };
+    uint32_t val;
+} modem_lpcon_mem_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t date:28;
+        uint32_t reserved_28:4;
+    };
+    uint32_t val;
+} modem_lpcon_date_reg_t;
+
+
+typedef struct {
+    volatile modem_lpcon_test_conf_reg_t test_conf;
+    volatile modem_lpcon_lp_timer_conf_reg_t lp_timer_conf;
+    volatile modem_lpcon_coex_lp_clk_conf_reg_t coex_lp_clk_conf;
+    volatile modem_lpcon_wifi_lp_clk_conf_reg_t wifi_lp_clk_conf;
+    volatile modem_lpcon_i2c_mst_clk_conf_reg_t i2c_mst_clk_conf;
+    volatile modem_lpcon_modem_32k_clk_conf_reg_t modem_32k_clk_conf;
+    volatile modem_lpcon_clk_conf_reg_t clk_conf;
+    volatile modem_lpcon_clk_conf_force_on_reg_t clk_conf_force_on;
+    volatile modem_lpcon_clk_conf_power_st_reg_t clk_conf_power_st;
+    volatile modem_lpcon_rst_conf_reg_t rst_conf;
+    volatile modem_lpcon_mem_conf_reg_t mem_conf;
+    volatile modem_lpcon_date_reg_t date;
 } modem_lpcon_dev_t;
 
 extern modem_lpcon_dev_t MODEM_LPCON;
 
+#ifndef __cplusplus
+_Static_assert(sizeof(modem_lpcon_dev_t) == 0x30, "Invalid size of modem_lpcon_dev_t structure");
+#endif
+
 #ifdef __cplusplus
 }
 #endif

components/soc/esp32c6/include/modem/modem_syscon_reg.h

@@ -0,0 +1,612 @@
+/**
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ *  SPDX-License-Identifier: Apache-2.0
+ *//*description: */
+#pragma once
+
+#include <stdint.h>
+#include "modem/reg_base.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MODEM_SYSCON_TEST_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x0)
+/* MODEM_SYSCON_CLK_EN : R/W; bitpos: [0]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_EN    (BIT(0))
+#define MODEM_SYSCON_CLK_EN_M  (MODEM_SYSCON_CLK_EN_V << MODEM_SYSCON_CLK_EN_S)
+#define MODEM_SYSCON_CLK_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_EN_S  0
+
+#define MODEM_SYSCON_CLK_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x4)
+/* MODEM_SYSCON_CLK_DATA_DUMP_MUX : R/W; bitpos: [21]; default: 1; */
+/*description: */
+#define MODEM_SYSCON_CLK_DATA_DUMP_MUX    (BIT(21))
+#define MODEM_SYSCON_CLK_DATA_DUMP_MUX_M  (MODEM_SYSCON_CLK_DATA_DUMP_MUX_V << MODEM_SYSCON_CLK_DATA_DUMP_MUX_S)
+#define MODEM_SYSCON_CLK_DATA_DUMP_MUX_V  0x00000001U
+#define MODEM_SYSCON_CLK_DATA_DUMP_MUX_S  21
+/* MODEM_SYSCON_CLK_ETM_EN : R/W; bitpos: [22]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_ETM_EN    (BIT(22))
+#define MODEM_SYSCON_CLK_ETM_EN_M  (MODEM_SYSCON_CLK_ETM_EN_V << MODEM_SYSCON_CLK_ETM_EN_S)
+#define MODEM_SYSCON_CLK_ETM_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_ETM_EN_S  22
+/* MODEM_SYSCON_CLK_ZB_APB_EN : R/W; bitpos: [23]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_ZB_APB_EN    (BIT(23))
+#define MODEM_SYSCON_CLK_ZB_APB_EN_M  (MODEM_SYSCON_CLK_ZB_APB_EN_V << MODEM_SYSCON_CLK_ZB_APB_EN_S)
+#define MODEM_SYSCON_CLK_ZB_APB_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_ZB_APB_EN_S  23
+/* MODEM_SYSCON_CLK_ZB_MAC_EN : R/W; bitpos: [24]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_ZB_MAC_EN    (BIT(24))
+#define MODEM_SYSCON_CLK_ZB_MAC_EN_M  (MODEM_SYSCON_CLK_ZB_MAC_EN_V << MODEM_SYSCON_CLK_ZB_MAC_EN_S)
+#define MODEM_SYSCON_CLK_ZB_MAC_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_ZB_MAC_EN_S  24
+/* MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN : R/W; bitpos: [25]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN    (BIT(25))
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_M  (MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_S  25
+/* MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN : R/W; bitpos: [26]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN    (BIT(26))
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_M  (MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_S  26
+/* MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN : R/W; bitpos: [27]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN    (BIT(27))
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_M  (MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_S  27
+/* MODEM_SYSCON_CLK_MODEM_SEC_APB_EN : R/W; bitpos: [28]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN    (BIT(28))
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_M  (MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_S  28
+/* MODEM_SYSCON_CLK_MODEM_SEC_EN : R/W; bitpos: [29]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_EN    (BIT(29))
+#define MODEM_SYSCON_CLK_MODEM_SEC_EN_M  (MODEM_SYSCON_CLK_MODEM_SEC_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_EN_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_EN_S  29
+/* MODEM_SYSCON_CLK_BLE_TIMER_EN : R/W; bitpos: [30]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_BLE_TIMER_EN    (BIT(30))
+#define MODEM_SYSCON_CLK_BLE_TIMER_EN_M  (MODEM_SYSCON_CLK_BLE_TIMER_EN_V << MODEM_SYSCON_CLK_BLE_TIMER_EN_S)
+#define MODEM_SYSCON_CLK_BLE_TIMER_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_BLE_TIMER_EN_S  30
+/* MODEM_SYSCON_CLK_DATA_DUMP_EN : R/W; bitpos: [31]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_DATA_DUMP_EN    (BIT(31))
+#define MODEM_SYSCON_CLK_DATA_DUMP_EN_M  (MODEM_SYSCON_CLK_DATA_DUMP_EN_V << MODEM_SYSCON_CLK_DATA_DUMP_EN_S)
+#define MODEM_SYSCON_CLK_DATA_DUMP_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_DATA_DUMP_EN_S  31
+
+#define MODEM_SYSCON_CLK_CONF_FORCE_ON_REG (DR_REG_MODEM_SYSCON_BASE + 0x8)
+/* MODEM_SYSCON_CLK_ETM_FO : R/W; bitpos: [22]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_ETM_FO    (BIT(22))
+#define MODEM_SYSCON_CLK_ETM_FO_M  (MODEM_SYSCON_CLK_ETM_FO_V << MODEM_SYSCON_CLK_ETM_FO_S)
+#define MODEM_SYSCON_CLK_ETM_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_ETM_FO_S  22
+/* MODEM_SYSCON_CLK_ZB_APB_FO : R/W; bitpos: [23]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_ZB_APB_FO    (BIT(23))
+#define MODEM_SYSCON_CLK_ZB_APB_FO_M  (MODEM_SYSCON_CLK_ZB_APB_FO_V << MODEM_SYSCON_CLK_ZB_APB_FO_S)
+#define MODEM_SYSCON_CLK_ZB_APB_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_ZB_APB_FO_S  23
+/* MODEM_SYSCON_CLK_ZB_MAC_FO : R/W; bitpos: [24]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_ZB_MAC_FO    (BIT(24))
+#define MODEM_SYSCON_CLK_ZB_MAC_FO_M  (MODEM_SYSCON_CLK_ZB_MAC_FO_V << MODEM_SYSCON_CLK_ZB_MAC_FO_S)
+#define MODEM_SYSCON_CLK_ZB_MAC_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_ZB_MAC_FO_S  24
+/* MODEM_SYSCON_CLK_MODEM_SEC_ECB_FO : R/W; bitpos: [25]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_FO    (BIT(25))
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_FO_M  (MODEM_SYSCON_CLK_MODEM_SEC_ECB_FO_V << MODEM_SYSCON_CLK_MODEM_SEC_ECB_FO_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_FO_S  25
+/* MODEM_SYSCON_CLK_MODEM_SEC_CCM_FO : R/W; bitpos: [26]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_FO    (BIT(26))
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_FO_M  (MODEM_SYSCON_CLK_MODEM_SEC_CCM_FO_V << MODEM_SYSCON_CLK_MODEM_SEC_CCM_FO_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_FO_S  26
+/* MODEM_SYSCON_CLK_MODEM_SEC_BAH_FO : R/W; bitpos: [27]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_FO    (BIT(27))
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_FO_M  (MODEM_SYSCON_CLK_MODEM_SEC_BAH_FO_V << MODEM_SYSCON_CLK_MODEM_SEC_BAH_FO_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_FO_S  27
+/* MODEM_SYSCON_CLK_MODEM_SEC_APB_FO : R/W; bitpos: [28]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_FO    (BIT(28))
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_FO_M  (MODEM_SYSCON_CLK_MODEM_SEC_APB_FO_V << MODEM_SYSCON_CLK_MODEM_SEC_APB_FO_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_APB_FO_S  28
+/* MODEM_SYSCON_CLK_MODEM_SEC_FO : R/W; bitpos: [29]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_SEC_FO    (BIT(29))
+#define MODEM_SYSCON_CLK_MODEM_SEC_FO_M  (MODEM_SYSCON_CLK_MODEM_SEC_FO_V << MODEM_SYSCON_CLK_MODEM_SEC_FO_S)
+#define MODEM_SYSCON_CLK_MODEM_SEC_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_MODEM_SEC_FO_S  29
+/* MODEM_SYSCON_CLK_BLE_TIMER_FO : R/W; bitpos: [30]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_BLE_TIMER_FO    (BIT(30))
+#define MODEM_SYSCON_CLK_BLE_TIMER_FO_M  (MODEM_SYSCON_CLK_BLE_TIMER_FO_V << MODEM_SYSCON_CLK_BLE_TIMER_FO_S)
+#define MODEM_SYSCON_CLK_BLE_TIMER_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_BLE_TIMER_FO_S  30
+/* MODEM_SYSCON_CLK_DATA_DUMP_FO : R/W; bitpos: [31]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_DATA_DUMP_FO    (BIT(31))
+#define MODEM_SYSCON_CLK_DATA_DUMP_FO_M  (MODEM_SYSCON_CLK_DATA_DUMP_FO_V << MODEM_SYSCON_CLK_DATA_DUMP_FO_S)
+#define MODEM_SYSCON_CLK_DATA_DUMP_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_DATA_DUMP_FO_S  31
+
+#define MODEM_SYSCON_CLK_CONF_POWER_ST_REG (DR_REG_MODEM_SYSCON_BASE + 0xc)
+/* MODEM_SYSCON_CLK_ZB_ST_MAP : R/W; bitpos: [11:8]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_ZB_ST_MAP    0x0000000FU
+#define MODEM_SYSCON_CLK_ZB_ST_MAP_M  (MODEM_SYSCON_CLK_ZB_ST_MAP_V << MODEM_SYSCON_CLK_ZB_ST_MAP_S)
+#define MODEM_SYSCON_CLK_ZB_ST_MAP_V  0x0000000FU
+#define MODEM_SYSCON_CLK_ZB_ST_MAP_S  8
+/* MODEM_SYSCON_CLK_FE_ST_MAP : R/W; bitpos: [15:12]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_ST_MAP    0x0000000FU
+#define MODEM_SYSCON_CLK_FE_ST_MAP_M  (MODEM_SYSCON_CLK_FE_ST_MAP_V << MODEM_SYSCON_CLK_FE_ST_MAP_S)
+#define MODEM_SYSCON_CLK_FE_ST_MAP_V  0x0000000FU
+#define MODEM_SYSCON_CLK_FE_ST_MAP_S  12
+/* MODEM_SYSCON_CLK_BT_ST_MAP : R/W; bitpos: [19:16]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_BT_ST_MAP    0x0000000FU
+#define MODEM_SYSCON_CLK_BT_ST_MAP_M  (MODEM_SYSCON_CLK_BT_ST_MAP_V << MODEM_SYSCON_CLK_BT_ST_MAP_S)
+#define MODEM_SYSCON_CLK_BT_ST_MAP_V  0x0000000FU
+#define MODEM_SYSCON_CLK_BT_ST_MAP_S  16
+/* MODEM_SYSCON_CLK_WIFI_ST_MAP : R/W; bitpos: [23:20]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFI_ST_MAP    0x0000000FU
+#define MODEM_SYSCON_CLK_WIFI_ST_MAP_M  (MODEM_SYSCON_CLK_WIFI_ST_MAP_V << MODEM_SYSCON_CLK_WIFI_ST_MAP_S)
+#define MODEM_SYSCON_CLK_WIFI_ST_MAP_V  0x0000000FU
+#define MODEM_SYSCON_CLK_WIFI_ST_MAP_S  20
+/* MODEM_SYSCON_CLK_MODEM_PERI_ST_MAP : R/W; bitpos: [27:24]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_PERI_ST_MAP    0x0000000FU
+#define MODEM_SYSCON_CLK_MODEM_PERI_ST_MAP_M  (MODEM_SYSCON_CLK_MODEM_PERI_ST_MAP_V << MODEM_SYSCON_CLK_MODEM_PERI_ST_MAP_S)
+#define MODEM_SYSCON_CLK_MODEM_PERI_ST_MAP_V  0x0000000FU
+#define MODEM_SYSCON_CLK_MODEM_PERI_ST_MAP_S  24
+/* MODEM_SYSCON_CLK_MODEM_APB_ST_MAP : R/W; bitpos: [31:28]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_MODEM_APB_ST_MAP    0x0000000FU
+#define MODEM_SYSCON_CLK_MODEM_APB_ST_MAP_M  (MODEM_SYSCON_CLK_MODEM_APB_ST_MAP_V << MODEM_SYSCON_CLK_MODEM_APB_ST_MAP_S)
+#define MODEM_SYSCON_CLK_MODEM_APB_ST_MAP_V  0x0000000FU
+#define MODEM_SYSCON_CLK_MODEM_APB_ST_MAP_S  28
+
+#define MODEM_SYSCON_MODEM_RST_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x10)
+/* MODEM_SYSCON_RST_WIFIBB : R/W; bitpos: [8]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_WIFIBB    (BIT(8))
+#define MODEM_SYSCON_RST_WIFIBB_M  (MODEM_SYSCON_RST_WIFIBB_V << MODEM_SYSCON_RST_WIFIBB_S)
+#define MODEM_SYSCON_RST_WIFIBB_V  0x00000001U
+#define MODEM_SYSCON_RST_WIFIBB_S  8
+/* MODEM_SYSCON_RST_WIFIMAC : R/W; bitpos: [10]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_WIFIMAC    (BIT(10))
+#define MODEM_SYSCON_RST_WIFIMAC_M  (MODEM_SYSCON_RST_WIFIMAC_V << MODEM_SYSCON_RST_WIFIMAC_S)
+#define MODEM_SYSCON_RST_WIFIMAC_V  0x00000001U
+#define MODEM_SYSCON_RST_WIFIMAC_S  10
+/* MODEM_SYSCON_RST_FE : R/W; bitpos: [14]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_FE    (BIT(14))
+#define MODEM_SYSCON_RST_FE_M  (MODEM_SYSCON_RST_FE_V << MODEM_SYSCON_RST_FE_S)
+#define MODEM_SYSCON_RST_FE_V  0x00000001U
+#define MODEM_SYSCON_RST_FE_S  14
+/* MODEM_SYSCON_RST_BTMAC_APB : R/W; bitpos: [15]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_BTMAC_APB    (BIT(15))
+#define MODEM_SYSCON_RST_BTMAC_APB_M  (MODEM_SYSCON_RST_BTMAC_APB_V << MODEM_SYSCON_RST_BTMAC_APB_S)
+#define MODEM_SYSCON_RST_BTMAC_APB_V  0x00000001U
+#define MODEM_SYSCON_RST_BTMAC_APB_S  15
+/* MODEM_SYSCON_RST_BTMAC : R/W; bitpos: [16]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_BTMAC    (BIT(16))
+#define MODEM_SYSCON_RST_BTMAC_M  (MODEM_SYSCON_RST_BTMAC_V << MODEM_SYSCON_RST_BTMAC_S)
+#define MODEM_SYSCON_RST_BTMAC_V  0x00000001U
+#define MODEM_SYSCON_RST_BTMAC_S  16
+/* MODEM_SYSCON_RST_BTBB_APB : R/W; bitpos: [17]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_BTBB_APB    (BIT(17))
+#define MODEM_SYSCON_RST_BTBB_APB_M  (MODEM_SYSCON_RST_BTBB_APB_V << MODEM_SYSCON_RST_BTBB_APB_S)
+#define MODEM_SYSCON_RST_BTBB_APB_V  0x00000001U
+#define MODEM_SYSCON_RST_BTBB_APB_S  17
+/* MODEM_SYSCON_RST_BTBB : R/W; bitpos: [18]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_BTBB    (BIT(18))
+#define MODEM_SYSCON_RST_BTBB_M  (MODEM_SYSCON_RST_BTBB_V << MODEM_SYSCON_RST_BTBB_S)
+#define MODEM_SYSCON_RST_BTBB_V  0x00000001U
+#define MODEM_SYSCON_RST_BTBB_S  18
+/* MODEM_SYSCON_RST_ETM : R/W; bitpos: [22]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_ETM    (BIT(22))
+#define MODEM_SYSCON_RST_ETM_M  (MODEM_SYSCON_RST_ETM_V << MODEM_SYSCON_RST_ETM_S)
+#define MODEM_SYSCON_RST_ETM_V  0x00000001U
+#define MODEM_SYSCON_RST_ETM_S  22
+/* MODEM_SYSCON_RST_ZBMAC : R/W; bitpos: [24]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_ZBMAC    (BIT(24))
+#define MODEM_SYSCON_RST_ZBMAC_M  (MODEM_SYSCON_RST_ZBMAC_V << MODEM_SYSCON_RST_ZBMAC_S)
+#define MODEM_SYSCON_RST_ZBMAC_V  0x00000001U
+#define MODEM_SYSCON_RST_ZBMAC_S  24
+/* MODEM_SYSCON_RST_MODEM_ECB : R/W; bitpos: [25]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_MODEM_ECB    (BIT(25))
+#define MODEM_SYSCON_RST_MODEM_ECB_M  (MODEM_SYSCON_RST_MODEM_ECB_V << MODEM_SYSCON_RST_MODEM_ECB_S)
+#define MODEM_SYSCON_RST_MODEM_ECB_V  0x00000001U
+#define MODEM_SYSCON_RST_MODEM_ECB_S  25
+/* MODEM_SYSCON_RST_MODEM_CCM : R/W; bitpos: [26]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_MODEM_CCM    (BIT(26))
+#define MODEM_SYSCON_RST_MODEM_CCM_M  (MODEM_SYSCON_RST_MODEM_CCM_V << MODEM_SYSCON_RST_MODEM_CCM_S)
+#define MODEM_SYSCON_RST_MODEM_CCM_V  0x00000001U
+#define MODEM_SYSCON_RST_MODEM_CCM_S  26
+/* MODEM_SYSCON_RST_MODEM_BAH : R/W; bitpos: [27]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_MODEM_BAH    (BIT(27))
+#define MODEM_SYSCON_RST_MODEM_BAH_M  (MODEM_SYSCON_RST_MODEM_BAH_V << MODEM_SYSCON_RST_MODEM_BAH_S)
+#define MODEM_SYSCON_RST_MODEM_BAH_V  0x00000001U
+#define MODEM_SYSCON_RST_MODEM_BAH_S  27
+/* MODEM_SYSCON_RST_MODEM_SEC : R/W; bitpos: [29]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_MODEM_SEC    (BIT(29))
+#define MODEM_SYSCON_RST_MODEM_SEC_M  (MODEM_SYSCON_RST_MODEM_SEC_V << MODEM_SYSCON_RST_MODEM_SEC_S)
+#define MODEM_SYSCON_RST_MODEM_SEC_V  0x00000001U
+#define MODEM_SYSCON_RST_MODEM_SEC_S  29
+/* MODEM_SYSCON_RST_BLE_TIMER : R/W; bitpos: [30]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_BLE_TIMER    (BIT(30))
+#define MODEM_SYSCON_RST_BLE_TIMER_M  (MODEM_SYSCON_RST_BLE_TIMER_V << MODEM_SYSCON_RST_BLE_TIMER_S)
+#define MODEM_SYSCON_RST_BLE_TIMER_V  0x00000001U
+#define MODEM_SYSCON_RST_BLE_TIMER_S  30
+/* MODEM_SYSCON_RST_DATA_DUMP : R/W; bitpos: [31]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_RST_DATA_DUMP    (BIT(31))
+#define MODEM_SYSCON_RST_DATA_DUMP_M  (MODEM_SYSCON_RST_DATA_DUMP_V << MODEM_SYSCON_RST_DATA_DUMP_S)
+#define MODEM_SYSCON_RST_DATA_DUMP_V  0x00000001U
+#define MODEM_SYSCON_RST_DATA_DUMP_S  31
+
+#define MODEM_SYSCON_CLK_CONF1_REG (DR_REG_MODEM_SYSCON_BASE + 0x14)
+/* MODEM_SYSCON_CLK_WIFIBB_22M_EN : R/W; bitpos: [0]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_22M_EN    (BIT(0))
+#define MODEM_SYSCON_CLK_WIFIBB_22M_EN_M  (MODEM_SYSCON_CLK_WIFIBB_22M_EN_V << MODEM_SYSCON_CLK_WIFIBB_22M_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_22M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_22M_EN_S  0
+/* MODEM_SYSCON_CLK_WIFIBB_40M_EN : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_40M_EN    (BIT(1))
+#define MODEM_SYSCON_CLK_WIFIBB_40M_EN_M  (MODEM_SYSCON_CLK_WIFIBB_40M_EN_V << MODEM_SYSCON_CLK_WIFIBB_40M_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_40M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_40M_EN_S  1
+/* MODEM_SYSCON_CLK_WIFIBB_44M_EN : R/W; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_44M_EN    (BIT(2))
+#define MODEM_SYSCON_CLK_WIFIBB_44M_EN_M  (MODEM_SYSCON_CLK_WIFIBB_44M_EN_V << MODEM_SYSCON_CLK_WIFIBB_44M_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_44M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_44M_EN_S  2
+/* MODEM_SYSCON_CLK_WIFIBB_80M_EN : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_80M_EN    (BIT(3))
+#define MODEM_SYSCON_CLK_WIFIBB_80M_EN_M  (MODEM_SYSCON_CLK_WIFIBB_80M_EN_V << MODEM_SYSCON_CLK_WIFIBB_80M_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_80M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_80M_EN_S  3
+/* MODEM_SYSCON_CLK_WIFIBB_40X_EN : R/W; bitpos: [4]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_40X_EN    (BIT(4))
+#define MODEM_SYSCON_CLK_WIFIBB_40X_EN_M  (MODEM_SYSCON_CLK_WIFIBB_40X_EN_V << MODEM_SYSCON_CLK_WIFIBB_40X_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_40X_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_40X_EN_S  4
+/* MODEM_SYSCON_CLK_WIFIBB_80X_EN : R/W; bitpos: [5]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_80X_EN    (BIT(5))
+#define MODEM_SYSCON_CLK_WIFIBB_80X_EN_M  (MODEM_SYSCON_CLK_WIFIBB_80X_EN_V << MODEM_SYSCON_CLK_WIFIBB_80X_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_80X_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_80X_EN_S  5
+/* MODEM_SYSCON_CLK_WIFIBB_40X1_EN : R/W; bitpos: [6]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_EN    (BIT(6))
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_EN_M  (MODEM_SYSCON_CLK_WIFIBB_40X1_EN_V << MODEM_SYSCON_CLK_WIFIBB_40X1_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_EN_S  6
+/* MODEM_SYSCON_CLK_WIFIBB_80X1_EN : R/W; bitpos: [7]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_EN    (BIT(7))
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_EN_M  (MODEM_SYSCON_CLK_WIFIBB_80X1_EN_V << MODEM_SYSCON_CLK_WIFIBB_80X1_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_EN_S  7
+/* MODEM_SYSCON_CLK_WIFIBB_160X1_EN : R/W; bitpos: [8]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_EN    (BIT(8))
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_EN_M  (MODEM_SYSCON_CLK_WIFIBB_160X1_EN_V << MODEM_SYSCON_CLK_WIFIBB_160X1_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_EN_S  8
+/* MODEM_SYSCON_CLK_WIFIMAC_EN : R/W; bitpos: [9]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIMAC_EN    (BIT(9))
+#define MODEM_SYSCON_CLK_WIFIMAC_EN_M  (MODEM_SYSCON_CLK_WIFIMAC_EN_V << MODEM_SYSCON_CLK_WIFIMAC_EN_S)
+#define MODEM_SYSCON_CLK_WIFIMAC_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIMAC_EN_S  9
+/* MODEM_SYSCON_CLK_WIFI_APB_EN : R/W; bitpos: [10]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFI_APB_EN    (BIT(10))
+#define MODEM_SYSCON_CLK_WIFI_APB_EN_M  (MODEM_SYSCON_CLK_WIFI_APB_EN_V << MODEM_SYSCON_CLK_WIFI_APB_EN_S)
+#define MODEM_SYSCON_CLK_WIFI_APB_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFI_APB_EN_S  10
+/* MODEM_SYSCON_CLK_FE_20M_EN : R/W; bitpos: [11]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_20M_EN    (BIT(11))
+#define MODEM_SYSCON_CLK_FE_20M_EN_M  (MODEM_SYSCON_CLK_FE_20M_EN_V << MODEM_SYSCON_CLK_FE_20M_EN_S)
+#define MODEM_SYSCON_CLK_FE_20M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_20M_EN_S  11
+/* MODEM_SYSCON_CLK_FE_40M_EN : R/W; bitpos: [12]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_40M_EN    (BIT(12))
+#define MODEM_SYSCON_CLK_FE_40M_EN_M  (MODEM_SYSCON_CLK_FE_40M_EN_V << MODEM_SYSCON_CLK_FE_40M_EN_S)
+#define MODEM_SYSCON_CLK_FE_40M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_40M_EN_S  12
+/* MODEM_SYSCON_CLK_FE_80M_EN : R/W; bitpos: [13]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_80M_EN    (BIT(13))
+#define MODEM_SYSCON_CLK_FE_80M_EN_M  (MODEM_SYSCON_CLK_FE_80M_EN_V << MODEM_SYSCON_CLK_FE_80M_EN_S)
+#define MODEM_SYSCON_CLK_FE_80M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_80M_EN_S  13
+/* MODEM_SYSCON_CLK_FE_160M_EN : R/W; bitpos: [14]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_160M_EN    (BIT(14))
+#define MODEM_SYSCON_CLK_FE_160M_EN_M  (MODEM_SYSCON_CLK_FE_160M_EN_V << MODEM_SYSCON_CLK_FE_160M_EN_S)
+#define MODEM_SYSCON_CLK_FE_160M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_160M_EN_S  14
+/* MODEM_SYSCON_CLK_FE_CAL_160M_EN : R/W; bitpos: [15]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_CAL_160M_EN    (BIT(15))
+#define MODEM_SYSCON_CLK_FE_CAL_160M_EN_M  (MODEM_SYSCON_CLK_FE_CAL_160M_EN_V << MODEM_SYSCON_CLK_FE_CAL_160M_EN_S)
+#define MODEM_SYSCON_CLK_FE_CAL_160M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_CAL_160M_EN_S  15
+/* MODEM_SYSCON_CLK_FE_APB_EN : R/W; bitpos: [16]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_APB_EN    (BIT(16))
+#define MODEM_SYSCON_CLK_FE_APB_EN_M  (MODEM_SYSCON_CLK_FE_APB_EN_V << MODEM_SYSCON_CLK_FE_APB_EN_S)
+#define MODEM_SYSCON_CLK_FE_APB_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_APB_EN_S  16
+/* MODEM_SYSCON_CLK_BT_APB_EN : R/W; bitpos: [17]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_BT_APB_EN    (BIT(17))
+#define MODEM_SYSCON_CLK_BT_APB_EN_M  (MODEM_SYSCON_CLK_BT_APB_EN_V << MODEM_SYSCON_CLK_BT_APB_EN_S)
+#define MODEM_SYSCON_CLK_BT_APB_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_BT_APB_EN_S  17
+/* MODEM_SYSCON_CLK_BT_EN : R/W; bitpos: [18]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_BT_EN    (BIT(18))
+#define MODEM_SYSCON_CLK_BT_EN_M  (MODEM_SYSCON_CLK_BT_EN_V << MODEM_SYSCON_CLK_BT_EN_S)
+#define MODEM_SYSCON_CLK_BT_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_BT_EN_S  18
+/* MODEM_SYSCON_CLK_WIFIBB_480M_EN : R/W; bitpos: [19]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_480M_EN    (BIT(19))
+#define MODEM_SYSCON_CLK_WIFIBB_480M_EN_M  (MODEM_SYSCON_CLK_WIFIBB_480M_EN_V << MODEM_SYSCON_CLK_WIFIBB_480M_EN_S)
+#define MODEM_SYSCON_CLK_WIFIBB_480M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_480M_EN_S  19
+/* MODEM_SYSCON_CLK_FE_480M_EN : R/W; bitpos: [20]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_480M_EN    (BIT(20))
+#define MODEM_SYSCON_CLK_FE_480M_EN_M  (MODEM_SYSCON_CLK_FE_480M_EN_V << MODEM_SYSCON_CLK_FE_480M_EN_S)
+#define MODEM_SYSCON_CLK_FE_480M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_480M_EN_S  20
+/* MODEM_SYSCON_CLK_FE_ANAMODE_40M_EN : R/W; bitpos: [21]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_EN    (BIT(21))
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_EN_M  (MODEM_SYSCON_CLK_FE_ANAMODE_40M_EN_V << MODEM_SYSCON_CLK_FE_ANAMODE_40M_EN_S)
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_EN_S  21
+/* MODEM_SYSCON_CLK_FE_ANAMODE_80M_EN : R/W; bitpos: [22]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_EN    (BIT(22))
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_EN_M  (MODEM_SYSCON_CLK_FE_ANAMODE_80M_EN_V << MODEM_SYSCON_CLK_FE_ANAMODE_80M_EN_S)
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_EN_S  22
+/* MODEM_SYSCON_CLK_FE_ANAMODE_160M_EN : R/W; bitpos: [23]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_EN    (BIT(23))
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_EN_M  (MODEM_SYSCON_CLK_FE_ANAMODE_160M_EN_V << MODEM_SYSCON_CLK_FE_ANAMODE_160M_EN_S)
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_EN_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_EN_S  23
+
+#define MODEM_SYSCON_CLK_CONF1_FORCE_ON_REG (DR_REG_MODEM_SYSCON_BASE + 0x18)
+/* MODEM_SYSCON_CLK_WIFIBB_22M_FO : R/W; bitpos: [0]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_22M_FO    (BIT(0))
+#define MODEM_SYSCON_CLK_WIFIBB_22M_FO_M  (MODEM_SYSCON_CLK_WIFIBB_22M_FO_V << MODEM_SYSCON_CLK_WIFIBB_22M_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_22M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_22M_FO_S  0
+/* MODEM_SYSCON_CLK_WIFIBB_40M_FO : R/W; bitpos: [1]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_40M_FO    (BIT(1))
+#define MODEM_SYSCON_CLK_WIFIBB_40M_FO_M  (MODEM_SYSCON_CLK_WIFIBB_40M_FO_V << MODEM_SYSCON_CLK_WIFIBB_40M_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_40M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_40M_FO_S  1
+/* MODEM_SYSCON_CLK_WIFIBB_44M_FO : R/W; bitpos: [2]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_44M_FO    (BIT(2))
+#define MODEM_SYSCON_CLK_WIFIBB_44M_FO_M  (MODEM_SYSCON_CLK_WIFIBB_44M_FO_V << MODEM_SYSCON_CLK_WIFIBB_44M_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_44M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_44M_FO_S  2
+/* MODEM_SYSCON_CLK_WIFIBB_80M_FO : R/W; bitpos: [3]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_80M_FO    (BIT(3))
+#define MODEM_SYSCON_CLK_WIFIBB_80M_FO_M  (MODEM_SYSCON_CLK_WIFIBB_80M_FO_V << MODEM_SYSCON_CLK_WIFIBB_80M_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_80M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_80M_FO_S  3
+/* MODEM_SYSCON_CLK_WIFIBB_40X_FO : R/W; bitpos: [4]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_40X_FO    (BIT(4))
+#define MODEM_SYSCON_CLK_WIFIBB_40X_FO_M  (MODEM_SYSCON_CLK_WIFIBB_40X_FO_V << MODEM_SYSCON_CLK_WIFIBB_40X_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_40X_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_40X_FO_S  4
+/* MODEM_SYSCON_CLK_WIFIBB_80X_FO : R/W; bitpos: [5]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_80X_FO    (BIT(5))
+#define MODEM_SYSCON_CLK_WIFIBB_80X_FO_M  (MODEM_SYSCON_CLK_WIFIBB_80X_FO_V << MODEM_SYSCON_CLK_WIFIBB_80X_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_80X_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_80X_FO_S  5
+/* MODEM_SYSCON_CLK_WIFIBB_40X1_FO : R/W; bitpos: [6]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_FO    (BIT(6))
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_FO_M  (MODEM_SYSCON_CLK_WIFIBB_40X1_FO_V << MODEM_SYSCON_CLK_WIFIBB_40X1_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_40X1_FO_S  6
+/* MODEM_SYSCON_CLK_WIFIBB_80X1_FO : R/W; bitpos: [7]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_FO    (BIT(7))
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_FO_M  (MODEM_SYSCON_CLK_WIFIBB_80X1_FO_V << MODEM_SYSCON_CLK_WIFIBB_80X1_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_80X1_FO_S  7
+/* MODEM_SYSCON_CLK_WIFIBB_160X1_FO : R/W; bitpos: [8]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_FO    (BIT(8))
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_FO_M  (MODEM_SYSCON_CLK_WIFIBB_160X1_FO_V << MODEM_SYSCON_CLK_WIFIBB_160X1_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_160X1_FO_S  8
+/* MODEM_SYSCON_CLK_WIFIMAC_FO : R/W; bitpos: [9]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIMAC_FO    (BIT(9))
+#define MODEM_SYSCON_CLK_WIFIMAC_FO_M  (MODEM_SYSCON_CLK_WIFIMAC_FO_V << MODEM_SYSCON_CLK_WIFIMAC_FO_S)
+#define MODEM_SYSCON_CLK_WIFIMAC_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIMAC_FO_S  9
+/* MODEM_SYSCON_CLK_WIFI_APB_FO : R/W; bitpos: [10]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFI_APB_FO    (BIT(10))
+#define MODEM_SYSCON_CLK_WIFI_APB_FO_M  (MODEM_SYSCON_CLK_WIFI_APB_FO_V << MODEM_SYSCON_CLK_WIFI_APB_FO_S)
+#define MODEM_SYSCON_CLK_WIFI_APB_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFI_APB_FO_S  10
+/* MODEM_SYSCON_CLK_FE_20M_FO : R/W; bitpos: [11]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_20M_FO    (BIT(11))
+#define MODEM_SYSCON_CLK_FE_20M_FO_M  (MODEM_SYSCON_CLK_FE_20M_FO_V << MODEM_SYSCON_CLK_FE_20M_FO_S)
+#define MODEM_SYSCON_CLK_FE_20M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_20M_FO_S  11
+/* MODEM_SYSCON_CLK_FE_40M_FO : R/W; bitpos: [12]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_40M_FO    (BIT(12))
+#define MODEM_SYSCON_CLK_FE_40M_FO_M  (MODEM_SYSCON_CLK_FE_40M_FO_V << MODEM_SYSCON_CLK_FE_40M_FO_S)
+#define MODEM_SYSCON_CLK_FE_40M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_40M_FO_S  12
+/* MODEM_SYSCON_CLK_FE_80M_FO : R/W; bitpos: [13]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_80M_FO    (BIT(13))
+#define MODEM_SYSCON_CLK_FE_80M_FO_M  (MODEM_SYSCON_CLK_FE_80M_FO_V << MODEM_SYSCON_CLK_FE_80M_FO_S)
+#define MODEM_SYSCON_CLK_FE_80M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_80M_FO_S  13
+/* MODEM_SYSCON_CLK_FE_160M_FO : R/W; bitpos: [14]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_160M_FO    (BIT(14))
+#define MODEM_SYSCON_CLK_FE_160M_FO_M  (MODEM_SYSCON_CLK_FE_160M_FO_V << MODEM_SYSCON_CLK_FE_160M_FO_S)
+#define MODEM_SYSCON_CLK_FE_160M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_160M_FO_S  14
+/* MODEM_SYSCON_CLK_FE_CAL_160M_FO : R/W; bitpos: [15]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_CAL_160M_FO    (BIT(15))
+#define MODEM_SYSCON_CLK_FE_CAL_160M_FO_M  (MODEM_SYSCON_CLK_FE_CAL_160M_FO_V << MODEM_SYSCON_CLK_FE_CAL_160M_FO_S)
+#define MODEM_SYSCON_CLK_FE_CAL_160M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_CAL_160M_FO_S  15
+/* MODEM_SYSCON_CLK_FE_APB_FO : R/W; bitpos: [16]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_APB_FO    (BIT(16))
+#define MODEM_SYSCON_CLK_FE_APB_FO_M  (MODEM_SYSCON_CLK_FE_APB_FO_V << MODEM_SYSCON_CLK_FE_APB_FO_S)
+#define MODEM_SYSCON_CLK_FE_APB_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_APB_FO_S  16
+/* MODEM_SYSCON_CLK_BT_APB_FO : R/W; bitpos: [17]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_BT_APB_FO    (BIT(17))
+#define MODEM_SYSCON_CLK_BT_APB_FO_M  (MODEM_SYSCON_CLK_BT_APB_FO_V << MODEM_SYSCON_CLK_BT_APB_FO_S)
+#define MODEM_SYSCON_CLK_BT_APB_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_BT_APB_FO_S  17
+/* MODEM_SYSCON_CLK_BT_FO : R/W; bitpos: [18]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_BT_FO    (BIT(18))
+#define MODEM_SYSCON_CLK_BT_FO_M  (MODEM_SYSCON_CLK_BT_FO_V << MODEM_SYSCON_CLK_BT_FO_S)
+#define MODEM_SYSCON_CLK_BT_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_BT_FO_S  18
+/* MODEM_SYSCON_CLK_WIFIBB_480M_FO : R/W; bitpos: [19]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_WIFIBB_480M_FO    (BIT(19))
+#define MODEM_SYSCON_CLK_WIFIBB_480M_FO_M  (MODEM_SYSCON_CLK_WIFIBB_480M_FO_V << MODEM_SYSCON_CLK_WIFIBB_480M_FO_S)
+#define MODEM_SYSCON_CLK_WIFIBB_480M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_WIFIBB_480M_FO_S  19
+/* MODEM_SYSCON_CLK_FE_480M_FO : R/W; bitpos: [20]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_480M_FO    (BIT(20))
+#define MODEM_SYSCON_CLK_FE_480M_FO_M  (MODEM_SYSCON_CLK_FE_480M_FO_V << MODEM_SYSCON_CLK_FE_480M_FO_S)
+#define MODEM_SYSCON_CLK_FE_480M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_480M_FO_S  20
+/* MODEM_SYSCON_CLK_FE_ANAMODE_40M_FO : R/W; bitpos: [21]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_FO    (BIT(21))
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_FO_M  (MODEM_SYSCON_CLK_FE_ANAMODE_40M_FO_V << MODEM_SYSCON_CLK_FE_ANAMODE_40M_FO_S)
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_ANAMODE_40M_FO_S  21
+/* MODEM_SYSCON_CLK_FE_ANAMODE_80M_FO : R/W; bitpos: [22]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_FO    (BIT(22))
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_FO_M  (MODEM_SYSCON_CLK_FE_ANAMODE_80M_FO_V << MODEM_SYSCON_CLK_FE_ANAMODE_80M_FO_S)
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_ANAMODE_80M_FO_S  22
+/* MODEM_SYSCON_CLK_FE_ANAMODE_160M_FO : R/W; bitpos: [23]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_FO    (BIT(23))
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_FO_M  (MODEM_SYSCON_CLK_FE_ANAMODE_160M_FO_V << MODEM_SYSCON_CLK_FE_ANAMODE_160M_FO_S)
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_FO_V  0x00000001U
+#define MODEM_SYSCON_CLK_FE_ANAMODE_160M_FO_S  23
+
+#define MODEM_SYSCON_WIFI_BB_CFG_REG (DR_REG_MODEM_SYSCON_BASE + 0x1c)
+/* MODEM_SYSCON_WIFI_BB_CFG : R/W; bitpos: [31:0]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_WIFI_BB_CFG    0xFFFFFFFFU
+#define MODEM_SYSCON_WIFI_BB_CFG_M  (MODEM_SYSCON_WIFI_BB_CFG_V << MODEM_SYSCON_WIFI_BB_CFG_S)
+#define MODEM_SYSCON_WIFI_BB_CFG_V  0xFFFFFFFFU
+#define MODEM_SYSCON_WIFI_BB_CFG_S  0
+
+#define MODEM_SYSCON_MEM_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x20)
+/* MODEM_SYSCON_MODEM_MEM_WP : R/W; bitpos: [2:0]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_MODEM_MEM_WP    0x00000007U
+#define MODEM_SYSCON_MODEM_MEM_WP_M  (MODEM_SYSCON_MODEM_MEM_WP_V << MODEM_SYSCON_MODEM_MEM_WP_S)
+#define MODEM_SYSCON_MODEM_MEM_WP_V  0x00000007U
+#define MODEM_SYSCON_MODEM_MEM_WP_S  0
+/* MODEM_SYSCON_MODEM_MEM_WA : R/W; bitpos: [5:3]; default: 4; */
+/*description: */
+#define MODEM_SYSCON_MODEM_MEM_WA    0x00000007U
+#define MODEM_SYSCON_MODEM_MEM_WA_M  (MODEM_SYSCON_MODEM_MEM_WA_V << MODEM_SYSCON_MODEM_MEM_WA_S)
+#define MODEM_SYSCON_MODEM_MEM_WA_V  0x00000007U
+#define MODEM_SYSCON_MODEM_MEM_WA_S  3
+/* MODEM_SYSCON_MODEM_MEM_RA : R/W; bitpos: [7:6]; default: 0; */
+/*description: */
+#define MODEM_SYSCON_MODEM_MEM_RA    0x00000003U
+#define MODEM_SYSCON_MODEM_MEM_RA_M  (MODEM_SYSCON_MODEM_MEM_RA_V << MODEM_SYSCON_MODEM_MEM_RA_S)
+#define MODEM_SYSCON_MODEM_MEM_RA_V  0x00000003U
+#define MODEM_SYSCON_MODEM_MEM_RA_S  6
+
+#define MODEM_SYSCON_DATE_REG (DR_REG_MODEM_SYSCON_BASE + 0x24)
+/* MODEM_SYSCON_DATE : R/W; bitpos: [27:0]; default: 35676928; */
+/*description: */
+#define MODEM_SYSCON_DATE    0x0FFFFFFFU
+#define MODEM_SYSCON_DATE_M  (MODEM_SYSCON_DATE_V << MODEM_SYSCON_DATE_S)
+#define MODEM_SYSCON_DATE_V  0x0FFFFFFFU
+#define MODEM_SYSCON_DATE_S  0
+
+#ifdef __cplusplus
+}
+#endif

components/soc/esp32c6/include/modem/modem_syscon_struct.h

@@ -0,0 +1,205 @@
+/**
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ *  SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef union {
+    struct {
+        uint32_t clk_en:1;
+        uint32_t reserved_1:31;
+    };
+    uint32_t val;
+} modem_syscon_test_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved_0:21;
+        uint32_t clk_data_dump_mux:1;
+        uint32_t clk_etm_en:1;
+        uint32_t clk_zb_apb_en:1;
+        uint32_t clk_zb_mac_en:1;
+        uint32_t clk_modem_sec_ecb_en:1;
+        uint32_t clk_modem_sec_ccm_en:1;
+        uint32_t clk_modem_sec_bah_en:1;
+        uint32_t clk_modem_sec_apb_en:1;
+        uint32_t clk_modem_sec_en:1;
+        uint32_t clk_ble_timer_en:1;
+        uint32_t clk_data_dump_en:1;
+    };
+    uint32_t val;
+} modem_syscon_clk_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved_0:22;
+        uint32_t clk_etm_fo:1;
+        uint32_t clk_zb_apb_fo:1;
+        uint32_t clk_zb_mac_fo:1;
+        uint32_t clk_modem_sec_ecb_fo:1;
+        uint32_t clk_modem_sec_ccm_fo:1;
+        uint32_t clk_modem_sec_bah_fo:1;
+        uint32_t clk_modem_sec_apb_fo:1;
+        uint32_t clk_modem_sec_fo:1;
+        uint32_t clk_ble_timer_fo:1;
+        uint32_t clk_data_dump_fo:1;
+    };
+    uint32_t val;
+} modem_syscon_clk_conf_force_on_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved_0:8;
+        uint32_t clk_zb_st_map:4;
+        uint32_t clk_fe_st_map:4;
+        uint32_t clk_bt_st_map:4;
+        uint32_t clk_wifi_st_map:4;
+        uint32_t clk_modem_peri_st_map:4;
+        uint32_t clk_modem_apb_st_map:4;
+    };
+    uint32_t val;
+} modem_syscon_clk_conf_power_st_reg_t;
+
+typedef union {
+    struct {
+        uint32_t reserved_0:8;
+        uint32_t rst_wifibb:1;
+        uint32_t reserved_9:1;
+        uint32_t rst_wifimac:1;
+        uint32_t reserved_11:3;
+        uint32_t rst_fe:1;
+        uint32_t rst_btmac_apb:1;
+        uint32_t rst_btmac:1;
+        uint32_t rst_btbb_apb:1;
+        uint32_t rst_btbb:1;
+        uint32_t reserved_19:3;
+        uint32_t rst_etm:1;
+        uint32_t reserved_23:1;
+        uint32_t rst_zbmac:1;
+        uint32_t rst_modem_ecb:1;
+        uint32_t rst_modem_ccm:1;
+        uint32_t rst_modem_bah:1;
+        uint32_t reserved_28:1;
+        uint32_t rst_modem_sec:1;
+        uint32_t rst_ble_timer:1;
+        uint32_t rst_data_dump:1;
+    };
+    uint32_t val;
+} modem_syscon_modem_rst_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_wifibb_22m_en:1;
+        uint32_t clk_wifibb_40m_en:1;
+        uint32_t clk_wifibb_44m_en:1;
+        uint32_t clk_wifibb_80m_en:1;
+        uint32_t clk_wifibb_40x_en:1;
+        uint32_t clk_wifibb_80x_en:1;
+        uint32_t clk_wifibb_40x1_en:1;
+        uint32_t clk_wifibb_80x1_en:1;
+        uint32_t clk_wifibb_160x1_en:1;
+        uint32_t clk_wifimac_en:1;
+        uint32_t clk_wifi_apb_en:1;
+        uint32_t clk_fe_20m_en:1;
+        uint32_t clk_fe_40m_en:1;
+        uint32_t clk_fe_80m_en:1;
+        uint32_t clk_fe_160m_en:1;
+        uint32_t clk_fe_cal_160m_en:1;
+        uint32_t clk_fe_apb_en:1;
+        uint32_t clk_bt_apb_en:1;
+        uint32_t clk_bt_en:1;
+        uint32_t clk_wifibb_480m_en:1;
+        uint32_t clk_fe_480m_en:1;
+        uint32_t clk_fe_anamode_40m_en:1;
+        uint32_t clk_fe_anamode_80m_en:1;
+        uint32_t clk_fe_anamode_160m_en:1;
+        uint32_t reserved_24:8;
+    };
+    uint32_t val;
+} modem_syscon_clk_conf1_reg_t;
+
+typedef union {
+    struct {
+        uint32_t clk_wifibb_22m_fo:1;
+        uint32_t clk_wifibb_40m_fo:1;
+        uint32_t clk_wifibb_44m_fo:1;
+        uint32_t clk_wifibb_80m_fo:1;
+        uint32_t clk_wifibb_40x_fo:1;
+        uint32_t clk_wifibb_80x_fo:1;
+        uint32_t clk_wifibb_40x1_fo:1;
+        uint32_t clk_wifibb_80x1_fo:1;
+        uint32_t clk_wifibb_160x1_fo:1;
+        uint32_t clk_wifimac_fo:1;
+        uint32_t clk_wifi_apb_fo:1;
+        uint32_t clk_fe_20m_fo:1;
+        uint32_t clk_fe_40m_fo:1;
+        uint32_t clk_fe_80m_fo:1;
+        uint32_t clk_fe_160m_fo:1;
+        uint32_t clk_fe_cal_160m_fo:1;
+        uint32_t clk_fe_apb_fo:1;
+        uint32_t clk_bt_apb_fo:1;
+        uint32_t clk_bt_fo:1;
+        uint32_t clk_wifibb_480m_fo:1;
+        uint32_t clk_fe_480m_fo:1;
+        uint32_t clk_fe_anamode_40m_fo:1;
+        uint32_t clk_fe_anamode_80m_fo:1;
+        uint32_t clk_fe_anamode_160m_fo:1;
+        uint32_t reserved_24:8;
+    };
+    uint32_t val;
+} modem_syscon_clk_conf1_force_on_reg_t;
+
+typedef union {
+    struct {
+        uint32_t wifi_bb_cfg:32;
+    };
+    uint32_t val;
+} modem_syscon_wifi_bb_cfg_reg_t;
+
+typedef union {
+    struct {
+        uint32_t modem_mem_wp:3;
+        uint32_t modem_mem_wa:3;
+        uint32_t modem_mem_ra:2;
+        uint32_t reserved_8:24;
+    };
+    uint32_t val;
+} modem_syscon_mem_conf_reg_t;
+
+typedef union {
+    struct {
+        uint32_t date:28;
+        uint32_t reserved_28:4;
+    };
+    uint32_t val;
+} modem_syscon_date_reg_t;
+
+
+typedef struct {
+    volatile modem_syscon_test_conf_reg_t test_conf;
+    volatile modem_syscon_clk_conf_reg_t clk_conf;
+    volatile modem_syscon_clk_conf_force_on_reg_t clk_conf_force_on;
+    volatile modem_syscon_clk_conf_power_st_reg_t clk_conf_power_st;
+    volatile modem_syscon_modem_rst_conf_reg_t modem_rst_conf;
+    volatile modem_syscon_clk_conf1_reg_t clk_conf1;
+    volatile modem_syscon_clk_conf1_force_on_reg_t clk_conf1_force_on;
+    volatile modem_syscon_wifi_bb_cfg_reg_t wifi_bb_cfg;
+    volatile modem_syscon_mem_conf_reg_t mem_conf;
+    volatile modem_syscon_date_reg_t date;
+} modem_syscon_dev_t;
+
+extern modem_syscon_dev_t MODEM_SYSCON;
+
+#ifndef __cplusplus
+_Static_assert(sizeof(modem_syscon_dev_t) == 0x28, "Invalid size of modem_syscon_dev_t structure");
+#endif
+
+#ifdef __cplusplus
+}
+#endif

components/soc/esp32c6/include/modem/reg_base.h

@@ -5,4 +5,5 @@
  */
 
 #pragma once
+#define DR_REG_MODEM_SYSCON_BASE  0x600A9800
 #define DR_REG_MODEM_LPCON_BASE   0x600AF000

components/soc/esp32c6/ld/esp32c6.peripherals.ld

@@ -58,6 +58,8 @@ PROVIDE ( PCR               = 0x60096000 );
 PROVIDE ( TEE               = 0x60098000 );
 PROVIDE ( HP_APM            = 0x60099000 );
 
+PROVIDE ( IEEE802154    = 0x600A3000 );
+PROVIDE ( MODEM_SYSCON  = 0x600A9800 );
 PROVIDE ( MODEM_LPCON   = 0x600AF000 );
 
 PROVIDE ( PMU           = 0x600B0000 );
@@ -74,4 +76,3 @@ PROVIDE ( LPPERI        = 0x600B2800 );
 PROVIDE ( LP_ANA_PERI   = 0x600B2C00 );
 PROVIDE ( LP_APM        = 0x600B3800 );
 PROVIDE ( OTP_DEBUG     = 0x600B3C00 );
-PROVIDE ( IEEE802154    = 0x600A3000 );

tools/ci/check_public_headers.py

@@ -97,7 +97,7 @@ class PublicHeaderChecker:
         self.kconfig_macro = re.compile(r'\bCONFIG_[A-Z0-9_]+')
         self.static_assert = re.compile(r'(_Static_assert|static_assert)')
         self.defines_assert = re.compile(r'#define[ \t]+ESP_STATIC_ASSERT')
-        self.auto_soc_header = re.compile(r'components/soc/esp[a-z0-9_]+/include(?:/rev[0-9]+)?/soc/[a-zA-Z0-9_]+.h')
+        self.auto_soc_header = re.compile(r'components/soc/esp[a-z0-9_]+/include(?:/rev[0-9]+)?/(soc|modem)/[a-zA-Z0-9_]+.h')
         self.assembly_nocode = r'^\s*(\.file|\.text|\.ident|\.option|\.attribute).*$'
         self.check_threads: List[Thread] = []