freertos: Enable FreeRTOS SMP unicore build

This commit enables unicore build with the FreeRTOS SMP kernel.

components/freertos/FreeRTOS-Kernel-SMP/portable/xtensa/port.c

@@ -438,7 +438,9 @@ static void vPortTaskWrapper(TaskFunction_t pxCode, void *pvParameters)
 #endif
 
 const DRAM_ATTR uint32_t offset_pxEndOfStack = offsetof(StaticTask_t, pxDummy8);
+#if ( configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
 const DRAM_ATTR uint32_t offset_uxCoreAffinityMask = offsetof(StaticTask_t, uxDummy25);
+#endif // ( configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
 const DRAM_ATTR uint32_t offset_cpsa = XT_CP_SIZE;
 
 #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
@@ -555,7 +557,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 }
 
 // -------------------- Co-Processor -----------------------
-#if XCHAL_CP_NUM > 0
+#if ( XCHAL_CP_NUM > 0 && configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
 
 void _xt_coproc_release(volatile void *coproc_sa_base, BaseType_t xCoreID);
 
@@ -577,7 +579,7 @@ void vPortCleanUpCoprocArea( void * pxTCB )
     /* If task has live floating point registers somewhere, release them */
     _xt_coproc_release( coproc_area, xCoreID );
 }
-#endif /* XCHAL_CP_NUM > 0 */
+#endif // ( XCHAL_CP_NUM > 0 && configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
 
 // ------- Thread Local Storage Pointers Deletion Callbacks -------
 
@@ -695,8 +697,8 @@ void vPortCleanUpTCB ( void *pxTCB )
     vPortTLSPointersDelCb( pxTCB );
 #endif /* CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS */
 
-#if XCHAL_CP_NUM > 0
+#if ( XCHAL_CP_NUM > 0 && configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
     /* Cleanup coproc save area */
     vPortCleanUpCoprocArea( pxTCB );
-#endif /* XCHAL_CP_NUM > 0 */
+#endif // ( XCHAL_CP_NUM > 0 && configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
 }

components/freertos/FreeRTOS-Kernel-SMP/portable/xtensa/xtensa_vectors.S

@@ -108,7 +108,9 @@
   Please change this when the tcb structure is changed
 */
 .extern pxCurrentTCBs
+#if ( configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
 .extern offset_uxCoreAffinityMask
+#endif // ( configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
 
 /*
 --------------------------------------------------------------------------------
@@ -947,6 +949,7 @@ _xt_coproc_exc:
     beqz    a15, .L_goto_invalid            /* not in a thread (invalid) */
     #endif
 
+#if ( XCHAL_CP_NUM > 0 && configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
     /* CP operations are incompatible with unpinned tasks. Thus we pin the task
     to the current running core. */
     movi    a2, pxCurrentTCBs
@@ -960,6 +963,8 @@ _xt_coproc_exc:
     movi    a4, 1
     sll     a4, a4                          /* a4 = uxCoreAffinityMask = (1 << core ID) */
     s32i    a4, a2, 0                       /* Store affinity mask to TCB.uxCoreAffinityMask */
+#endif // ( XCHAL_CP_NUM > 0 && configUSE_CORE_AFFINITY == 1 && configNUM_CORES > 1 )
+
 #if CONFIG_FREERTOS_FPU_IN_ISR
 .L_skip_core_pin:
 #endif