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Merge branch 'bugfix/fix_uart_module_enable_issue_v4.1' into 'release/v4.1'

Bugfix (uart):  fix uart module reset issue (release/v4.1)

See merge request espressif/esp-idf!8592
Michael (XIAO Xufeng) пре 5 година
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ab1f6299ff
2 измењених фајлова са 3 додато и 1 уклоњено
  1. 1 1
      components/esp32/system_api_esp32.c
  2. 2 0
      components/soc/esp32/include/hal/uart_ll.h

+ 1 - 1
components/esp32/system_api_esp32.c

@@ -102,7 +102,7 @@ void IRAM_ATTR esp_restart_noos(void)
 
     // Reset timer/spi/uart
     DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,
-            DPORT_TIMERS_RST | DPORT_SPI01_RST | DPORT_SPI2_RST | DPORT_SPI3_RST | DPORT_SPI_DMA_RST | DPORT_UART_RST | DPORT_UART1_RST | DPORT_UART2_RST);
+            DPORT_TIMERS_RST | DPORT_SPI01_RST | DPORT_SPI2_RST | DPORT_SPI3_RST | DPORT_SPI_DMA_RST | DPORT_UART_RST | DPORT_UART1_RST | DPORT_UART2_RST | DPORT_UART_MEM_RST);
     DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0);
 
     // Set CPU back to XTAL source, no PLL, same as hard reset

+ 2 - 0
components/soc/esp32/include/hal/uart_ll.h

@@ -215,6 +215,8 @@ static inline void uart_ll_rxfifo_rst(uart_dev_t *hw)
 /**
  * @brief  Reset the UART hw txfifo.
  *
+ * Note:   Due to hardware issue, reset UART1's txfifo will also reset UART2's txfifo.
+ *
  * @param  hw Beginning address of the peripheral registers.
  *
  * @return None