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@@ -27,28 +27,32 @@ extern "C" {
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*/
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static inline long semihosting_call(long id, long *data, int *out_errno) // NOLINT(readability-non-const-parameter)
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{
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- long host_ret;
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- long host_errno;
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+ /* GCC doesn't allow using specific register names in constraints for Xtensa.
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+ * For this case, GCC extended inline assembly manual says the following:
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+ * If you must use a specific register, but your Machine Constraints do not provide
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+ * sufficient control to select the specific register you want, local register variables
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+ * may provide a solution.
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+ * Using local register variables results in simpler generated code than
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+ * the previous implementation which listed a2-a6 as clobbered registers.
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+ */
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+ register long a2 asm ("a2") = id;
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+ register long a3 asm ("a3") = (long) data[0];
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+ register long a4 asm ("a4") = (long) data[1];
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+ register long a5 asm ("a5") = (long) data[2];
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+ register long a6 asm ("a6") = (long) data[3];
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+
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/* The break instruction operands should be (1, 14) according to the ISA manual.
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* We keep (1, 1) for compatibility, until OpenOCD is updated to support both
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* conventions.
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*/
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__asm__ __volatile__ (
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- "mov a2, %[sys_nr]\n" \
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- "mov a3, %[arg1]\n" \
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- "mov a4, %[arg2]\n" \
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- "mov a5, %[arg3]\n" \
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- "mov a6, %[arg4]\n" \
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- "break 1, 1\n" \
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- "mov %[host_ret], a2\n" \
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- "mov %[host_errno], a3\n" \
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- :[host_ret]"=r"(host_ret), [host_errno]"=r"(host_errno)
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- :[sys_nr]"r"(id),
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- [arg1]"r"(data[0]),
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- [arg2]"r"(data[1]),
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- [arg3]"r"(data[2]),
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- [arg4]"r"(data[3])
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- :"a2", "a3", "a4", "a5", "a6");
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+ "break 1, 1\n"
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+ : "+r"(a2), "+r"(a3)
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+ : "r"(a4), "r"(a5), "r"(a6)
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+ : "memory");
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+
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+ long host_ret = a2;
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+ long host_errno = a3;
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if (host_ret < 0) {
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*out_errno = host_errno;
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}
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