Просмотр исходного кода

efuse(H2): Adds RF Calibration Information

KonstantinKondrashov 2 лет назад
Родитель
Сommit
aef81cceee

+ 57 - 3
components/efuse/esp32h2/esp_efuse_table.c

@@ -9,7 +9,7 @@
 #include <assert.h>
 #include "esp_efuse_table.h"
 
-// md5_digest_table 910e196e9c9c5c052f1c57710fe3977c
+// md5_digest_table 35c27f867ff30c0bcddad78a296ab037
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -183,6 +183,18 @@ static const esp_efuse_desc_t WR_DIS_MAC_EXT[] = {
     {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of MAC_EXT,
 };
 
+static const esp_efuse_desc_t WR_DIS_RXIQ_VERSION[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of RXIQ_VERSION,
+};
+
+static const esp_efuse_desc_t WR_DIS_RXIQ_0[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of RXIQ_0,
+};
+
+static const esp_efuse_desc_t WR_DIS_RXIQ_1[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of RXIQ_1,
+};
+
 static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MINOR[] = {
     {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of WAFER_VERSION_MINOR,
 };
@@ -484,6 +496,18 @@ static const esp_efuse_desc_t MAC_EXT[] = {
     {EFUSE_BLK1, 48, 16}, 	 // [] Stores the extended bits of MAC address,
 };
 
+static const esp_efuse_desc_t RXIQ_VERSION[] = {
+    {EFUSE_BLK1, 64, 3}, 	 // [] RF Calibration data. RXIQ version,
+};
+
+static const esp_efuse_desc_t RXIQ_0[] = {
+    {EFUSE_BLK1, 67, 7}, 	 // [] RF Calibration data. RXIQ data 0,
+};
+
+static const esp_efuse_desc_t RXIQ_1[] = {
+    {EFUSE_BLK1, 74, 7}, 	 // [] RF Calibration data. RXIQ data 1,
+};
+
 static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
     {EFUSE_BLK1, 114, 3}, 	 // [],
 };
@@ -517,7 +541,7 @@ static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
 };
 
 static const esp_efuse_desc_t BLK_VERSION_MINOR[] = {
-    {EFUSE_BLK2, 130, 3}, 	 // [] BLK_VERSION_MINOR of BLOCK2,
+    {EFUSE_BLK2, 130, 3}, 	 // [] BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1,
 };
 
 static const esp_efuse_desc_t BLK_VERSION_MAJOR[] = {
@@ -778,6 +802,21 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[] = {
     NULL
 };
 
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_VERSION[] = {
+    &WR_DIS_RXIQ_VERSION[0],    		// [] wr_dis of RXIQ_VERSION
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_0[] = {
+    &WR_DIS_RXIQ_0[0],    		// [] wr_dis of RXIQ_0
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_1[] = {
+    &WR_DIS_RXIQ_1[0],    		// [] wr_dis of RXIQ_1
+    NULL
+};
+
 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[] = {
     &WR_DIS_WAFER_VERSION_MINOR[0],    		// [] wr_dis of WAFER_VERSION_MINOR
     NULL
@@ -1153,6 +1192,21 @@ const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = {
     NULL
 };
 
+const esp_efuse_desc_t* ESP_EFUSE_RXIQ_VERSION[] = {
+    &RXIQ_VERSION[0],    		// [] RF Calibration data. RXIQ version
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_RXIQ_0[] = {
+    &RXIQ_0[0],    		// [] RF Calibration data. RXIQ data 0
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_RXIQ_1[] = {
+    &RXIQ_1[0],    		// [] RF Calibration data. RXIQ data 1
+    NULL
+};
+
 const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
     &WAFER_VERSION_MINOR[0],    		// []
     NULL
@@ -1194,7 +1248,7 @@ const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
 };
 
 const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[] = {
-    &BLK_VERSION_MINOR[0],    		// [] BLK_VERSION_MINOR of BLOCK2
+    &BLK_VERSION_MINOR[0],    		// [] BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
     NULL
 };
 

+ 8 - 2
components/efuse/esp32h2/esp_efuse_table.csv

@@ -9,7 +9,7 @@
 # this will generate new source files, next rebuild all the sources.
 # !!!!!!!!!!! #
 
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 304372753f7bc2d7665354c487c05b4e
+# This file was generated by regtools.py based on the efuses.yaml file with the version: 4df10f83de85f2d830b7c466aabb28e7
 
 WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
 WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
@@ -53,6 +53,9 @@ WR_DIS.HYS_EN_PAD1,                              EFUSE_BLK0,  19,   1, [] wr_dis
 WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
 WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
 WR_DIS.MAC_EXT,                                  EFUSE_BLK0,  20,   1, [] wr_dis of MAC_EXT
+WR_DIS.RXIQ_VERSION,                             EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_VERSION
+WR_DIS.RXIQ_0,                                   EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_0
+WR_DIS.RXIQ_1,                                   EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_1
 WR_DIS.WAFER_VERSION_MINOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR
 WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
 WR_DIS.DISABLE_WAFER_VERSION_MAJOR,              EFUSE_BLK0,  20,   1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
@@ -132,6 +135,9 @@ MAC,                                             EFUSE_BLK1,  40,   8, [MAC_FACT
 ,                                                EFUSE_BLK1,   8,   8, [MAC_FACTORY] MAC address
 ,                                                EFUSE_BLK1,   0,   8, [MAC_FACTORY] MAC address
 MAC_EXT,                                         EFUSE_BLK1,  48,  16, [] Stores the extended bits of MAC address
+RXIQ_VERSION,                                    EFUSE_BLK1,  64,   3, [] RF Calibration data. RXIQ version
+RXIQ_0,                                          EFUSE_BLK1,  67,   7, [] RF Calibration data. RXIQ data 0
+RXIQ_1,                                          EFUSE_BLK1,  74,   7, [] RF Calibration data. RXIQ data 1
 WAFER_VERSION_MINOR,                             EFUSE_BLK1, 114,   3, []
 WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 117,   2, []
 DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK1, 119,   1, [] Disables check of wafer version major
@@ -140,7 +146,7 @@ FLASH_TEMP,                                      EFUSE_BLK1, 123,   2, []
 FLASH_VENDOR,                                    EFUSE_BLK1, 125,   3, []
 PKG_VERSION,                                     EFUSE_BLK1, 128,   3, [] Package version
 OPTIONAL_UNIQUE_ID,                              EFUSE_BLK2,   0, 128, [] Optional unique 128-bit ID
-BLK_VERSION_MINOR,                               EFUSE_BLK2, 130,   3, [] BLK_VERSION_MINOR of BLOCK2
+BLK_VERSION_MINOR,                               EFUSE_BLK2, 130,   3, [] BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
 BLK_VERSION_MAJOR,                               EFUSE_BLK2, 133,   2, [] BLK_VERSION_MAJOR of BLOCK2
 DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK2, 135,   1, [] Disables check of blk version major
 USER_DATA,                                       EFUSE_BLK3,   0, 256, [BLOCK_USR_DATA] User data

+ 7 - 1
components/efuse/esp32h2/include/esp_efuse_table.h

@@ -10,7 +10,7 @@ extern "C" {
 
 #include "esp_efuse.h"
 
-// md5_digest_table 910e196e9c9c5c052f1c57710fe3977c
+// md5_digest_table 35c27f867ff30c0bcddad78a296ab037
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -68,6 +68,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[];
 #define ESP_EFUSE_WR_DIS_MAC_FACTORY ESP_EFUSE_WR_DIS_MAC
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_VERSION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_1[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_WAFER_VERSION_MAJOR[];
@@ -168,6 +171,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_HYS_EN_PAD1[];
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC[];
 #define ESP_EFUSE_MAC_FACTORY ESP_EFUSE_MAC
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RXIQ_VERSION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RXIQ_0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RXIQ_1[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[];

+ 28 - 14
components/soc/esp32h2/include/soc/efuse_reg.h

@@ -612,20 +612,34 @@ extern "C" {
  *  BLOCK1 data register $n.
  */
 #define EFUSE_RD_MAC_SYS_2_REG (DR_REG_EFUSE_BASE + 0x4c)
-/** EFUSE_MAC_RESERVED_1 : RO; bitpos: [13:0]; default: 0;
- *  Reserved.
- */
-#define EFUSE_MAC_RESERVED_1    0x00003FFFU
-#define EFUSE_MAC_RESERVED_1_M  (EFUSE_MAC_RESERVED_1_V << EFUSE_MAC_RESERVED_1_S)
-#define EFUSE_MAC_RESERVED_1_V  0x00003FFFU
-#define EFUSE_MAC_RESERVED_1_S  0
-/** EFUSE_MAC_RESERVED_0 : RO; bitpos: [31:14]; default: 0;
- *  Reserved.
+/** EFUSE_RXIQ_VERSION : R; bitpos: [2:0]; default: 0;
+ *  RF Calibration data. RXIQ version
+ */
+#define EFUSE_RXIQ_VERSION    0x00000007U
+#define EFUSE_RXIQ_VERSION_M  (EFUSE_RXIQ_VERSION_V << EFUSE_RXIQ_VERSION_S)
+#define EFUSE_RXIQ_VERSION_V  0x00000007U
+#define EFUSE_RXIQ_VERSION_S  0
+/** EFUSE_RXIQ_0 : R; bitpos: [9:3]; default: 0;
+ *  RF Calibration data. RXIQ data 0
+ */
+#define EFUSE_RXIQ_0    0x0000007FU
+#define EFUSE_RXIQ_0_M  (EFUSE_RXIQ_0_V << EFUSE_RXIQ_0_S)
+#define EFUSE_RXIQ_0_V  0x0000007FU
+#define EFUSE_RXIQ_0_S  3
+/** EFUSE_RXIQ_1 : R; bitpos: [16:10]; default: 0;
+ *  RF Calibration data. RXIQ data 1
+ */
+#define EFUSE_RXIQ_1    0x0000007FU
+#define EFUSE_RXIQ_1_M  (EFUSE_RXIQ_1_V << EFUSE_RXIQ_1_S)
+#define EFUSE_RXIQ_1_V  0x0000007FU
+#define EFUSE_RXIQ_1_S  10
+/** EFUSE_RESERVED_1_81 : R; bitpos: [31:17]; default: 0;
+ *  reserved
  */
-#define EFUSE_MAC_RESERVED_0    0x0003FFFFU
-#define EFUSE_MAC_RESERVED_0_M  (EFUSE_MAC_RESERVED_0_V << EFUSE_MAC_RESERVED_0_S)
-#define EFUSE_MAC_RESERVED_0_V  0x0003FFFFU
-#define EFUSE_MAC_RESERVED_0_S  14
+#define EFUSE_RESERVED_1_81    0x00007FFFU
+#define EFUSE_RESERVED_1_81_M  (EFUSE_RESERVED_1_81_V << EFUSE_RESERVED_1_81_S)
+#define EFUSE_RESERVED_1_81_V  0x00007FFFU
+#define EFUSE_RESERVED_1_81_S  17
 
 /** EFUSE_RD_MAC_SYS_3_REG register
  *  BLOCK1 data register $n.
@@ -762,7 +776,7 @@ extern "C" {
 #define EFUSE_RESERVED_2_128_V  0x00000003U
 #define EFUSE_RESERVED_2_128_S  0
 /** EFUSE_BLK_VERSION_MINOR : R; bitpos: [4:2]; default: 0;
- *  BLK_VERSION_MINOR of BLOCK2
+ *  BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
  */
 #define EFUSE_BLK_VERSION_MINOR    0x00000007U
 #define EFUSE_BLK_VERSION_MINOR_M  (EFUSE_BLK_VERSION_MINOR_V << EFUSE_BLK_VERSION_MINOR_S)

+ 15 - 7
components/soc/esp32h2/include/soc/efuse_struct.h

@@ -486,14 +486,22 @@ typedef union {
  */
 typedef union {
     struct {
-        /** mac_reserved_1 : RO; bitpos: [13:0]; default: 0;
-         *  Reserved.
+        /** rxiq_version : R; bitpos: [2:0]; default: 0;
+         *  RF Calibration data. RXIQ version
          */
-        uint32_t mac_reserved_1:14;
-        /** mac_reserved_0 : RO; bitpos: [31:14]; default: 0;
-         *  Reserved.
+        uint32_t rxiq_version:3;
+        /** rxiq_0 : R; bitpos: [9:3]; default: 0;
+         *  RF Calibration data. RXIQ data 0
+         */
+        uint32_t rxiq_0:7;
+        /** rxiq_1 : R; bitpos: [16:10]; default: 0;
+         *  RF Calibration data. RXIQ data 1
+         */
+        uint32_t rxiq_1:7;
+        /** reserved_1_81 : R; bitpos: [31:17]; default: 0;
+         *  reserved
          */
-        uint32_t mac_reserved_0:18;
+        uint32_t reserved_1_81:15;
     };
     uint32_t val;
 } efuse_rd_mac_sys_2_reg_t;
@@ -617,7 +625,7 @@ typedef union {
          */
         uint32_t reserved_2_128:2;
         /** blk_version_minor : R; bitpos: [4:2]; default: 0;
-         *  BLK_VERSION_MINOR of BLOCK2
+         *  BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
          */
         uint32_t blk_version_minor:3;
         /** blk_version_major : R; bitpos: [6:5]; default: 0;