feat(efuse): Support eFuses and doc for ESP32P4

components/efuse/esp32p4/include/esp_efuse_chip.h

@@ -73,6 +73,7 @@ typedef enum {
     ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,          /**< SECURE_BOOT_DIGEST0 (Secure Boot key digest) */
     ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,         /**< SECURE_BOOT_DIGEST1 (Secure Boot key digest) */
     ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,         /**< SECURE_BOOT_DIGEST2 (Secure Boot key digest) */
+    ESP_EFUSE_KEY_PURPOSE_KM_INIT_KEY = 12,                 /**< KM_INIT_KEY */
     ESP_EFUSE_KEY_PURPOSE_MAX,                              /**< MAX PURPOSE */
 } esp_efuse_purpose_t;
 

components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c

@@ -305,6 +305,9 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
 #endif //#ifdef SOC_EFUSE_SUPPORT_XTS_AES_256_KEYS
 #if SOC_ECDSA_SUPPORTED
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
+#endif
+#if SOC_KEY_MANAGER_SUPPORTED
+            purpose == ESP_EFUSE_KEY_PURPOSE_KM_INIT_KEY ||
 #endif
             purpose == ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL ||
             purpose == ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG ||

components/efuse/test_apps/main/with_key_purposes/test_efuse_keys.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -290,7 +290,7 @@ TEST_CASE("Test esp_efuse_write_keys", "[efuse]")
 #else
     esp_efuse_purpose_t purpose1[BLOCKS_NEEDED1] = {
         ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY,
-        ESP_EFUSE_KEY_PURPOSE_RESERVED
+        ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL
     };
 #endif
     uint8_t keys1[BLOCKS_NEEDED1][32] = {{0xEE}};
@@ -437,19 +437,24 @@ TEST_CASE("Test set_write_protect_of_digest_revoke", "[efuse]")
     TEST_ESP_OK(esp_efuse_set_write_protect_of_digest_revoke(2));
     TEST_ASSERT_TRUE(esp_efuse_get_write_protect_of_digest_revoke(2));
 
+#if CONFIG_EFUSE_VIRTUAL
     TEST_ESP_OK(esp_efuse_set_digest_revoke(0));
     TEST_ESP_OK(esp_efuse_set_digest_revoke(1));
     TEST_ESP_OK(esp_efuse_set_digest_revoke(2));
 
+    TEST_ASSERT_TRUE(esp_efuse_get_digest_revoke(0));
+    TEST_ASSERT_TRUE(esp_efuse_get_digest_revoke(1));
+    TEST_ASSERT_TRUE(esp_efuse_get_digest_revoke(2));
+#endif // CONFIG_EFUSE_VIRTUAL
+
 #if CONFIG_EFUSE_FPGA_TEST && !CONFIG_EFUSE_VIRTUAL
+    TEST_ESP_ERR(ESP_FAIL, esp_efuse_set_digest_revoke(0));
+    TEST_ESP_ERR(ESP_FAIL, esp_efuse_set_digest_revoke(1));
+    TEST_ESP_ERR(ESP_FAIL, esp_efuse_set_digest_revoke(2));
     // the write protection bits are set and the revocation bits will not be changed.
     TEST_ASSERT_FALSE(esp_efuse_get_digest_revoke(0));
     TEST_ASSERT_FALSE(esp_efuse_get_digest_revoke(1));
     TEST_ASSERT_FALSE(esp_efuse_get_digest_revoke(2));
-#else
-    TEST_ASSERT_TRUE(esp_efuse_get_digest_revoke(0));
-    TEST_ASSERT_TRUE(esp_efuse_get_digest_revoke(1));
-    TEST_ASSERT_TRUE(esp_efuse_get_digest_revoke(2));
 #endif // CONFIG_EFUSE_FPGA_TEST && !CONFIG_EFUSE_VIRTUAL
 }
 #endif // SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY

components/esp_rom/include/esp32p4/rom/efuse.h

@@ -27,7 +27,9 @@ extern "C" {
 
 typedef enum {
     ETS_EFUSE_KEY_PURPOSE_USER = 0,
-    ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
+    ETS_EFUSE_KEY_PURPOSE_ECDSA_KEY = 1,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,
+    ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,
     ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
     ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
     ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
@@ -36,6 +38,7 @@ typedef enum {
     ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
     ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
     ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
+    ETS_EFUSE_KEY_PURPOSE_KM_INIT_KEY = 12,
     ETS_EFUSE_KEY_PURPOSE_MAX,
 } ets_efuse_purpose_t;
 

components/hal/esp32p4/efuse_hal.c

@@ -30,7 +30,7 @@ IRAM_ATTR uint32_t efuse_hal_get_minor_chip_version(void)
 void efuse_hal_set_timing(uint32_t apb_freq_hz)
 {
     (void) apb_freq_hz;
-    efuse_ll_set_pwr_off_num(0x190);
+    /* keep timing settings by default */
 }
 
 void efuse_hal_read(void)

components/hal/esp32p4/include/hal/efuse_ll.h

@@ -18,8 +18,6 @@ extern "C" {
 
 // Always inline these functions even no gcc optimization is applied.
 
-//TODO: IDF-7549
-
 /******************* eFuse fields *************************/
 
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void)
@@ -67,7 +65,7 @@ __attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_ver
 
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_major(void)
 {
-    return EFUSE.rd_sys_part1_data4.val;
+    return 0;
 }
 
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_minor(void)

docs/docs_not_updated/esp32p4.txt

@@ -166,8 +166,6 @@ api-reference/system/perfmon.rst
 api-reference/system/ulp-lp-core.rst
 api-reference/system/ulp.rst
 api-reference/system/esp_function_with_shared_stack.rst
-api-reference/system/efuse.rst
-api-reference/system/chip_revision.rst
 api-reference/system/ulp_instruction_set.rst
 api-reference/system/async_memcpy.rst
 api-reference/system/random.rst
@@ -183,10 +181,7 @@ api-reference/system/power_management.rst
 api-reference/system/mem_alloc.rst
 api-reference/system/misc_system_api.rst
 api-reference/system/bootloader_image_format.rst
-api-reference/system/inc/espefuse_summary_ESP32-P4.rst
 api-reference/system/inc/power_management_esp32p4.rst
-api-reference/system/inc/show-efuse-table_ESP32-P4.rst
-api-reference/system/inc/revisions_ESP32-P4.rst
 api-reference/system/heap_debug.rst
 api-reference/system/mm.rst
 api-reference/system/ipc.rst

docs/en/api-reference/system/inc/espefuse_summary_ESP32-P4.rst

@@ -1,3 +1,200 @@
 .. code-block:: none
 
-   TO BE UPDATED IDF-7759
+    espefuse.py -p PORT summary
+
+    espefuse.py v4.7.dev1
+    Connecting....
+    Detecting chip type... ESP32-P4
+    
+    === Run "summary" command ===
+    EFUSE_NAME (Block) Description  = [Meaningful Value] [Readable/Writeable] (Hex Value)
+    ----------------------------------------------------------------------------------------
+    Config fuses:
+    WR_DIS (BLOCK0)                                    Disable programming of individual eFuses           = 0 R/W (0x00000000)
+    RD_DIS (BLOCK0)                                    Disable reading from BlOCK4-10                     = 0 R/W (0b0000000)
+    POWERGLITCH_EN (BLOCK0)                            Represents whether power glitch function is enable = False R/W (0b0)
+                                                       d. 1: enabled. 0: disabled                        
+    DIS_TWAI (BLOCK0)                                  Represents whether TWAI function is disabled or en = False R/W (0b0)
+                                                       abled. 1: disabled. 0: enabled                    
+    KM_HUK_GEN_STATE_LOW (BLOCK0)                      Set this bit to control validation of HUK generate = 0 R/W (0b000000)
+                                                        mode. Odd of 1 is invalid; even of 1 is valid    
+    KM_HUK_GEN_STATE_HIGH (BLOCK0)                     Set this bit to control validation of HUK generate = 0 R/W (0b000)
+                                                        mode. Odd of 1 is invalid; even of 1 is valid    
+    KM_RND_SWITCH_CYCLE (BLOCK0)                       Set bits to control key manager random number swit = 0 R/W (0b00)
+                                                       ch cycle. 0: control by register. 1: 8 km clk cycl
+                                                       es. 2: 16 km cycles. 3: 32 km cycles              
+    KM_DEPLOY_ONLY_ONCE (BLOCK0)                       Set each bit to control whether corresponding key  = 0 R/W (0x0)
+                                                       can only be deployed once. 1 is true; 0 is false. 
+                                                       Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds      
+    DIS_DIRECT_BOOT (BLOCK0)                           Represents whether direct boot mode is disabled or = False R/W (0b0)
+                                                        enabled. 1: disabled. 0: enabled                 
+    UART_PRINT_CONTROL (BLOCK0)                        Represents the type of UART printing. 00: force en = 0 R/W (0b00)
+                                                       able printing. 01: enable printing when GPIO8 is r
+                                                       eset at low level. 10: enable printing when GPIO8 
+                                                       is reset at high level. 11: force disable printing
+    HYS_EN_PAD (BLOCK0)                                Represents whether the hysteresis function of corr = False R/W (0b0)
+                                                       esponding PAD is enabled. 1: enabled. 0:disabled  
+    DCDC_VSET (BLOCK0)                                 Set the dcdc voltage default                       = 0 R/W (0b00000)
+    PXA0_TIEH_SEL_0 (BLOCK0)                           TBD                                                = 0 R/W (0b00)
+    PXA0_TIEH_SEL_1 (BLOCK0)                           TBD                                                = 0 R/W (0b00)
+    PXA0_TIEH_SEL_2 (BLOCK0)                           TBD                                                = 0 R/W (0b00)
+    PXA0_TIEH_SEL_3 (BLOCK0)                           TBD                                                = 0 R/W (0b00)
+    KM_DISABLE_DEPLOY_MODE (BLOCK0)                    TBD                                                = 0 R/W (0x0)
+    HP_PWR_SRC_SEL (BLOCK0)                            HP system power source select. 0:LDO. 1: DCDC      = False R/W (0b0)
+    DCDC_VSET_EN (BLOCK0)                              Select dcdc vset use efuse_dcdc_vset               = False R/W (0b0)
+    DIS_SWD (BLOCK0)                                   Set this bit to disable super-watchdog             = False R/W (0b0)
+    BLOCK_SYS_DATA1 (BLOCK2)                           System data part 1                                
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    BLOCK_USR_DATA (BLOCK3)                            User data                                         
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    BLOCK_SYS_DATA2 (BLOCK10)                          System data part 2 (reserved)                     
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    
+    Flash fuses:
+    FLASH_TYPE (BLOCK0)                                The type of interfaced flash. 0: four data lines;  = False R/W (0b0)
+                                                       1: eight data lines                               
+    FLASH_PAGE_SIZE (BLOCK0)                           Set flash page size                                = 0 R/W (0b00)
+    FLASH_ECC_EN (BLOCK0)                              Set this bit to enable ecc for flash boot          = False R/W (0b0)
+    FLASH_TPUW (BLOCK0)                                Represents the flash waiting time after power-up;  = 0 R/W (0x0)
+                                                       in unit of ms. When the value less than 15; the wa
+                                                       iting time is the programmed value. Otherwise; the
+                                                        waiting time is 2 times the programmed value     
+    FORCE_SEND_RESUME (BLOCK0)                         Represents whether ROM code is forced to send a re = False R/W (0b0)
+                                                       sume command during SPI boot. 1: forced. 0:not for
+                                                       ced                                               
+    
+    Jtag fuses:
+    JTAG_SEL_ENABLE (BLOCK0)                           Represents whether the selection between usb_to_jt = False R/W (0b0)
+                                                       ag and pad_to_jtag through strapping gpio15 when b
+                                                       oth EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are 
+                                                       equal to 0 is enabled or disabled. 1: enabled. 0: 
+                                                       disabled                                          
+    SOFT_DIS_JTAG (BLOCK0)                             Represents whether JTAG is disabled in soft way. O = 0 R/W (0b000)
+                                                       dd number: disabled. Even number: enabled         
+    DIS_PAD_JTAG (BLOCK0)                              Represents whether JTAG is disabled in the hard wa = False R/W (0b0)
+                                                       y(permanently). 1: disabled. 0: enabled           
+    
+    Mac fuses:
+    MAC (BLOCK1)                                       MAC address                                       
+       = 00:00:00:00:00:00 (OK) R/W 
+    MAC_EXT (BLOCK1)                                   Stores the extended bits of MAC address            = 00:00 (OK) R/W 
+    MAC_EUI64 (BLOCK1)                                 calc MAC_EUI64 = MAC[0]:MAC[1]:MAC[2]:MAC_EXT[0]:M
+       = 00:00:00:00:00:00:00:00 (OK) R/W 
+                                                       AC_EXT[1]:MAC[3]:MAC[4]:MAC[5]                    
+    
+    Security fuses:
+    DIS_FORCE_DOWNLOAD (BLOCK0)                        Represents whether the function that forces chip i = False R/W (0b0)
+                                                       nto download mode is disabled or enabled. 1: disab
+                                                       led. 0: enabled                                   
+    SPI_DOWNLOAD_MSPI_DIS (BLOCK0)                     Set this bit to disable accessing MSPI flash/MSPI  = False R/W (0b0)
+                                                       ram by SYS AXI matrix during boot_mode_download   
+    DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0)               Represents whether flash encrypt function is disab = False R/W (0b0)
+                                                       led or enabled(except in SPI boot mode). 1: disabl
+                                                       ed. 0: enabled                                    
+    FORCE_USE_KEY_MANAGER_KEY (BLOCK0)                 Set each bit to control whether corresponding key  = 0 R/W (0x0)
+                                                       must come from key manager.. 1 is true; 0 is false
+                                                       . Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds    
+    FORCE_DISABLE_SW_INIT_KEY (BLOCK0)                 Set this bit to disable software written init key; = False R/W (0b0)
+                                                        and force use efuse_init_key                     
+    XTS_KEY_LENGTH_256 (BLOCK0)                        Set this bit to configure flash encryption use xts = False R/W (0b0)
+                                                       -128 key; else use xts-256 key                    
+    SPI_BOOT_CRYPT_CNT (BLOCK0)                        Enables flash encryption when 1 or 3 bits are set  = Disable R/W (0b000)
+                                                       and disables otherwise                            
+    SECURE_BOOT_KEY_REVOKE0 (BLOCK0)                   Revoke 1st secure boot key                         = False R/W (0b0)
+    SECURE_BOOT_KEY_REVOKE1 (BLOCK0)                   Revoke 2nd secure boot key                         = False R/W (0b0)
+    SECURE_BOOT_KEY_REVOKE2 (BLOCK0)                   Revoke 3rd secure boot key                         = False R/W (0b0)
+    KEY_PURPOSE_0 (BLOCK0)                             Represents the purpose of Key0                     = USER R/W (0x0)
+    KEY_PURPOSE_1 (BLOCK0)                             Represents the purpose of Key1                     = USER R/W (0x0)
+    KEY_PURPOSE_2 (BLOCK0)                             Represents the purpose of Key2                     = USER R/W (0x0)
+    KEY_PURPOSE_3 (BLOCK0)                             Represents the purpose of Key3                     = USER R/W (0x0)
+    KEY_PURPOSE_4 (BLOCK0)                             Represents the purpose of Key4                     = USER R/W (0x0)
+    KEY_PURPOSE_5 (BLOCK0)                             Represents the purpose of Key5                     = USER R/W (0x0)
+    SEC_DPA_LEVEL (BLOCK0)                             Represents the spa secure level by configuring the = 0 R/W (0b00)
+                                                        clock random divide mode                         
+    ECDSA_ENABLE_SOFT_K (BLOCK0)                       Represents whether hardware random number k is for = False R/W (0b0)
+                                                       ced used in ESDCA. 1: force used. 0: not force use
+                                                       d                                                 
+    CRYPT_DPA_ENABLE (BLOCK0)                          Represents whether anti-dpa attack is enabled. 1:e = False R/W (0b0)
+                                                       nabled. 0: disabled                               
+    SECURE_BOOT_EN (BLOCK0)                            Represents whether secure boot is enabled or disab = False R/W (0b0)
+                                                       led. 1: enabled. 0: disabled                      
+    SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0)             Represents whether revoking aggressive secure boot = False R/W (0b0)
+                                                        is enabled or disabled. 1: enabled. 0: disabled  
+    DIS_DOWNLOAD_MODE (BLOCK0)                         Represents whether Download mode is disabled or en = False R/W (0b0)
+                                                       abled. 1: disabled. 0: enabled                    
+    LOCK_KM_KEY (BLOCK0)                               TBD                                                = False R/W (0b0)
+    ENABLE_SECURITY_DOWNLOAD (BLOCK0)                  Represents whether security download is enabled or = False R/W (0b0)
+                                                        disabled. 1: enabled. 0: disabled                
+    SECURE_VERSION (BLOCK0)                            Represents the version used by ESP-IDF anti-rollba = 0 R/W (0x0000)
+                                                       ck feature                                        
+    SECURE_BOOT_DISABLE_FAST_WAKE (BLOCK0)             Represents whether FAST VERIFY ON WAKE is disabled = False R/W (0b0)
+                                                        or enabled when Secure Boot is enabled. 1: disabl
+                                                       ed. 0: enabled                                    
+    BLOCK_KEY0 (BLOCK4)
+      Purpose: USER
+                   Key0 or user data                                 
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    BLOCK_KEY1 (BLOCK5)
+      Purpose: USER
+                   Key1 or user data                                 
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    BLOCK_KEY2 (BLOCK6)
+      Purpose: USER
+                   Key2 or user data                                 
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    BLOCK_KEY3 (BLOCK7)
+      Purpose: USER
+                   Key3 or user data                                 
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    BLOCK_KEY4 (BLOCK8)
+      Purpose: USER
+                   Key4 or user data                                 
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    BLOCK_KEY5 (BLOCK9)
+      Purpose: USER
+                   Key5 or user data                                 
+       = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
+    
+    Usb fuses:
+    USB_DEVICE_EXCHG_PINS (BLOCK0)                     Enable usb device exchange pins of D+ and D-       = False R/W (0b0)
+    USB_OTG11_EXCHG_PINS (BLOCK0)                      Enable usb otg11 exchange pins of D+ and D-        = False R/W (0b0)
+    DIS_USB_JTAG (BLOCK0)                              Represents whether the function of usb switch to j = False R/W (0b0)
+                                                       tag is disabled or enabled. 1: disabled. 0: enable
+                                                       d                                                 
+    USB_PHY_SEL (BLOCK0)                               TBD                                                = False R/W (0b0)
+    DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0)                 Set this bit to disable download via USB-OTG       = False R/W (0b0)
+    DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0)             Represents whether print from USB-Serial-JTAG is d = False R/W (0b0)
+                                                       isabled or enabled. 1: disabled. 0: enabled       
+    DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0)         Represents whether the USB-Serial-JTAG download fu = False R/W (0b0)
+                                                       nction is disabled or enabled. 1: disabled. 0: ena
+                                                       bled                                              
+    
+    Wdt fuses:
+    WDT_DELAY_SEL (BLOCK0)                             Represents whether RTC watchdog timeout threshold  = 0 R/W (0b00)
+                                                       is selected at startup. 1: selected. 0: not select
+                                                       ed                                                
+    DIS_WDT (BLOCK0)                                   Set this bit to disable watch dog                  = False R/W (0b0)
+
+
+To get a dump for all eFuse registers.
+
+.. code-block:: none
+
+    espefuse.py v4.7.dev1
+    Connecting....
+    Detecting chip type... ESP32-P4
+    BLOCK0          (                ) [0 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000
+    MAC_SPI_8M_0    (BLOCK1          ) [1 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_SYS_DATA  (BLOCK2          ) [2 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_USR_DATA  (BLOCK3          ) [3 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_KEY0      (BLOCK4          ) [4 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_KEY1      (BLOCK5          ) [5 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_KEY2      (BLOCK6          ) [6 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_KEY3      (BLOCK7          ) [7 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_KEY4      (BLOCK8          ) [8 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_KEY5      (BLOCK9          ) [9 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK_SYS_DATA2 (BLOCK10         ) [10] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+    BLOCK0          (                ) [0 ] err__regs: 00000000 00000000 00000000 00000000 00000000 00000000
+    EFUSE_RD_RS_ERR0_REG        0x00000000
+    EFUSE_RD_RS_ERR1_REG        0x00000000
+    === Run "dump" command ===

docs/en/api-reference/system/inc/revisions_ESP32-P4.rst

@@ -2,5 +2,5 @@
 +--------+------------------------+
 | ECO    | Revision (Major.Minor) |
 +--------+------------------------+
-| ECO0   | TO BE UPDATED IDF-7759 |
+| ECO0   | v0.0                   |
 +--------+------------------------+

docs/en/api-reference/system/inc/show-efuse-table_ESP32-P4.rst

@@ -1,4 +1,157 @@
 
 .. code-block:: none
 
-    TO BE UPDATED IDF-7759
+    $ ./efuse_table_gen.py -t IDF_TARGET_PATH_NAME {IDF_TARGET_PATH_NAME}/esp_efuse_table.csv --info
+
+    Max number of bits in BLK 256
+    Parsing efuse CSV input file ../esp32p4/esp_efuse_table.csv ...
+    Verifying efuse table...
+    Sorted efuse table:
+    #       field_name                      efuse_block     bit_start       bit_count
+    1       WR_DIS                          EFUSE_BLK0         0               32   
+    2       WR_DIS.RD_DIS                   EFUSE_BLK0         0               1    
+    3       WR_DIS.SPI_BOOT_CRYPT_CNT       EFUSE_BLK0         4               1    
+    4       WR_DIS.SECURE_BOOT_KEY_REVOKE0  EFUSE_BLK0         5               1    
+    5       WR_DIS.SECURE_BOOT_KEY_REVOKE1  EFUSE_BLK0         6               1    
+    6       WR_DIS.SECURE_BOOT_KEY_REVOKE2  EFUSE_BLK0         7               1    
+    7       WR_DIS.KEY_PURPOSE_0            EFUSE_BLK0         8               1    
+    8       WR_DIS.KEY_PURPOSE_1            EFUSE_BLK0         9               1    
+    9       WR_DIS.KEY_PURPOSE_2            EFUSE_BLK0         10              1    
+    10      WR_DIS.KEY_PURPOSE_3            EFUSE_BLK0         11              1    
+    11      WR_DIS.KEY_PURPOSE_4            EFUSE_BLK0         12              1    
+    12      WR_DIS.KEY_PURPOSE_5            EFUSE_BLK0         13              1    
+    13      WR_DIS.SECURE_BOOT_EN           EFUSE_BLK0         15              1    
+    14      WR_DIS.BLK1                     EFUSE_BLK0         20              1    
+    15      WR_DIS.MAC                      EFUSE_BLK0         20              1    
+    16      WR_DIS.MAC_EXT                  EFUSE_BLK0         20              1    
+    17      WR_DIS.BLOCK_SYS_DATA1          EFUSE_BLK0         21              1    
+    18      WR_DIS.BLOCK_USR_DATA           EFUSE_BLK0         22              1    
+    19      WR_DIS.BLOCK_KEY0               EFUSE_BLK0         23              1    
+    20      WR_DIS.BLOCK_KEY1               EFUSE_BLK0         24              1    
+    21      WR_DIS.BLOCK_KEY2               EFUSE_BLK0         25              1    
+    22      WR_DIS.BLOCK_KEY3               EFUSE_BLK0         26              1    
+    23      WR_DIS.BLOCK_KEY4               EFUSE_BLK0         27              1    
+    24      WR_DIS.BLOCK_KEY5               EFUSE_BLK0         28              1    
+    25      WR_DIS.BLOCK_SYS_DATA2          EFUSE_BLK0         29              1    
+    26      RD_DIS                          EFUSE_BLK0         32              7    
+    27      RD_DIS.BLOCK_KEY0               EFUSE_BLK0         32              1    
+    28      RD_DIS.BLOCK_KEY1               EFUSE_BLK0         33              1    
+    29      RD_DIS.BLOCK_KEY2               EFUSE_BLK0         34              1    
+    30      RD_DIS.BLOCK_KEY3               EFUSE_BLK0         35              1    
+    31      RD_DIS.BLOCK_KEY4               EFUSE_BLK0         36              1    
+    32      RD_DIS.BLOCK_KEY5               EFUSE_BLK0         37              1    
+    33      RD_DIS.BLOCK_SYS_DATA2          EFUSE_BLK0         38              1    
+    34      USB_DEVICE_EXCHG_PINS           EFUSE_BLK0         39              1    
+    35      USB_OTG11_EXCHG_PINS            EFUSE_BLK0         40              1    
+    36      DIS_USB_JTAG                    EFUSE_BLK0         41              1    
+    37      POWERGLITCH_EN                  EFUSE_BLK0         42              1    
+    38      DIS_FORCE_DOWNLOAD              EFUSE_BLK0         44              1    
+    39      SPI_DOWNLOAD_MSPI_DIS           EFUSE_BLK0         45              1    
+    40      DIS_TWAI                        EFUSE_BLK0         46              1    
+    41      JTAG_SEL_ENABLE                 EFUSE_BLK0         47              1    
+    42      SOFT_DIS_JTAG                   EFUSE_BLK0         48              3    
+    43      DIS_PAD_JTAG                    EFUSE_BLK0         51              1    
+    44      DIS_DOWNLOAD_MANUAL_ENCRYPT     EFUSE_BLK0         52              1    
+    45      USB_PHY_SEL                     EFUSE_BLK0         57              1    
+    46      KM_HUK_GEN_STATE_LOW            EFUSE_BLK0         58              6    
+    47      KM_HUK_GEN_STATE_HIGH           EFUSE_BLK0         64              3    
+    48      KM_RND_SWITCH_CYCLE             EFUSE_BLK0         67              2    
+    49      KM_DEPLOY_ONLY_ONCE             EFUSE_BLK0         69              4    
+    50      FORCE_USE_KEY_MANAGER_KEY       EFUSE_BLK0         73              4    
+    51      FORCE_DISABLE_SW_INIT_KEY       EFUSE_BLK0         77              1    
+    52      XTS_KEY_LENGTH_256              EFUSE_BLK0         78              1    
+    53      WDT_DELAY_SEL                   EFUSE_BLK0         80              2    
+    54      SPI_BOOT_CRYPT_CNT              EFUSE_BLK0         82              3    
+    55      SECURE_BOOT_KEY_REVOKE0         EFUSE_BLK0         85              1    
+    56      SECURE_BOOT_KEY_REVOKE1         EFUSE_BLK0         86              1    
+    57      SECURE_BOOT_KEY_REVOKE2         EFUSE_BLK0         87              1    
+    58      KEY_PURPOSE_0                   EFUSE_BLK0         88              4    
+    59      KEY_PURPOSE_1                   EFUSE_BLK0         92              4    
+    60      KEY_PURPOSE_2                   EFUSE_BLK0         96              4    
+    61      KEY_PURPOSE_3                   EFUSE_BLK0        100              4    
+    62      KEY_PURPOSE_4                   EFUSE_BLK0        104              4    
+    63      KEY_PURPOSE_5                   EFUSE_BLK0        108              4    
+    64      SEC_DPA_LEVEL                   EFUSE_BLK0        112              2    
+    65      ECDSA_ENABLE_SOFT_K             EFUSE_BLK0        114              1    
+    66      CRYPT_DPA_ENABLE                EFUSE_BLK0        115              1    
+    67      SECURE_BOOT_EN                  EFUSE_BLK0        116              1    
+    68      SECURE_BOOT_AGGRESSIVE_REVOKE   EFUSE_BLK0        117              1    
+    69      FLASH_TYPE                      EFUSE_BLK0        119              1    
+    70      FLASH_PAGE_SIZE                 EFUSE_BLK0        120              2    
+    71      FLASH_ECC_EN                    EFUSE_BLK0        122              1    
+    72      DIS_USB_OTG_DOWNLOAD_MODE       EFUSE_BLK0        123              1    
+    73      FLASH_TPUW                      EFUSE_BLK0        124              4    
+    74      DIS_DOWNLOAD_MODE               EFUSE_BLK0        128              1    
+    75      DIS_DIRECT_BOOT                 EFUSE_BLK0        129              1    
+    76      DIS_USB_SERIAL_JTAG_ROM_PRINT   EFUSE_BLK0        130              1    
+    77      LOCK_KM_KEY                     EFUSE_BLK0        131              1    
+    78      DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE       EFUSE_BLK0        132              1    
+    79      ENABLE_SECURITY_DOWNLOAD        EFUSE_BLK0        133              1    
+    80      UART_PRINT_CONTROL              EFUSE_BLK0        134              2    
+    81      FORCE_SEND_RESUME               EFUSE_BLK0        136              1    
+    82      SECURE_VERSION                  EFUSE_BLK0        137              16   
+    83      SECURE_BOOT_DISABLE_FAST_WAKE   EFUSE_BLK0        153              1    
+    84      HYS_EN_PAD                      EFUSE_BLK0        154              1    
+    85      DCDC_VSET                       EFUSE_BLK0        155              5    
+    86      PXA0_TIEH_SEL_0                 EFUSE_BLK0        160              2    
+    87      PXA0_TIEH_SEL_1                 EFUSE_BLK0        162              2    
+    88      PXA0_TIEH_SEL_2                 EFUSE_BLK0        164              2    
+    89      PXA0_TIEH_SEL_3                 EFUSE_BLK0        166              2    
+    90      KM_DISABLE_DEPLOY_MODE          EFUSE_BLK0        168              4    
+    91      HP_PWR_SRC_SEL                  EFUSE_BLK0        178              1    
+    92      DCDC_VSET_EN                    EFUSE_BLK0        179              1    
+    93      DIS_WDT                         EFUSE_BLK0        180              1    
+    94      DIS_SWD                         EFUSE_BLK0        181              1    
+    95      MAC                             EFUSE_BLK1         0               8    
+    96      MAC                             EFUSE_BLK1         8               8    
+    97      MAC                             EFUSE_BLK1         16              8    
+    98      MAC                             EFUSE_BLK1         24              8    
+    99      MAC                             EFUSE_BLK1         32              8    
+    100     MAC                             EFUSE_BLK1         40              8    
+    101     MAC_EXT                         EFUSE_BLK1         48              8    
+    102     MAC_EXT                         EFUSE_BLK1         56              8    
+    103     SYS_DATA_PART2                  EFUSE_BLK10        0              256   
+    104     BLOCK_SYS_DATA1                 EFUSE_BLK2         0              256   
+    105     USER_DATA                       EFUSE_BLK3         0              256   
+    106     USER_DATA.MAC_CUSTOM            EFUSE_BLK3        200              48   
+    107     KEY0                            EFUSE_BLK4         0              256   
+    108     KEY1                            EFUSE_BLK5         0              256   
+    109     KEY2                            EFUSE_BLK6         0              256   
+    110     KEY3                            EFUSE_BLK7         0              256   
+    111     KEY4                            EFUSE_BLK8         0              256   
+    112     KEY5                            EFUSE_BLK9         0              256   
+    
+    Used bits in efuse table:
+    EFUSE_BLK0 
+    [0 31] [0 0] [4 13] [15 15] [20 20] [20 20] [20 29] [32 38] [32 42] [44 52] [57 78] [80 117] [119 171] [178 181] 
+    
+    EFUSE_BLK1 
+    [0 63] 
+    
+    EFUSE_BLK10 
+    [0 255] 
+    
+    EFUSE_BLK2 
+    [0 255] 
+    
+    EFUSE_BLK3 
+    [0 255] [200 247] 
+    
+    EFUSE_BLK4 
+    [0 255] 
+    
+    EFUSE_BLK5 
+    [0 255] 
+    
+    EFUSE_BLK6 
+    [0 255] 
+    
+    EFUSE_BLK7 
+    [0 255] 
+    
+    EFUSE_BLK8 
+    [0 255] 
+    
+    EFUSE_BLK9 
+    [0 255] 
+    Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)

docs/zh_CN/api-reference/system/inc/espefuse_summary_ESP32-P4.rst

@@ -1,3 +1 @@
-.. code-block:: none
-
-   TO BE UPDATED IDF-7759
+.. include:: ../../../en/api-reference/system/inc/espefuse_summary_ESP32-P4.rst

docs/zh_CN/api-reference/system/inc/revisions_ESP32-P4.rst

@@ -1,6 +1 @@
-
-+--------+------------------------+
-| ECO    | Revision (Major.Minor) |
-+--------+------------------------+
-| ECO0   | TO BE UPDATED IDF-7759 |
-+--------+------------------------+
+.. include:: ../../../en/api-reference/system/inc/revisions_ESP32-P4.rst

docs/zh_CN/api-reference/system/inc/show-efuse-table_ESP32-P4.rst

@@ -1,4 +1 @@
-
-.. code-block:: none
-
-    TO BE UPDATED IDF-7759
+.. include:: ../../../en/api-reference/system/inc/show-efuse-table_ESP32-P4.rst