components/freertos: refactor of isr_latency tests to perform full measurement

components/freertos/test/test_isr_latency.c

@@ -13,52 +13,62 @@
 #include "soc/cpu.h"
 #include "test_utils.h"
 
-#ifdef CONFIG_FREERTOS_ISR_STATS
+#define SW_ISR_LEVEL_1  7
 
+static SemaphoreHandle_t sync;
 static SemaphoreHandle_t end_sema;
-extern uint32_t isr_enter_spent_time_cycles;
-volatile static uint32_t isr_enter_spent_time_cycles_copy;
+uint32_t cycle_before_trigger;
+uint32_t cycle_before_exit;
+uint32_t delta_enter_cycles;
+uint32_t delta_enter_cycles;
+uint32_t delta_exit_cycles;
 
-static void testint(void *arg) {
-    xthal_set_ccompare(1, xthal_get_ccount()+8000000);
+static void software_isr(void *arg) {
+    (void)arg;
+    BaseType_t yield;
+    delta_enter_cycles += portGET_RUN_TIME_COUNTER_VALUE() - cycle_before_trigger;
+    
+    xt_set_intclear(1 << SW_ISR_LEVEL_1);
+
+    xSemaphoreGiveFromISR(sync, &yield);
+    if(yield) {
+        portYIELD_FROM_ISR();
+    }
+
+    cycle_before_exit = portGET_RUN_TIME_COUNTER_VALUE();
 }
 
-static void nested3(void) {
+static void test_task(void *arg) {
+    (void)arg;
+    
     intr_handle_t handle;
-
-    esp_err_t err = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, &testint, NULL, &handle);
+ 
+    esp_err_t err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE, ESP_INTR_FLAG_LEVEL1, &software_isr, NULL, &handle);
     TEST_ASSERT_EQUAL_HEX32(ESP_OK, err);
-    xthal_set_ccompare(1, xthal_get_ccount()+8000000);
-    vTaskDelay(10);
 
-    isr_enter_spent_time_cycles_copy = isr_enter_spent_time_cycles;
+    for(int i = 0;i < 10000; i++) {
+        cycle_before_trigger = portGET_RUN_TIME_COUNTER_VALUE();
+        xt_set_intset(1 << SW_ISR_LEVEL_1);
+        xSemaphoreTake(sync, portMAX_DELAY);
+        delta_exit_cycles += portGET_RUN_TIME_COUNTER_VALUE() - cycle_before_exit;
+    }
+
+    delta_enter_cycles /= 10000;
+    delta_exit_cycles /= 10000;
 
-    ets_printf("Average time spent on context save is: %d cycles\n\n", isr_enter_spent_time_cycles_copy);
     xSemaphoreGive(end_sema);
     vTaskDelete(NULL);
 }
 
-static void nested2(void) {
-    nested3();
-}
-
-static void nested1(void) {
-    nested2();
-}
-
-static void test_task(void *arg) {
-    (void)arg;
-    nested1();
- }
-
 TEST_CASE("isr latency test", "[freertos] [ignore]")
 {
+    sync = xSemaphoreCreateBinary();
+    TEST_ASSERT(sync != NULL);
     end_sema = xSemaphoreCreateBinary();
     TEST_ASSERT(end_sema != NULL);
     xTaskCreatePinnedToCore(test_task, "tst" , 4096, NULL, 3, NULL, 0);
     BaseType_t result = xSemaphoreTake(end_sema, portMAX_DELAY);    
     TEST_ASSERT_EQUAL_HEX32(pdTRUE, result);
-    TEST_PERFORMANCE_LESS_THAN(SPILL_REG_CYCLES, "%d cycles" ,isr_enter_spent_time_cycles_copy); 
-}
-
-#endif
+    TEST_PERFORMANCE_LESS_THAN(ISR_ENTER_CYCLES, "%d cycles" ,delta_enter_cycles);
+    TEST_PERFORMANCE_LESS_THAN(ISR_EXIT_CYCLES, "%d cycles" ,delta_exit_cycles);
+}

components/freertos/xtensa_context.S

@@ -57,20 +57,6 @@ NOERROR: .error "C preprocessor needed for this file: make sure its filename\
 #include <xtensa/overlay_os_asm.h>
 #endif
 
-/*
---------------------------------------------------------------------------------
-    ISR overhead statistics data:
---------------------------------------------------------------------------------
-*/
-
-    #ifdef CONFIG_FREERTOS_ISR_STATS
-    .data
-    .align      16
-    .global     isr_enter_spent_time_cycles
-isr_enter_spent_time_cycles:
-    .word		0
-    #endif
-
     .text
 
 /*******************************************************************************
@@ -194,20 +180,9 @@ _not_l1:
     wsr     a2, PS
     rsync
 
-    #ifdef CONFIG_FREERTOS_ISR_STATS
-    rsr a2, CCOUNT
-    #endif
-
     addi    sp,  sp, XT_STK_FRMSZ      /* go back to spill register region */
     SPILL_ALL_WINDOWS                  /* place the live register windows there */ 
     addi    sp,  sp, -XT_STK_FRMSZ     /* return the current stack pointer and proceed with context save*/
-
-    #ifdef CONFIG_FREERTOS_ISR_STATS
-    rsr a3, CCOUNT
-    sub  a3, a3, a2
-    movi a2, isr_enter_spent_time_cycles
-    s32i a3,a2,0
-    #endif //CONFIG_ISR_TIMING_STATS
     
     #endif
 

components/idf_test/include/idf_performance.h

@@ -33,6 +33,9 @@
 // SHA256 hardware throughput at 240MHz, threshold set lower than worst case
 #define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC                             9.0
 #define IDF_PERFORMANCE_MAX_SPILL_REG_CYCLES                                    150
+#define IDF_PERFORMANCE_MAX_ISR_ENTER_CYCLES    290
+#define IDF_PERFORMANCE_MAX_ISR_EXIT_CYCLES     550
+
 
 #define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP  19000
 #define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 180000