components/freertos: fixed typos and licence placement on external code

components/freertos/test/test_improved_isr_time.c → components/freertos/test/test_isr_latency.c

@@ -51,7 +51,7 @@ static void test_task(void *arg) {
     nested1();
  }
 
-TEST_CASE("isr handling time test", "[freertos] [ignore]")
+TEST_CASE("isr latency test", "[freertos] [ignore]")
 {
     end_sema = xSemaphoreCreateBinary();
     TEST_ASSERT(end_sema != NULL);

components/freertos/xt_asm_utils.h

@@ -1,3 +1,9 @@
+/*
+ * Copyright (c) 2017, Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 /* Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,13 +20,8 @@
  */
 
 /* File adapted to use on IDF FreeRTOS component, extracted 
- * originally from zephyr RTOS code base
- */
-
-/*
- * Copyright (c) 2017, Intel Corporation
- *
- * SPDX-License-Identifier: Apache-2.0
+ * originally from zephyr RTOS code base:
+ * https://github.com/zephyrproject-rtos/zephyr/blob/dafd348/arch/xtensa/include/xtensa-asm2-s.h
  */
 
 #ifndef __XT_ASM_UTILS_H

components/freertos/xtensa_context.S

@@ -200,7 +200,7 @@ _not_l1:
 
     addi    sp,  sp, XT_STK_FRMSZ      /* go back to spill register region */
     SPILL_ALL_WINDOWS                  /* place the live register windows there */ 
-    addi    sp,  sp, -XT_STK_FRMSZ     /* return the current stack pointer and proceed with conext save*/
+    addi    sp,  sp, -XT_STK_FRMSZ     /* return the current stack pointer and proceed with context save*/
 
     #ifdef CONFIG_FREERTOS_ISR_STATS
     rsr a3, CCOUNT
@@ -211,8 +211,8 @@ _not_l1:
     
     #endif
 
-    l32i    a12, sp, XT_STK_TMP0        /* temp. save stuff in stack frame */
-    l32i    a13, sp, XT_STK_TMP1    
+    l32i    a12, sp, XT_STK_TMP0       /* restore the temp saved registers */
+    l32i    a13, sp, XT_STK_TMP1       /* our return address is there */
     l32i    a9,  sp, XT_STK_TMP2  
 
     #if XCHAL_EXTRA_SA_SIZE > 0 || !defined(__XTENSA_CALL0_ABI__)