Merge branch 'docs/remove_dedicated_gpio_for_esp32c3' into 'master'

Update dedicated GPIO document for ESP32-C3

Closes DOC-2660

See merge request espressif/esp-idf!17669

docs/en/api-reference/peripherals/dedic_gpio.rst

@@ -72,8 +72,20 @@ GPIO Bundle Operations
    * - Read the value that output from bundle
      - :cpp:func:`dedic_gpio_bundle_read_in`
 
-.. note::
-    The functions above just wrap the customized instructions defined for {IDF_TARGET_NAME}, for the details of those instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__].
+.. only:: esp32s2
+
+    .. note::
+        The functions above just wrap the customized instructions defined for {IDF_TARGET_NAME}, for the details of those instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__].
+
+.. only:: esp32s3
+
+    .. note::
+        The functions above just wrap the customized instructions defined for {IDF_TARGET_NAME}, for the details of those instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *Processor Instruction Extensions (PIE) (to be added later)* [`PDF <{IDF_TARGET_TRM_EN_URL}#pie>`__].
+
+.. only:: esp32c2 or esp32c3
+
+    .. note::
+        The functions above just wrap the customized instructions defined for {IDF_TARGET_NAME}, for the details of those instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *ESP-RISC-V CPU* [`PDF <{IDF_TARGET_TRM_EN_URL}#riscvcpu>`__].
 
 .. only:: SOC_DEDIC_GPIO_HAS_INTERRUPT
 
@@ -114,25 +126,41 @@ For advanced users, they can always manipulate the GPIOs by writing assembly cod
 3. Call CPU LL apis (e.g. `cpu_ll_write_dedic_gpio_mask`) or write assembly code with that mask
 4. The fasted way of toggling IO is to use the dedicated "set/clear" instructions:
 
-+----------+---------------------------+---------------------------+------------------------------------------------------------------------+
-| CPU Arch | Set bits of GPIO          | Clear bits of GPIO        | Remarks                                                                |
-+==========+===========================+===========================+========================================================================+
-| Xtensa   | set_bit_gpio_out imm[7:0] | clr_bit_gpio_out imm[7:0] | immediate value width depends on the number of dedicated GPIO channels |
-+----------+---------------------------+---------------------------+------------------------------------------------------------------------+
-| RISC-V   | csrrsi rd, csr, imm[4:0]  | csrrci rd, csr, imm[4:0]  | can only control the lowest 4 GPIO channels                            |
-+----------+---------------------------+---------------------------+------------------------------------------------------------------------+
+    .. only:: esp32s2 or esp32s3
+
+        - Set bits of GPIO: ``set_bit_gpio_out imm[7:0]``
+        - Clear bits of GPIO: ``clr_bit_gpio_out imm[7:0]``
+        - Note: Immediate value width depends on the number of dedicated GPIO channels
+
+    .. only:: esp32c2 or esp32c3
+
+        - Set bits of GPIO: ``csrrsi rd, csr, imm[4:0]``
+        - Clear bits of GPIO: ``csrrci rd, csr, imm[4:0]``
+        - Note: Can only control the lowest 4 GPIO channels
+
+.. only:: esp32s2
+
+    For details of supported dedicated GPIO instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. 
+
+.. only:: esp32s3
+
+    For details of supported dedicated GPIO instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *Processor Instruction Extensions (PIE) (to be added later)* [`PDF <{IDF_TARGET_TRM_EN_URL}#pie>`__]. 
+
+.. only:: esp32c2 or esp32c3
 
+    For details of supported dedicated GPIO instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *ESP-RISC-V CPU* [`PDF <{IDF_TARGET_TRM_EN_URL}#riscvcpu>`__].
 
-For details of supported dedicated GPIO instructions, please refer to *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. The supported dedicated CPU instructions are also wrapped inside `soc/cpu_ll.h` as helper inline functions.
+The supported dedicated CPU instructions are also wrapped inside `soc/cpu_ll.h` as helper inline functions.
 
 .. note::
     Writing assembly code in application could make your code hard to port between targets, because those customized instructions are not guaranteed to remain the same format on different targets.
 
+.. only:: esp32s2
 
-Application Example
--------------------
+    Application Example
+    -------------------
 
-Matrix keyboard example based on dedicated GPIO: :example:`peripherals/gpio/matrix_keyboard`.
+    Matrix keyboard example based on dedicated GPIO: :example:`peripherals/gpio/matrix_keyboard`.
 
 
 API Reference