ll: add reset interface to rtc_cntl_ll

components/hal/esp32/include/hal/rtc_cntl_ll.h

@@ -52,6 +52,17 @@ static inline void rtc_cntl_ll_timer2_set_touch_wait_cycle(uint32_t wait_cycle)
     REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, wait_cycle);
 }
 
+static inline void rtc_cntl_ll_reset_system(void)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+}
+
+static inline void rtc_cntl_ll_reset_cpu(int cpu_no)
+{
+    uint32_t rtc_cntl_rst = (cpu_no == 0) ? RTC_CNTL_SW_PROCPU_RST : RTC_CNTL_SW_APPCPU_RST;
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, rtc_cntl_rst);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c2/include/hal/rtc_cntl_ll.h

@@ -54,6 +54,16 @@ static inline void rtc_cntl_ll_disable_cpu_retention(void)
     REG_CLR_BIT(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_EN);
 }
 
+static inline void rtc_cntl_ll_reset_system(void)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+}
+
+static inline void rtc_cntl_ll_reset_cpu(int cpu_no)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_PROCPU_RST);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c3/include/hal/rtc_cntl_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -68,6 +60,16 @@ static inline void rtc_cntl_ll_disable_cpu_retention(void)
     REG_CLR_BIT(RTC_CNTL_RETENTION_CTRL_REG, RTC_CNTL_RETENTION_EN);
 }
 
+static inline void rtc_cntl_ll_reset_system(void)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+}
+
+static inline void rtc_cntl_ll_reset_cpu(int cpu_no)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_PROCPU_RST);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32h2/include/hal/rtc_cntl_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -57,6 +49,16 @@ static inline void rtc_cntl_ll_disable_cpu_retention(void)
     // ESP32H2-TODO: IDF-3383
 }
 
+static inline void rtc_cntl_ll_reset_system(void)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+}
+
+static inline void rtc_cntl_ll_reset_cpu(int cpu_no)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_PROCPU_RST);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32s2/include/hal/rtc_cntl_ll.h

@@ -52,6 +52,16 @@ static inline void rtc_cntl_ll_timer2_set_touch_wait_cycle(uint32_t wait_cycle)
     REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, wait_cycle);
 }
 
+static inline void rtc_cntl_ll_reset_system(void)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+}
+
+static inline void rtc_cntl_ll_reset_cpu(int cpu_no)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_PROCPU_RST);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32s3/include/hal/rtc_cntl_ll.h

@@ -132,6 +132,17 @@ static inline void rtc_cntl_ll_timer2_set_touch_wait_cycle(uint32_t wait_cycle)
     REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, wait_cycle);
 }
 
+static inline void rtc_cntl_ll_reset_system(void)
+{
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+}
+
+static inline void rtc_cntl_ll_reset_cpu(int cpu_no)
+{
+    uint32_t rtc_cntl_rst = (cpu_no == 0) ? RTC_CNTL_SW_PROCPU_RST : RTC_CNTL_SW_APPCPU_RST;
+    REG_WRITE(RTC_CNTL_OPTIONS0_REG, rtc_cntl_rst);
+}
+
 #ifdef __cplusplus
 }
 #endif

tools/ci/check_copyright_ignore.txt

@@ -708,7 +708,6 @@ components/hal/esp32c3/include/hal/ds_ll.h
 components/hal/esp32c3/include/hal/hmac_hal.h
 components/hal/esp32c3/include/hal/hmac_ll.h
 components/hal/esp32c3/include/hal/mpu_ll.h
-components/hal/esp32c3/include/hal/rtc_cntl_ll.h
 components/hal/esp32c3/include/hal/sha_ll.h
 components/hal/esp32c3/include/hal/spi_flash_encrypted_ll.h
 components/hal/esp32c3/include/hal/uhci_ll.h
@@ -720,7 +719,6 @@ components/hal/esp32h2/include/hal/ds_ll.h
 components/hal/esp32h2/include/hal/hmac_hal.h
 components/hal/esp32h2/include/hal/hmac_ll.h
 components/hal/esp32h2/include/hal/mpu_ll.h
-components/hal/esp32h2/include/hal/rtc_cntl_ll.h
 components/hal/esp32h2/include/hal/sha_ll.h
 components/hal/esp32h2/include/hal/spi_flash_encrypted_ll.h
 components/hal/esp32h2/include/hal/uhci_ll.h