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@@ -57,7 +57,7 @@ static void esp_crosscore_isr(void *arg) {
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if (xPortGetCoreID()==0) {
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WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0);
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} else {
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- WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 1);
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+ WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, 0);
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}
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//Grab the reason and clear it.
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portENTER_CRITICAL(&reasonSpinlock);
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@@ -77,6 +77,7 @@ static void esp_crosscore_isr(void *arg) {
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//on each active core.
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void esp_crosscore_int_init() {
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portENTER_CRITICAL(&reasonSpinlock);
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+ ets_printf("init cpu %d\n", xPortGetCoreID());
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reason[xPortGetCoreID()]=0;
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portEXIT_CRITICAL(&reasonSpinlock);
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ESP_INTR_DISABLE(ETS_FROM_CPU_INUM);
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@@ -87,7 +88,6 @@ void esp_crosscore_int_init() {
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}
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xt_set_interrupt_handler(ETS_FROM_CPU_INUM, esp_crosscore_isr, (void*)&reason[xPortGetCoreID()]);
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ESP_INTR_ENABLE(ETS_FROM_CPU_INUM);
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-
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}
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void esp_crosscore_int_send_yield(int coreId) {
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