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@@ -15,22 +15,34 @@
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#define ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block) ((error_reg) & (0x0F << (4 * (block))))
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+
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+//The wafer_major and MSB of wafer_minor fields was allocated to other purposes when block version is v1.1.
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+//Luckily only chip v0.0 have this kind of block version and efuse usage.
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+//This workaround fixes the issue.
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+static inline bool is_eco0(uint32_t minor_raw)
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+{
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+ return ((minor_raw & 0x7) == 0 &&
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+ efuse_ll_get_blk_version_major() == 1 && efuse_ll_get_blk_version_minor() == 1);
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+}
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+
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IRAM_ATTR uint32_t efuse_hal_get_major_chip_version(void)
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{
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- uint32_t ret = efuse_ll_get_chip_wafer_version_major();
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- //Workaround: The major version field was allocated to other purposes when block version is v1.1.
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- //Luckily only chip v0.0 have this kind of block version and efuse usage.
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- if (efuse_ll_get_chip_wafer_version_minor() == 0 &&
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- efuse_ll_get_blk_version_major() == 1 &&
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- efuse_ll_get_blk_version_minor() == 1) {
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- ret = 0;
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+ uint32_t minor_raw = efuse_ll_get_chip_wafer_version_minor();
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+
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+ if (is_eco0(minor_raw)) {
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+ return 0;
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}
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- return ret;
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+ return efuse_ll_get_chip_wafer_version_major();
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}
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IRAM_ATTR uint32_t efuse_hal_get_minor_chip_version(void)
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{
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- return efuse_ll_get_chip_wafer_version_minor();
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+ uint32_t minor_raw = efuse_ll_get_chip_wafer_version_minor();
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+
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+ if (is_eco0(minor_raw)) {
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+ return 0;
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+ }
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+ return minor_raw;
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}
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/******************* eFuse control functions *************************/
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