esp_system: add panic high interrupt handler for esp32s3

components/esp32/CMakeLists.txt

@@ -62,11 +62,6 @@ else()
     target_link_libraries(${COMPONENT_LIB} PUBLIC gcc)
     target_link_libraries(${COMPONENT_LIB} INTERFACE "-u call_user_start_cpu0")
 
-    #ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
-    #linker will ignore panic_highint_hdl.S as it has no other files depending on any
-    #symbols in it.
-    target_link_libraries(${COMPONENT_LIB} INTERFACE "-u ld_include_panic_highint_hdl")
-
     idf_build_get_property(config_dir CONFIG_DIR)
     # Preprocess esp32.ld linker script to include configuration, becomes esp32_out.ld
     set(LD_DIR ${CMAKE_CURRENT_SOURCE_DIR}/ld)

components/esp32s2/CMakeLists.txt

@@ -58,11 +58,6 @@ else()
     target_link_libraries(${COMPONENT_LIB} PUBLIC gcc)
     target_link_libraries(${COMPONENT_LIB} INTERFACE "-u call_user_start_cpu0")
 
-    #ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
-    #linker will ignore panic_highint_hdl.S as it has no other files depending on any
-    #symbols in it.
-    target_link_libraries(${COMPONENT_LIB} INTERFACE "-u ld_include_panic_highint_hdl")
-
     idf_build_get_property(config_dir CONFIG_DIR)
     # Preprocess esp32s2.ld linker script to include configuration, becomes esp32s2_out.ld
     set(LD_DIR ${CMAKE_CURRENT_SOURCE_DIR}/ld)

components/esp_system/port/esp32/CMakeLists.txt

@@ -2,3 +2,8 @@ set(srcs "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c")
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
 
 target_sources(${COMPONENT_LIB} PRIVATE ${srcs})
+
+#ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
+#linker will ignore panic_highint_hdl.S as it has no other files depending on any
+#symbols in it.
+set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u ld_include_panic_highint_hdl")

components/esp_system/port/esp32s2/CMakeLists.txt

@@ -5,3 +5,8 @@ target_sources(${COMPONENT_LIB} PRIVATE ${srcs})
 if(CONFIG_ESP_CONSOLE_USB_CDC)
     target_sources(${COMPONENT_LIB} PRIVATE "${CMAKE_CURRENT_LIST_DIR}/usb_console.c")
 endif()
+
+#ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
+#linker will ignore panic_highint_hdl.S as it has no other files depending on any
+#symbols in it.
+set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u ld_include_panic_highint_hdl")

components/esp_system/port/esp32s2/dport_panic_highint_hdl.S

@@ -71,16 +71,6 @@ xt_highint4:
     movi    a0, PANIC_RSN_CACHEERR
     j 9f
 1:
-#if CONFIG_INT_WDT_CHECK_CPU1
-    /* Check if the cause is the app cpu failing to tick.*/
-    movi    a0, int_wdt_app_cpu_ticked
-    l32i    a0, a0, 0
-    bnez    a0, 2f
-    /* It is. Modify cause. */
-    movi    a0,PANIC_RSN_INTWDT_CPU1
-    j 9f
-2:
-#endif
     /* Set EXCCAUSE to reflect cause of the wdt int trigger */
     movi    a0,PANIC_RSN_INTWDT_CPU0
 9:

components/esp_system/port/esp32s3/CMakeLists.txt

@@ -0,0 +1,7 @@
+set(srcs "dport_panic_highint_hdl.S")
+add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
+
+#ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
+#linker will ignore panic_highint_hdl.S as it has no other files depending on any
+#symbols in it.
+set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u ld_include_panic_highint_hdl")

components/esp_system/port/esp32s3/dport_panic_highint_hdl.S

@@ -0,0 +1,130 @@
+// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#include <xtensa/coreasm.h>
+#include <xtensa/corebits.h>
+#include <xtensa/config/system.h>
+#include "freertos/xtensa_context.h"
+#include "esp_private/panic_reason.h"
+#include "sdkconfig.h"
+#include "soc/soc.h"
+#include "soc/dport_reg.h"
+#include "soc/soc_caps.h"
+
+/*
+
+Interrupt , a high-priority interrupt, is used for several things:
+- Cache error panic handler
+- Interrupt watchdog panic handler
+
+*/
+
+#define L4_INTR_STACK_SIZE  12
+#define L4_INTR_A2_OFFSET   0
+#define L4_INTR_A3_OFFSET   4
+#define L4_INTR_A4_OFFSET   8
+.data
+_l4_intr_stack:
+    .space      L4_INTR_STACK_SIZE*SOC_CPU_CORES_NUM /* This allocates stacks for each individual CPU. */
+    .section .iram1,"ax"
+    .global     xt_highint4
+    .type       xt_highint4,@function
+    .align      4
+xt_highint4:
+
+    /* Allocate exception frame and save minimal context. */
+    mov     a0, sp
+    addi    sp, sp, -XT_STK_FRMSZ
+    s32i    a0, sp, XT_STK_A1
+    #if XCHAL_HAVE_WINDOWED
+    s32e    a0, sp, -12                     /* for debug backtrace */
+    #endif
+    rsr     a0, PS                          /* save interruptee's PS */
+    s32i    a0, sp, XT_STK_PS
+    rsr     a0, EPC_4                       /* save interruptee's PC */
+    s32i    a0, sp, XT_STK_PC
+    #if XCHAL_HAVE_WINDOWED
+    s32e    a0, sp, -16                     /* for debug backtrace */
+    #endif
+    s32i    a12, sp, XT_STK_A12             /* _xt_context_save requires A12- */
+    s32i    a13, sp, XT_STK_A13             /* A13 to have already been saved */
+    call0   _xt_context_save
+
+    /* Save vaddr into exception frame */
+    rsr     a0, EXCVADDR
+    s32i    a0, sp, XT_STK_EXCVADDR
+
+    /* Figure out reason, save into EXCCAUSE reg */
+
+    rsr     a0, INTERRUPT
+    extui   a0, a0, ETS_CACHEERR_INUM, 1 /* get cacheerr int bit */
+    beqz    a0, 1f
+    /* Kill this interrupt; we cannot reset it. */
+    rsr     a0, INTENABLE
+    movi    a4, ~(1<<ETS_CACHEERR_INUM)
+    and     a0, a4, a0
+    wsr     a0, INTENABLE
+    movi    a0, PANIC_RSN_CACHEERR
+    j 9f
+
+1:
+#if CONFIG_ESP_INT_WDT_CHECK_CPU1
+    /* Check if the cause is the app cpu failing to tick.*/
+    movi    a0, int_wdt_app_cpu_ticked
+    l32i    a0, a0, 0
+    bnez    a0, 2f
+    /* It is. Modify cause. */
+    movi    a0,PANIC_RSN_INTWDT_CPU1
+    j 9f
+2:
+#endif
+
+    /* Set EXCCAUSE to reflect cause of the wdt int trigger */
+    movi    a0,PANIC_RSN_INTWDT_CPU0
+9:
+    /* Found the reason, now save it. */
+    s32i    a0, sp, XT_STK_EXCCAUSE
+
+    /* _xt_context_save seems to save the current a0, but we need the interuptees a0. Fix this. */
+    rsr     a0, EXCSAVE_4                   /* save interruptee's a0 */
+
+    s32i    a0, sp, XT_STK_A0
+
+    /* Set up PS for C, disable all interrupts except NMI and debug, and clear EXCM. */
+    movi    a0, PS_INTLEVEL(5) | PS_UM | PS_WOE
+    wsr     a0, PS
+
+    //Call panic handler
+    mov     a6,sp
+    call4   panicHandler
+
+    call0   _xt_context_restore
+    l32i    a0, sp, XT_STK_PS               /* retrieve interruptee's PS */
+    wsr     a0, PS
+    l32i    a0, sp, XT_STK_PC               /* retrieve interruptee's PC */
+    wsr     a0, EPC_4
+    l32i    a0, sp, XT_STK_A0               /* retrieve interruptee's A0 */
+    l32i    sp, sp, XT_STK_A1               /* remove exception frame */
+    rsync                                   /* ensure PS and EPC written */
+
+    rsr     a0, EXCSAVE_4                   /* restore a0 */
+    rfi     4
+
+/* The linker has no reason to link in this file; all symbols it exports are already defined
+   (weakly!) in the default int handler. Define a symbol here so we can use it to have the
+   linker inspect this anyway. */
+
+    .global ld_include_panic_highint_hdl
+ld_include_panic_highint_hdl: