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@@ -52,13 +52,13 @@ static const char* UART_TAG = "uart";
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return (ret_val); \
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}
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-#define UART_EMPTY_THRESH_DEFAULT (10)
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-#define UART_FULL_THRESH_DEFAULT (120)
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-#define UART_TOUT_THRESH_DEFAULT (10)
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-#define UART_CLKDIV_FRAG_BIT_WIDTH (3)
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-#define UART_TX_IDLE_NUM_DEFAULT (0)
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-#define UART_PATTERN_DET_QLEN_DEFAULT (10)
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-#define UART_MIN_WAKEUP_THRESH (SOC_UART_MIN_WAKEUP_THRESH)
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+#define UART_EMPTY_THRESH_DEFAULT (10)
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+#define UART_FULL_THRESH_DEFAULT (120)
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+#define UART_TOUT_THRESH_DEFAULT (10)
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+#define UART_CLKDIV_FRAG_BIT_WIDTH (3)
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+#define UART_TX_IDLE_NUM_DEFAULT (0)
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+#define UART_PATTERN_DET_QLEN_DEFAULT (10)
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+#define UART_MIN_WAKEUP_THRESH (SOC_UART_MIN_WAKEUP_THRESH)
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#define UART_INTR_CONFIG_FLAG ((UART_INTR_RXFIFO_FULL) \
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| (UART_INTR_RXFIFO_TOUT) \
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@@ -104,6 +104,7 @@ typedef struct {
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intr_handle_t intr_handle; /*!< UART interrupt handle*/
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uart_mode_t uart_mode; /*!< UART controller actual mode set by uart_set_mode() */
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bool coll_det_flg; /*!< UART collision detection flag */
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+ bool rx_always_timeout_flg; /*!< UART always detect rx timeout flag */
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//rx parameters
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int rx_buffered_len; /*!< UART cached data length */
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@@ -805,6 +806,10 @@ static void UART_ISR_ATTR uart_rx_intr_handler_default(void *param)
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pat_flg = 0;
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}
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if (p_uart->rx_buffer_full_flg == false) {
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+ rx_fifo_len = uart_hal_get_rxfifo_len(&(uart_context[uart_num].hal));
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+ if ((p_uart_obj[uart_num]->rx_always_timeout_flg) && !(uart_intr_status & UART_INTR_RXFIFO_TOUT)) {
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+ rx_fifo_len--; // leave one byte in the fifo in order to trigger uart_intr_rxfifo_tout
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+ }
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uart_hal_read_rxfifo(&(uart_context[uart_num].hal), p_uart->rx_data_buf, &rx_fifo_len);
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uint8_t pat_chr = 0;
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uint8_t pat_num = 0;
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@@ -822,6 +827,7 @@ static void UART_ISR_ATTR uart_rx_intr_handler_default(void *param)
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uart_hal_clr_intsts_mask(&(uart_context[uart_num].hal), UART_INTR_RXFIFO_TOUT | UART_INTR_RXFIFO_FULL);
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uart_event.type = UART_DATA;
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uart_event.size = rx_fifo_len;
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+ uart_event.timeout_flag = (uart_intr_status & UART_INTR_RXFIFO_TOUT) ? true : false;
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UART_ENTER_CRITICAL_ISR(&uart_selectlock);
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if (p_uart->uart_select_notif_callback) {
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p_uart->uart_select_notif_callback(uart_num, UART_SELECT_READ_NOTIF, &HPTaskAwoken);
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@@ -1294,6 +1300,7 @@ esp_err_t uart_driver_install(uart_port_t uart_num, int rx_buffer_size, int tx_b
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p_uart_obj[uart_num]->uart_num = uart_num;
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p_uart_obj[uart_num]->uart_mode = UART_MODE_UART;
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p_uart_obj[uart_num]->coll_det_flg = false;
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+ p_uart_obj[uart_num]->rx_always_timeout_flg = false;
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p_uart_obj[uart_num]->tx_fifo_sem = xSemaphoreCreateBinary();
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xSemaphoreGive(p_uart_obj[uart_num]->tx_fifo_sem);
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p_uart_obj[uart_num]->tx_done_sem = xSemaphoreCreateBinary();
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@@ -1490,8 +1497,12 @@ esp_err_t uart_set_tx_empty_threshold(uart_port_t uart_num, int threshold)
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esp_err_t uart_set_rx_timeout(uart_port_t uart_num, const uint8_t tout_thresh)
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{
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UART_CHECK((uart_num < UART_NUM_MAX), "uart_num error", ESP_ERR_INVALID_ARG);
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- UART_CHECK((tout_thresh < 127), "tout_thresh max value is 126", ESP_ERR_INVALID_ARG);
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-
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+ // get maximum timeout threshold
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+ uint16_t tout_max_thresh = uart_hal_get_max_rx_timeout_thrd(&(uart_context[uart_num].hal));
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+ if (tout_thresh > tout_max_thresh) {
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+ ESP_LOGE(UART_TAG, "tout_thresh = %d > maximum value = %d", tout_thresh, tout_max_thresh);
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+ return ESP_ERR_INVALID_ARG;
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+ }
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UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
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uart_hal_set_rx_timeout(&(uart_context[uart_num].hal), tout_thresh);
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UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
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@@ -1543,3 +1554,13 @@ esp_err_t uart_set_loop_back(uart_port_t uart_num, bool loop_back_en)
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uart_hal_set_loop_back(&(uart_context[uart_num].hal), loop_back_en);
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return ESP_OK;
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}
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+
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+void uart_set_always_rx_timeout(uart_port_t uart_num, bool always_rx_timeout)
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+{
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+ uint16_t rx_tout = uart_hal_get_rx_tout_thr(&(uart_context[uart_num].hal));
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+ if (rx_tout) {
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+ p_uart_obj[uart_num]->rx_always_timeout_flg = always_rx_timeout;
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+ } else {
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+ p_uart_obj[uart_num]->rx_always_timeout_flg = false;
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+ }
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+}
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