|
@@ -141,28 +141,48 @@ TEST_CASE("Test spi_flash_read", "[spi_flash][esp_flash]")
|
|
|
#endif
|
|
#endif
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
-#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
|
|
|
|
|
-// TODO ESP32C3 IDF-2579
|
|
|
|
|
-
|
|
|
|
|
|
|
+#if CONFIG_IDF_TARGET_ESP32
|
|
|
|
|
+static void IRAM_ATTR fix_rom_func(void)
|
|
|
|
|
+{
|
|
|
|
|
+ return; // ESP32 ROM has no compatible issue for now
|
|
|
|
|
+}
|
|
|
|
|
+# else
|
|
|
|
|
+extern void spi_common_set_dummy_output(esp_rom_spiflash_read_mode_t mode);
|
|
|
|
|
+extern void spi_dummy_len_fix(uint8_t spi, uint8_t freqdiv);
|
|
|
static void IRAM_ATTR fix_rom_func(void)
|
|
static void IRAM_ATTR fix_rom_func(void)
|
|
|
{
|
|
{
|
|
|
-#ifdef CONFIG_IDF_TARGET_ESP32S2
|
|
|
|
|
esp_rom_spiflash_read_mode_t read_mode;
|
|
esp_rom_spiflash_read_mode_t read_mode;
|
|
|
-# if defined CONFIG_ESPTOOLPY_FLASHMODE_QIO
|
|
|
|
|
|
|
+ uint8_t freqdiv;
|
|
|
|
|
+#if defined CONFIG_ESPTOOLPY_FLASHMODE_QIO
|
|
|
read_mode = ESP_ROM_SPIFLASH_QIO_MODE;
|
|
read_mode = ESP_ROM_SPIFLASH_QIO_MODE;
|
|
|
-# elif defined CONFIG_ESPTOOLPY_FLASHMODE_QOUT
|
|
|
|
|
|
|
+#elif defined CONFIG_ESPTOOLPY_FLASHMODE_QOUT
|
|
|
read_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
|
|
read_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
|
|
|
-# elif defined CONFIG_ESPTOOLPY_FLASHMODE_DIO
|
|
|
|
|
|
|
+#elif defined CONFIG_ESPTOOLPY_FLASHMODE_DIO
|
|
|
read_mode = ESP_ROM_SPIFLASH_DIO_MODE;
|
|
read_mode = ESP_ROM_SPIFLASH_DIO_MODE;
|
|
|
-# elif defined CONFIG_ESPTOOLPY_FLASHMODE_DOUT
|
|
|
|
|
|
|
+#elif defined CONFIG_ESPTOOLPY_FLASHMODE_DOUT
|
|
|
read_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
|
|
read_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
|
|
|
-# endif
|
|
|
|
|
- //Currently only call this can fix the rom_read issue, maybe we need to call more functions (freq, dummy, etc) in the future
|
|
|
|
|
|
|
+#endif
|
|
|
|
|
+
|
|
|
|
|
+# if defined CONFIG_ESPTOOLPY_FLASHFREQ_80M
|
|
|
|
|
+ freqdiv = 1;
|
|
|
|
|
+# elif defined CONFIG_ESPTOOLPY_FLASHFREQ_40M
|
|
|
|
|
+ freqdiv = 2;
|
|
|
|
|
+# elif defined CONFIG_ESPTOOLPY_FLASHFREQ_26M
|
|
|
|
|
+ freqdiv = 3;
|
|
|
|
|
+# elif defined CONFIG_ESPTOOLPY_FLASHFREQ_20M
|
|
|
|
|
+ freqdiv = 4;
|
|
|
|
|
+#endif
|
|
|
|
|
+
|
|
|
spi_flash_disable_interrupts_caches_and_other_cpu();
|
|
spi_flash_disable_interrupts_caches_and_other_cpu();
|
|
|
|
|
+ esp_rom_spiflash_config_clk(freqdiv, 1);
|
|
|
|
|
+ spi_dummy_len_fix(1, freqdiv);
|
|
|
esp_rom_spiflash_config_readmode(read_mode);
|
|
esp_rom_spiflash_config_readmode(read_mode);
|
|
|
|
|
+#if !CONFIG_IDF_TARGET_ESP32S2
|
|
|
|
|
+ spi_common_set_dummy_output(read_mode);
|
|
|
|
|
+#endif //!CONFIG_IDF_TARGET_ESP32S2
|
|
|
spi_flash_enable_interrupts_caches_and_other_cpu();
|
|
spi_flash_enable_interrupts_caches_and_other_cpu();
|
|
|
-#endif
|
|
|
|
|
}
|
|
}
|
|
|
|
|
+#endif
|
|
|
|
|
|
|
|
static void IRAM_ATTR test_write(int dst_off, int src_off, int len)
|
|
static void IRAM_ATTR test_write(int dst_off, int src_off, int len)
|
|
|
{
|
|
{
|
|
@@ -267,8 +287,6 @@ TEST_CASE("Test spi_flash_write", "[spi_flash][esp_flash]")
|
|
|
#endif
|
|
#endif
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
-#endif //TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
|
|
|
|
|
-
|
|
|
|
|
#ifdef CONFIG_SPIRAM
|
|
#ifdef CONFIG_SPIRAM
|
|
|
|
|
|
|
|
TEST_CASE("spi_flash_read can read into buffer in external RAM", "[spi_flash]")
|
|
TEST_CASE("spi_flash_read can read into buffer in external RAM", "[spi_flash]")
|