gdb stub: re-enable for ESP32-C2

components/esp_gdbstub/CMakeLists.txt

@@ -1,13 +1,11 @@
 idf_build_get_property(target IDF_TARGET)
 
-if(NOT "${target}" STREQUAL "esp32c2") # TODO: IDF-4135
 idf_component_register(SRCS "src/gdbstub.c" "src/packet.c"
                        INCLUDE_DIRS "include"
                        PRIV_INCLUDE_DIRS "private_include"
                        LDFRAGMENTS "linker.lf"
                        REQUIRES "freertos"
                        PRIV_REQUIRES "soc" "esp_rom" "esp_system")
-endif()
 
 if(CONFIG_IDF_TARGET_ARCH_XTENSA)
     target_include_directories(${COMPONENT_LIB} PUBLIC "xtensa" "${target}")

components/esp_gdbstub/esp32c2/gdbstub_esp32c2.c

@@ -29,7 +29,6 @@ static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
     {SOC_DRAM_LOW, SOC_DRAM_HIGH},
     {SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
     {SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
-    // RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them
     // We shouldn't read the uart registers since it will disturb the debugging via UART,
     // so skip UART part of the peripheral registers.
     {DR_REG_UART_BASE + UART_REG_FIELD_LEN, SOC_PERIPHERAL_HIGH},
@@ -84,3 +83,22 @@ int esp_gdbstub_readmem(intptr_t addr)
     uint32_t shift = (addr & 3) * 8;
     return (val_aligned >> shift) & 0xff;
 }
+
+int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
+{
+    if (!check_inside_valid_region(addr)) {
+        /* see esp_cpu_configure_region_protection */
+        return -1;
+    }
+
+    /* 'addr' may be pointing at the memory which does not allow for
+     * byte access, such as IRAM.
+     * Perform a word-aligned read-modify-write, instead of writing
+     * the byte directly.
+     */
+    unsigned *addr_aligned = (unsigned *)(addr & (~3));
+    const uint32_t bit_offset = (addr & 0x3) * 8;
+    const uint32_t mask = ~(0xff << bit_offset);
+    *addr_aligned = (*addr_aligned & mask) | (data << bit_offset);
+    return 0;
+}

components/esp_gdbstub/src/gdbstub.c

@@ -119,19 +119,23 @@ static wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
 #else
 static wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &LP_WDT};
 #endif
+static bool rtc_wdt_ctx_enabled = false;
 static wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
-static wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
-
 static bool wdt0_context_enabled = false;
+#if SOC_TIMER_GROUPS >= 2
+static wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
 static bool wdt1_context_enabled = false;
-static bool rtc_wdt_ctx_enabled = false;
+#endif // SOC_TIMER_GROUPS
+
 /**
  * Disable all enabled WDTs
  */
 static inline void disable_all_wdts(void)
 {
     wdt0_context_enabled = wdt_hal_is_enabled(&wdt0_context);
+    #if SOC_TIMER_GROUPS >= 2
     wdt1_context_enabled = wdt_hal_is_enabled(&wdt1_context);
+    #endif
     rtc_wdt_ctx_enabled = wdt_hal_is_enabled(&rtc_wdt_ctx);
 
     /*Task WDT is the Main Watchdog Timer of Timer Group 0 */
@@ -142,6 +146,7 @@ static inline void disable_all_wdts(void)
         wdt_hal_write_protect_enable(&wdt0_context);
     }
 
+    #if SOC_TIMER_GROUPS >= 2
     /* Interupt WDT is the Main Watchdog Timer of Timer Group 1 */
     if (true == wdt1_context_enabled) {
         wdt_hal_write_protect_disable(&wdt1_context);
@@ -149,6 +154,8 @@ static inline void disable_all_wdts(void)
         wdt_hal_feed(&wdt1_context);
         wdt_hal_write_protect_enable(&wdt1_context);
     }
+    #endif // SOC_TIMER_GROUPS >= 2
+
     if (true == rtc_wdt_ctx_enabled) {
         wdt_hal_write_protect_disable(&rtc_wdt_ctx);
         wdt_hal_disable(&rtc_wdt_ctx);
@@ -168,12 +175,14 @@ static inline void enable_all_wdts(void)
         wdt_hal_enable(&wdt0_context);
         wdt_hal_write_protect_enable(&wdt0_context);
     }
+    #if SOC_TIMER_GROUPS >= 2
     /* Interupt WDT is the Main Watchdog Timer of Timer Group 1 */
     if (false == wdt1_context_enabled) {
         wdt_hal_write_protect_disable(&wdt1_context);
         wdt_hal_enable(&wdt1_context);
         wdt_hal_write_protect_enable(&wdt1_context);
     }
+    #endif // SOC_TIMER_GROUPS >= 2
 
     if (false == rtc_wdt_ctx_enabled) {
         wdt_hal_write_protect_disable(&rtc_wdt_ctx);

tools/test_apps/.build-test-rules.yml

@@ -118,10 +118,6 @@ tools/test_apps/system/g0_components:
     - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32h4", "esp32c6"] # preview targets
 
 tools/test_apps/system/g1_components:
-  disable:
-    - if: IDF_TARGET == "esp32c2"
-      temporary: true
-      reason: target esp32c2 is not supported yet
 
 tools/test_apps/system/gdb_loadable_elf:
   disable_test:
@@ -168,10 +164,6 @@ tools/test_apps/system/no_embedded_paths:
 tools/test_apps/system/panic:
   enable:
     - if: INCLUDE_DEFAULT == 1 or IDF_TARGET == "esp32h4"
-  disable:
-    - if: IDF_TARGET == "esp32c2"
-      temporary: true
-      reason: target esp32c2 is not supported yet
   disable_test:
     - if: IDF_TARGET not in ["esp32", "esp32s2"]
       temporary: true

tools/test_apps/system/g1_components/README.md

@@ -1,7 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- |
-
-ESP32-C2 Not support this test currently, because some of components have not been supported. IDF-4135
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
 
 # "G1"-components-only app
 

tools/test_apps/system/panic/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
 
 # Building
 Several configurations are provided as `sdkconfig.ci.XXX` and serve as a template.