fix efuse err address in block0 (backport v4.3)

components/soc/esp32c3/include/soc/efuse_reg.h

@@ -1691,7 +1691,7 @@ extern "C" {
 #define EFUSE_DIS_DOWNLOAD_MODE_ERR_V  0x1
 #define EFUSE_DIS_DOWNLOAD_MODE_ERR_S  0
 
-#define EFUSE_RD_REPEAT_ERR4_REG          (DR_REG_EFUSE_BASE + 0x190)
+#define EFUSE_RD_REPEAT_ERR4_REG          (DR_REG_EFUSE_BASE + 0x18C)
 /* EFUSE_RPT4_RESERVED4_ERR : RO ;bitpos:[23:0] ;default: 24'h0 ; */
 /*description: Reserved.*/
 #define EFUSE_RPT4_RESERVED4_ERR  0x00FFFFFF

components/soc/esp32c3/include/soc/efuse_struct.h

@@ -342,7 +342,6 @@ typedef volatile struct efuse_dev_s {
         };
         uint32_t val;
     } rd_repeat_err3;
-    uint32_t reserved_18c;
     union {
         struct {
             uint32_t rpt4_reserved4_err:24;                      /*Reserved.*/
@@ -350,6 +349,7 @@ typedef volatile struct efuse_dev_s {
         };
         uint32_t val;
     } rd_repeat_err4;
+    uint32_t reserved_190;
     uint32_t reserved_194;
     uint32_t reserved_198;
     uint32_t reserved_19c;

components/soc/esp32s2/include/soc/efuse_reg.h

@@ -1908,7 +1908,7 @@ extern "C" {
 #define EFUSE_DIS_DOWNLOAD_MODE_ERR_V  0x1
 #define EFUSE_DIS_DOWNLOAD_MODE_ERR_S  0
 
-#define EFUSE_RD_REPEAT_ERR4_REG          (DR_REG_EFUSE_BASE + 0x190)
+#define EFUSE_RD_REPEAT_ERR4_REG          (DR_REG_EFUSE_BASE + 0x18C)
 /* EFUSE_RPT1_RESERVED0_ERR : RO ;bitpos:[31:24] ;default: 8'h0 ; */
 /*description: Reserved.*/
 #define EFUSE_RPT1_RESERVED0_ERR  0x000000FF

components/soc/esp32s2/include/soc/efuse_struct.h

@@ -357,7 +357,6 @@ typedef volatile struct efuse_dev_s {
         };
         uint32_t val;
     } rd_repeat_err3;
-    uint32_t reserved_18c;
     union {
         struct {
             uint32_t rd_chip_version_err:24;
@@ -365,6 +364,18 @@ typedef volatile struct efuse_dev_s {
         };
         uint32_t val;
     } rd_repeat_err4;
+    uint32_t reserved_190;
+    uint32_t reserved_194;
+    uint32_t reserved_198;
+    uint32_t reserved_19c;
+    uint32_t reserved_1a0;
+    uint32_t reserved_1a4;
+    uint32_t reserved_1a8;
+    uint32_t reserved_1ac;
+    uint32_t reserved_1b0;
+    uint32_t reserved_1b4;
+    uint32_t reserved_1b8;
+    uint32_t reserved_1bc;
     union {
         struct {
             uint32_t rd_mac_spi_8m_err_num: 3;
@@ -500,17 +511,6 @@ typedef volatile struct efuse_dev_s {
         };
         uint32_t val;
     } wr_tim_conf1;
-    uint32_t reserved_1cc;
-    uint32_t reserved_1d0;
-    uint32_t reserved_1d4;
-    uint32_t reserved_1d8;
-    uint32_t reserved_1dc;
-    uint32_t reserved_1e0;
-    uint32_t reserved_1e4;
-    uint32_t reserved_1e8;
-    uint32_t reserved_1ec;
-    uint32_t reserved_1f0;
-    uint32_t reserved_1f4;
     uint32_t reserved_1f8;
     uint32_t date;                                              /**/
 } efuse_dev_t;

components/soc/esp32s3/include/soc/efuse_reg.h

@@ -1842,7 +1842,7 @@ extern "C" {
 #define EFUSE_DIS_DOWNLOAD_MODE_ERR_V  0x1
 #define EFUSE_DIS_DOWNLOAD_MODE_ERR_S  0
 
-#define EFUSE_RD_REPEAT_ERR4_REG          (DR_REG_EFUSE_BASE + 0x190)
+#define EFUSE_RD_REPEAT_ERR4_REG          (DR_REG_EFUSE_BASE + 0x18C)
 /* EFUSE_RPT4_RESERVED4_ERR : RO ;bitpos:[23:0] ;default: 24'h0 ; */
 /*description: Reserved.*/
 #define EFUSE_RPT4_RESERVED4_ERR  0x00FFFFFF