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@@ -77,6 +77,9 @@ typedef void (*flash_test_func_t)(esp_flash_t* chip);
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#define FLASH_TEST_CASE(STR, FUNC_TO_RUN) \
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TEST_CASE(STR, "[esp_flash]") {flash_test_func(FUNC_TO_RUN, 1 /* first index reserved for main flash */ );}
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+#define FLASH_TEST_CASE_IGNORE(STR, FUNC_TO_RUN) \
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+ TEST_CASE(STR, "[esp_flash][ignore]") {flash_test_func(FUNC_TO_RUN, 1 /* first index reserved for main flash */ );}
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+
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/* Use FLASH_TEST_CASE_3 for tests which also run on external flash, which sits in the place of PSRAM
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(these tests are incompatible with PSRAM)
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@@ -84,9 +87,13 @@ typedef void (*flash_test_func_t)(esp_flash_t* chip);
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*/
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#if defined(CONFIG_SPIRAM_SUPPORT) || TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2BETA)
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#define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN)
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+#define FLASH_TEST_CASE_3_IGNORE(STR, FUNCT_TO_RUN)
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#else
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#define FLASH_TEST_CASE_3(STR, FUNC_TO_RUN) \
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TEST_CASE(STR", 3 chips", "[esp_flash][test_env=UT_T1_ESP_FLASH]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
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+
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+#define FLASH_TEST_CASE_3_IGNORE(STR, FUNC_TO_RUN) \
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+ TEST_CASE(STR", 3 chips", "[esp_flash][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
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#endif
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//currently all the configs are the same with esp_flash_spi_device_config_t, no more information required
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@@ -502,7 +509,7 @@ esp_err_t esp_flash_set_io_mode(esp_flash_t* chip, bool qe);
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esp_err_t esp_flash_get_io_mode(esp_flash_t* chip, bool* qe);
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esp_err_t esp_flash_read_chip_id(esp_flash_t* chip, uint32_t* flash_id);
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-static bool check_winbond_chip(esp_flash_t* chip)
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+static bool is_winbond_chip(esp_flash_t* chip)
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{
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uint32_t flash_id;
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esp_err_t ret = esp_flash_read_chip_id(chip, &flash_id);
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@@ -524,14 +531,15 @@ static void test_toggle_qe(esp_flash_t* chip)
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esp_err_t ret = esp_flash_get_io_mode(chip, &qe);
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TEST_ESP_OK(ret);
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- bool is_winbond_chip = check_winbond_chip(chip);
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+ bool allow_failure = is_winbond_chip(chip);
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+
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for (int i = 0; i < 4; i ++) {
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ESP_LOGI(TAG, "write qe: %d->%d", qe, !qe);
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qe = !qe;
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chip->read_mode = qe? SPI_FLASH_QOUT: SPI_FLASH_SLOWRD;
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ret = esp_flash_set_io_mode(chip, qe);
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- if (is_winbond_chip && !qe && ret == ESP_ERR_FLASH_NO_RESPONSE) {
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+ if (allow_failure && !qe && ret == ESP_ERR_FLASH_NO_RESPONSE) {
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//allows clear qe failure for Winbond chips
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ret = ESP_OK;
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}
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@@ -541,8 +549,12 @@ static void test_toggle_qe(esp_flash_t* chip)
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ret = esp_flash_get_io_mode(chip, &qe_read);
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TEST_ESP_OK(ret);
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ESP_LOGD(TAG, "qe read: %d", qe_read);
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- if (qe != qe_read && !qe && is_winbond_chip) {
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- ESP_LOGE(TAG, "cannot clear QE bit, this may be normal for Winbond chips.");
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+ if (!qe && qe_read) {
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+ if (allow_failure) {
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+ ESP_LOGW(TAG, "cannot clear QE bit for known permanent QE (Winbond) chips.");
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+ } else {
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+ ESP_LOGE(TAG, "cannot clear QE bit, please make sure force clearing QE option is enabled in `spi_flash_common_set_io_mode`, and this chip is not a permanent QE one.");
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+ }
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chip->read_mode = io_mode_before;
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return;
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}
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@@ -552,8 +564,11 @@ static void test_toggle_qe(esp_flash_t* chip)
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chip->read_mode = io_mode_before;
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}
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-FLASH_TEST_CASE("Test esp_flash_write can toggle QE bit", test_toggle_qe);
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-FLASH_TEST_CASE_3("Test esp_flash_write can toggle QE bit", test_toggle_qe);
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+// These tests show whether the QE is permanent or not for the chip tested.
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+// To test the behaviour of a new SPI flash chip, enable force_check flag in generic driver
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+// `spi_flash_common_set_io_mode` and then run this test.
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+FLASH_TEST_CASE_IGNORE("Test esp_flash_write can toggle QE bit", test_toggle_qe);
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+FLASH_TEST_CASE_3_IGNORE("Test esp_flash_write can toggle QE bit", test_toggle_qe);
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void test_permutations(flashtest_config_t* config)
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