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@@ -0,0 +1,714 @@
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+/*
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+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+#include <stdint.h>
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+#include <sys/lock.h>
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+#include "sdkconfig.h"
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+#if CONFIG_PCNT_ENABLE_DEBUG_LOG
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+// The local log level must be defined before including esp_log.h
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+// Set the maximum log level for this source file
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+#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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+#endif
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+#include "freertos/FreeRTOS.h"
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+#include "esp_heap_caps.h"
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+#include "esp_intr_alloc.h"
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+#include "esp_attr.h"
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+#include "esp_log.h"
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+#include "esp_check.h"
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+#include "esp_pm.h"
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+#include "esp_rom_gpio.h"
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+#include "soc/soc_caps.h"
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+#include "soc/pcnt_periph.h"
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+#include "hal/pcnt_hal.h"
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+#include "hal/pcnt_ll.h"
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+#include "hal/gpio_hal.h"
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+#include "esp_private/esp_clk.h"
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+#include "esp_private/periph_ctrl.h"
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+#include "driver/gpio.h"
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+#include "driver/pulse_cnt.h"
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+
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+// If ISR handler is allowed to run whilst cache is disabled,
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+// Make sure all the code and related variables used by the handler are in the SRAM
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+#if CONFIG_PCNT_ISR_IRAM_SAFE
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+#define PCNT_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
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+#define PCNT_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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+#else
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+#define PCNT_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
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+#define PCNT_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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+#endif //CONFIG_PCNT_ISR_IRAM_SAFE
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+
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+#define PCNT_PM_LOCK_NAME_LEN_MAX 16
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+
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+static const char *TAG = "pcnt";
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+
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+typedef struct pcnt_platform_t pcnt_platform_t;
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+typedef struct pcnt_group_t pcnt_group_t;
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+typedef struct pcnt_unit_t pcnt_unit_t;
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+typedef struct pcnt_chan_t pcnt_chan_t;
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+
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+struct pcnt_platform_t {
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+ _lock_t mutex; // platform level mutex lock
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+ pcnt_group_t *groups[SOC_PCNT_GROUPS]; // pcnt group pool
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+ int group_ref_counts[SOC_PCNT_GROUPS]; // reference count used to protect group install/uninstall
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+};
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+
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+struct pcnt_group_t {
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+ int group_id; // Group ID, index from 0
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+ portMUX_TYPE spinlock; // to protect per-group register level concurrent access
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+ pcnt_hal_context_t hal;
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+ pcnt_unit_t *units[SOC_PCNT_UNITS_PER_GROUP]; // array of PCNT units
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+};
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+
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+typedef struct {
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+ pcnt_ll_watch_event_id_t event_id; // event type
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+ int watch_point_value; // value to be watched
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+} pcnt_watch_point_t;
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+
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+typedef enum {
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+ PCNT_FSM_STOP,
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+ PCNT_FSM_START,
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+} pcnt_lifecycle_fsm_t;
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+
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+struct pcnt_unit_t {
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+ pcnt_group_t *group; // which group the pcnt unit belongs to
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+ portMUX_TYPE spinlock; // Spinlock, stop one unit from accessing different parts of a same register concurrently
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+ uint32_t unit_id; // allocated unit numerical ID
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+ int low_limit; // low limit value
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+ int high_limit; // high limit value
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+ pcnt_chan_t *channels[SOC_PCNT_CHANNELS_PER_UNIT]; // array of PCNT channels
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+ pcnt_watch_point_t watchers[PCNT_LL_WATCH_EVENT_MAX]; // array of PCNT watchers
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+ intr_handle_t intr; // interrupt handle
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+ esp_pm_lock_handle_t pm_lock; // PM lock, for glitch filter, as that module can only be functional under APB
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+#if CONFIG_PM_ENABLE
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+ char pm_lock_name[PCNT_PM_LOCK_NAME_LEN_MAX]; // pm lock name
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+#endif
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+ pcnt_lifecycle_fsm_t fsm; // access to fsm should be protect by spinlock, as fsm can also accessed from ISR handler
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+ pcnt_watch_cb_t on_reach; // user registered callback function
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+ void *user_data; // user data registered by user, which would be passed to the right callback function
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+};
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+
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+struct pcnt_chan_t {
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+ pcnt_unit_t *unit; // pointer to the PCNT unit where it derives from
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+ uint32_t channel_id; // channel ID, index from 0
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+ int edge_gpio_num;
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+ int level_gpio_num;
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+};
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+
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+// pcnt driver platform, it's always a singleton
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+static pcnt_platform_t s_platform;
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+
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+static pcnt_group_t *pcnt_acquire_group_handle(int group_id);
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+static void pcnt_release_group_handle(pcnt_group_t *group);
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+static void pcnt_default_isr(void *args);
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+
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+esp_err_t pcnt_new_unit(const pcnt_unit_config_t *config, pcnt_unit_handle_t *ret_unit)
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+{
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+ esp_err_t ret = ESP_OK;
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+ pcnt_group_t *group = NULL;
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+ pcnt_unit_t *unit = NULL;
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+ int group_id = -1;
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+ int unit_id = -1;
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+ ESP_GOTO_ON_FALSE(config && ret_unit, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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+ ESP_GOTO_ON_FALSE(config->low_limit < 0 && config->high_limit > 0 && config->low_limit >= PCNT_LL_MIN_LIN && config->high_limit <= PCNT_LL_MAX_LIM,
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+ ESP_ERR_INVALID_ARG, err, TAG, "invalid limit range:[%d,%d]", config->low_limit, config->high_limit);
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+
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+ unit = heap_caps_calloc(1, sizeof(pcnt_unit_t), PCNT_MEM_ALLOC_CAPS);
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+ ESP_GOTO_ON_FALSE(unit, ESP_ERR_NO_MEM, err, TAG, "no mem for unit");
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+
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+ for (int i = 0; (i < SOC_PCNT_GROUPS) && (unit_id < 0); i++) {
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+ group = pcnt_acquire_group_handle(i);
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+ ESP_GOTO_ON_FALSE(group, ESP_ERR_NO_MEM, err, TAG, "no mem for group (%d)", i);
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+ // loop to search free unit in the group
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+ portENTER_CRITICAL(&group->spinlock);
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+ for (int j = 0; j < SOC_PCNT_UNITS_PER_GROUP; j++) {
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+ if (!group->units[j]) {
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+ group_id = i;
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+ unit_id = j;
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+ group->units[j] = unit;
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+ break;
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+ }
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+ }
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+ portEXIT_CRITICAL(&group->spinlock);
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+ if (unit_id < 0) {
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+ pcnt_release_group_handle(group);
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+ group = NULL;
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+ }
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+ }
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+
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+ ESP_GOTO_ON_FALSE(unit_id != -1, ESP_ERR_NOT_FOUND, err, TAG, "no free unit");
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+ unit->group = group;
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+ unit->unit_id = unit_id;
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+
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+ // some events are enabled by default, disable them all
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+ pcnt_ll_disable_all_events(group->hal.dev, unit_id);
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+ // disable filter by default
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+ pcnt_ll_enable_glitch_filter(group->hal.dev, unit_id, false);
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+ // set default high/low limitation value
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+ // note: limit value takes effect only after counter clear
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+ pcnt_ll_set_high_limit_value(group->hal.dev, unit_id, config->high_limit);
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+ pcnt_ll_set_low_limit_value(group->hal.dev, unit_id, config->low_limit);
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+ unit->high_limit = config->high_limit;
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+ unit->low_limit = config->low_limit;
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+
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+ // clear/pause register is shared by all units, so using group's spinlock
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+ portENTER_CRITICAL(&group->spinlock);
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+ pcnt_ll_stop_count(group->hal.dev, unit_id);
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+ pcnt_ll_clear_count(group->hal.dev, unit_id);
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+ pcnt_ll_enable_intr(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id), false);
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+ pcnt_ll_clear_intr_status(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id));
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+ portEXIT_CRITICAL(&group->spinlock);
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+
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+ unit->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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+ unit->fsm = PCNT_FSM_STOP;
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+ for (int i = 0; i < PCNT_LL_WATCH_EVENT_MAX; i++) {
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+ unit->watchers[i].event_id = PCNT_LL_WATCH_EVENT_INVALID; // invalid all watch point
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+ }
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+ ESP_LOGD(TAG, "new pcnt unit (%d,%d) at %p, count range:[%d,%d]", group_id, unit_id, unit, unit->low_limit, unit->high_limit);
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+ *ret_unit = unit;
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+ return ESP_OK;
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+
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+err:
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+ if (unit) {
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+ free(unit);
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+ }
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+ if (group) {
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+ pcnt_release_group_handle(group);
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+ }
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+ return ret;
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+}
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+
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+esp_err_t pcnt_del_unit(pcnt_unit_handle_t unit)
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+{
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+ pcnt_group_t *group = NULL;
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+ ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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+ ESP_RETURN_ON_FALSE(unit->fsm == PCNT_FSM_STOP, ESP_ERR_INVALID_STATE, TAG, "can't delete unit as it's not in stop state");
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+ for (int i = 0; i < SOC_PCNT_CHANNELS_PER_UNIT; i++) {
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+ ESP_RETURN_ON_FALSE(!unit->channels[i], ESP_ERR_INVALID_STATE, TAG, "channel %d still in working", i);
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+ }
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+ for (int i = 0; i < PCNT_LL_WATCH_EVENT_MAX; i++) {
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+ ESP_RETURN_ON_FALSE(unit->watchers[i].event_id == PCNT_LL_WATCH_EVENT_INVALID, ESP_ERR_INVALID_STATE, TAG,
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+ "watch point %d still in working", unit->watchers[i].watch_point_value);
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+ }
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+ group = unit->group;
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+ int group_id = group->group_id;
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+ int unit_id = unit->unit_id;
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+
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+ portENTER_CRITICAL(&group->spinlock);
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+ group->units[unit_id] = NULL;
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+ portEXIT_CRITICAL(&group->spinlock);
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+
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+ if (unit->intr) {
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+ esp_intr_free(unit->intr);
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+ ESP_LOGD(TAG, "uninstall interrupt service for unit (%d,%d)", group_id, unit_id);
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+ }
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+ if (unit->pm_lock) {
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+ esp_pm_lock_delete(unit->pm_lock);
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+ ESP_LOGD(TAG, "uninstall APB_FREQ_MAX lock for unit (%d,%d)", group_id, unit_id);
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+ }
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+ free(unit);
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+ ESP_LOGD(TAG, "del unit (%d,%d)", group_id, unit_id);
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+ // unit has a reference on group, release it now
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+ pcnt_release_group_handle(group);
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+
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+ return ESP_OK;
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+}
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+
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+esp_err_t pcnt_unit_set_glitch_filter(pcnt_unit_handle_t unit, const pcnt_glitch_filter_config_t *config)
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+{
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+ pcnt_group_t *group = NULL;
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+ uint32_t glitch_filter_thres = 0;
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+ ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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+ group = unit->group;
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+ if (config) {
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+ glitch_filter_thres = esp_clk_apb_freq() / 1000000 * config->max_glitch_ns / 1000;
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+ ESP_RETURN_ON_FALSE(glitch_filter_thres <= PCNT_LL_MAX_GLITCH_WIDTH, ESP_ERR_INVALID_ARG, TAG, "glitch width out of range");
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+
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+ // The filter module is working against APB clock, so lazy install PM lock
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+#if CONFIG_PM_ENABLE
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+ if (!unit->pm_lock) {
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+ sprintf(unit->pm_lock_name, "pcnt_%d_%d", group->group_id, unit->unit_id); // e.g. pcnt_0_0
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+ ESP_RETURN_ON_ERROR(esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, unit->pm_lock_name, &unit->pm_lock), TAG, "install pm lock failed");
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+ ESP_LOGD(TAG, "install APB_FREQ_MAX lock for unit (%d,%d)", group->group_id, unit->unit_id);
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+ }
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+#endif
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+ }
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+
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+ // filter control bit is mixed with other PCNT control bits in the same register
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+ portENTER_CRITICAL(&unit->spinlock);
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+ if (config) {
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+ pcnt_ll_set_glitch_filter_thres(group->hal.dev, unit->unit_id, glitch_filter_thres);
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+ pcnt_ll_enable_glitch_filter(group->hal.dev, unit->unit_id, true);
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+ } else {
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+ pcnt_ll_enable_glitch_filter(group->hal.dev, unit->unit_id, false);
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+ }
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+ portEXIT_CRITICAL(&unit->spinlock);
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+
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+ return ESP_OK;
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+}
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+
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+esp_err_t pcnt_unit_start(pcnt_unit_handle_t unit)
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+{
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+ pcnt_group_t *group = NULL;
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+ ESP_RETURN_ON_FALSE_ISR(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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+ group = unit->group;
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+
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+ // acquire power manager lock
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+ if (unit->pm_lock) {
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+ ESP_RETURN_ON_ERROR_ISR(esp_pm_lock_acquire(unit->pm_lock), TAG, "acquire APB_FREQ_MAX lock failed");
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+ }
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+ // enable interupt service
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+ if (unit->intr) {
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+ ESP_RETURN_ON_ERROR_ISR(esp_intr_enable(unit->intr), TAG, "enable interrupt service failed");
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+ }
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+
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+ // all PCNT units share the same register to control counter
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+ portENTER_CRITICAL_SAFE(&group->spinlock);
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+ pcnt_ll_start_count(group->hal.dev, unit->unit_id);
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+ portEXIT_CRITICAL_SAFE(&group->spinlock);
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+
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+ portENTER_CRITICAL_SAFE(&unit->spinlock);
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+ unit->fsm = PCNT_FSM_START;
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+ portEXIT_CRITICAL_SAFE(&unit->spinlock);
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+
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+ return ESP_OK;
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+}
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+
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+esp_err_t pcnt_unit_stop(pcnt_unit_handle_t unit)
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+{
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+ pcnt_group_t *group = NULL;
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+ ESP_RETURN_ON_FALSE_ISR(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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+ group = unit->group;
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+
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+ // all PCNT units share the same register to control counter
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+ portENTER_CRITICAL_SAFE(&group->spinlock);
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+ pcnt_ll_stop_count(group->hal.dev, unit->unit_id);
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+ portEXIT_CRITICAL_SAFE(&group->spinlock);
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+
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+ portENTER_CRITICAL_SAFE(&unit->spinlock);
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+ unit->fsm = PCNT_FSM_STOP;
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+ portEXIT_CRITICAL_SAFE(&unit->spinlock);
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+
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+ // disable interrupt service
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+ if (unit->intr) {
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+ ESP_RETURN_ON_ERROR_ISR(esp_intr_disable(unit->intr), TAG, "disable interrupt service failed");
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+ }
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+ // release power manager lock
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+ if (unit->pm_lock) {
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+ ESP_RETURN_ON_ERROR_ISR(esp_pm_lock_release(unit->pm_lock), TAG, "release APB_FREQ_MAX lock failed");
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+ }
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+
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+ return ESP_OK;
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+}
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+
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+esp_err_t pcnt_unit_clear_count(pcnt_unit_handle_t unit)
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+{
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+ pcnt_group_t *group = NULL;
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+ ESP_RETURN_ON_FALSE_ISR(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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+ group = unit->group;
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+
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+ // all PCNT units share the same register to control counter
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+ portENTER_CRITICAL_SAFE(&group->spinlock);
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+ pcnt_ll_clear_count(group->hal.dev, unit->unit_id);
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+ portEXIT_CRITICAL_SAFE(&group->spinlock);
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+
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+ return ESP_OK;
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+}
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+
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+esp_err_t pcnt_unit_get_count(pcnt_unit_handle_t unit, int *value)
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+{
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+ pcnt_group_t *group = NULL;
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+ ESP_RETURN_ON_FALSE_ISR(unit && value, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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+ group = unit->group;
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+ *value = pcnt_ll_get_count(group->hal.dev, unit->unit_id);
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+
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+ return ESP_OK;
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+}
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+
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+esp_err_t pcnt_unit_register_event_callbacks(pcnt_unit_handle_t unit, const pcnt_event_callbacks_t *cbs, void *user_data)
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+{
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+ pcnt_group_t *group = NULL;
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+ ESP_RETURN_ON_FALSE(unit && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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+ group = unit->group;
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+ int group_id = group->group_id;
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+ int unit_id = unit->unit_id;
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+
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+#if CONFIG_PCNT_ISR_IRAM_SAFE
|
|
|
+ if (cbs->on_reach) {
|
|
|
+ ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_reach), ESP_ERR_INVALID_ARG, TAG, "on_reach callback not in IRAM");
|
|
|
+ }
|
|
|
+ if (user_data) {
|
|
|
+ ESP_RETURN_ON_FALSE(esp_ptr_in_dram(user_data) ||
|
|
|
+ esp_ptr_in_diram_dram(user_data) ||
|
|
|
+ esp_ptr_in_rtc_dram_fast(user_data),
|
|
|
+ ESP_ERR_INVALID_ARG, TAG, "user context not in DRAM");
|
|
|
+ }
|
|
|
+#endif
|
|
|
+
|
|
|
+ // lazy install interrupt service
|
|
|
+ if (!unit->intr) {
|
|
|
+ int isr_flags = PCNT_INTR_ALLOC_FLAGS;
|
|
|
+ ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(pcnt_periph_signals.groups[group_id].irq, isr_flags,
|
|
|
+ (uint32_t)pcnt_ll_get_intr_status_reg(group->hal.dev), PCNT_LL_UNIT_WATCH_EVENT(unit_id),
|
|
|
+ pcnt_default_isr, unit, &unit->intr),
|
|
|
+ TAG, "install interrupt service failed");
|
|
|
+ }
|
|
|
+ // enable/disable PCNT interrupt events
|
|
|
+ portENTER_CRITICAL(&group->spinlock);
|
|
|
+ pcnt_ll_enable_intr(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id), cbs->on_reach != NULL);
|
|
|
+ portEXIT_CRITICAL(&group->spinlock);
|
|
|
+
|
|
|
+ unit->on_reach = cbs->on_reach;
|
|
|
+ unit->user_data = user_data;
|
|
|
+ return ESP_OK;
|
|
|
+}
|
|
|
+
|
|
|
+esp_err_t pcnt_unit_add_watch_point(pcnt_unit_handle_t unit, int watch_point)
|
|
|
+{
|
|
|
+ esp_err_t ret = ESP_OK;
|
|
|
+ pcnt_group_t *group = NULL;
|
|
|
+ ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
+ ESP_RETURN_ON_FALSE(watch_point <= unit->high_limit && watch_point >= unit->low_limit,
|
|
|
+ ESP_ERR_INVALID_ARG, TAG, "watch_point out of limit");
|
|
|
+ group = unit->group;
|
|
|
+
|
|
|
+ // event enable/disable is mixed with other control function in the same register
|
|
|
+ portENTER_CRITICAL(&unit->spinlock);
|
|
|
+ // zero cross watch point
|
|
|
+ if (watch_point == 0) {
|
|
|
+ if (unit->watchers[PCNT_LL_WATCH_EVENT_ZERO_CROSS].event_id != PCNT_LL_WATCH_EVENT_INVALID) {
|
|
|
+ ret = ESP_ERR_INVALID_STATE; // zero cross event watcher has been installed already
|
|
|
+ } else {
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_ZERO_CROSS].event_id = PCNT_LL_WATCH_EVENT_ZERO_CROSS;
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_ZERO_CROSS].watch_point_value = 0;
|
|
|
+ pcnt_ll_enable_zero_cross_event(group->hal.dev, unit->unit_id, true);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ // high limit watch point
|
|
|
+ else if (watch_point == unit->high_limit) {
|
|
|
+ if (unit->watchers[PCNT_LL_WATCH_EVENT_HIGH_LIMIT].event_id != PCNT_LL_WATCH_EVENT_INVALID) {
|
|
|
+ ret = ESP_ERR_INVALID_STATE; // high limit event watcher has been installed already
|
|
|
+ } else {
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_HIGH_LIMIT].event_id = PCNT_LL_WATCH_EVENT_HIGH_LIMIT;
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_HIGH_LIMIT].watch_point_value = unit->high_limit;
|
|
|
+ pcnt_ll_enable_high_limit_event(group->hal.dev, unit->unit_id, true);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ // low limit watch point
|
|
|
+ else if (watch_point == unit->low_limit) {
|
|
|
+ if (unit->watchers[PCNT_LL_WATCH_EVENT_LOW_LIMIT].event_id != PCNT_LL_WATCH_EVENT_INVALID) {
|
|
|
+ ret = ESP_ERR_INVALID_STATE; // low limit event watcher has been installed already
|
|
|
+ } else {
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_LOW_LIMIT].event_id = PCNT_LL_WATCH_EVENT_LOW_LIMIT;
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_LOW_LIMIT].watch_point_value = unit->low_limit;
|
|
|
+ pcnt_ll_enable_low_limit_event(group->hal.dev, unit->unit_id, true);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ // other threshold watch point
|
|
|
+ else {
|
|
|
+ int thres_num = SOC_PCNT_THRES_POINT_PER_UNIT - 1;
|
|
|
+ switch (thres_num) {
|
|
|
+ case 1:
|
|
|
+ if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].event_id == PCNT_LL_WATCH_EVENT_INVALID) {
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].event_id = PCNT_LL_WATCH_EVENT_THRES1;
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].watch_point_value = watch_point;
|
|
|
+ pcnt_ll_set_thres_value(group->hal.dev, unit->unit_id, 1, watch_point);
|
|
|
+ pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 1, true);
|
|
|
+ break;
|
|
|
+ } else if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].watch_point_value == watch_point) {
|
|
|
+ ret = ESP_ERR_INVALID_STATE;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ /* fall-through */
|
|
|
+ case 0:
|
|
|
+ if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].event_id == PCNT_LL_WATCH_EVENT_INVALID) {
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].event_id = PCNT_LL_WATCH_EVENT_THRES0;
|
|
|
+ unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].watch_point_value = watch_point;
|
|
|
+ pcnt_ll_set_thres_value(group->hal.dev, unit->unit_id, 0, watch_point);
|
|
|
+ pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 0, true);
|
|
|
+ break;
|
|
|
+ } else if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].watch_point_value == watch_point) {
|
|
|
+ ret = ESP_ERR_INVALID_STATE;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ /* fall-through */
|
|
|
+ default:
|
|
|
+ ret = ESP_ERR_NOT_FOUND; // no free threshold watch point available
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ portEXIT_CRITICAL(&unit->spinlock);
|
|
|
+ ESP_RETURN_ON_ERROR(ret, TAG, "add watchpoint %d failed", watch_point);
|
|
|
+
|
|
|
+ return ESP_OK;
|
|
|
+}
|
|
|
+
|
|
|
+esp_err_t pcnt_unit_remove_watch_point(pcnt_unit_handle_t unit, int watch_point)
|
|
|
+{
|
|
|
+ pcnt_group_t *group = NULL;
|
|
|
+ ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
+ group = unit->group;
|
|
|
+ pcnt_ll_watch_event_id_t event_id = PCNT_LL_WATCH_EVENT_INVALID;
|
|
|
+
|
|
|
+ // event enable/disable is mixed with other control function in the same register
|
|
|
+ portENTER_CRITICAL(&unit->spinlock);
|
|
|
+ for (int i = 0; i < PCNT_LL_WATCH_EVENT_MAX; i++) {
|
|
|
+ if (unit->watchers[i].event_id != PCNT_LL_WATCH_EVENT_INVALID && unit->watchers[i].watch_point_value == watch_point) {
|
|
|
+ event_id = unit->watchers[i].event_id;
|
|
|
+ unit->watchers[i].event_id = PCNT_LL_WATCH_EVENT_INVALID;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ switch (event_id) {
|
|
|
+ case PCNT_LL_WATCH_EVENT_ZERO_CROSS:
|
|
|
+ pcnt_ll_enable_zero_cross_event(group->hal.dev, unit->unit_id, false);
|
|
|
+ break;
|
|
|
+ case PCNT_LL_WATCH_EVENT_LOW_LIMIT:
|
|
|
+ pcnt_ll_enable_low_limit_event(group->hal.dev, unit->unit_id, false);
|
|
|
+ break;
|
|
|
+ case PCNT_LL_WATCH_EVENT_HIGH_LIMIT:
|
|
|
+ pcnt_ll_enable_high_limit_event(group->hal.dev, unit->unit_id, false);
|
|
|
+ break;
|
|
|
+ case PCNT_LL_WATCH_EVENT_THRES0:
|
|
|
+ pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 0, false);
|
|
|
+ break;
|
|
|
+ case PCNT_LL_WATCH_EVENT_THRES1:
|
|
|
+ pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 1, false);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ portEXIT_CRITICAL(&unit->spinlock);
|
|
|
+ ESP_RETURN_ON_FALSE(event_id != PCNT_LL_WATCH_EVENT_INVALID, ESP_ERR_INVALID_STATE, TAG, "watch point %d not added yet", watch_point);
|
|
|
+ return ESP_OK;
|
|
|
+}
|
|
|
+
|
|
|
+esp_err_t pcnt_new_channel(pcnt_unit_handle_t unit, const pcnt_chan_config_t *config, pcnt_channel_handle_t *ret_chan)
|
|
|
+{
|
|
|
+ esp_err_t ret = ESP_OK;
|
|
|
+ pcnt_chan_t *channel = NULL;
|
|
|
+ pcnt_group_t *group = NULL;
|
|
|
+ ESP_GOTO_ON_FALSE(unit && config && ret_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
|
|
|
+ group = unit->group;
|
|
|
+ int group_id = group->group_id;
|
|
|
+ int unit_id = unit->unit_id;
|
|
|
+
|
|
|
+ channel = heap_caps_calloc(1, sizeof(pcnt_chan_t), PCNT_MEM_ALLOC_CAPS);
|
|
|
+ ESP_GOTO_ON_FALSE(channel, ESP_ERR_NO_MEM, err, TAG, "no mem for channel");
|
|
|
+
|
|
|
+ // search for a free channel
|
|
|
+ int channel_id = -1;
|
|
|
+ portENTER_CRITICAL(&unit->spinlock);
|
|
|
+ for (int i = 0; i < SOC_PCNT_CHANNELS_PER_UNIT; i++) {
|
|
|
+ if (!unit->channels[i]) {
|
|
|
+ channel_id = i;
|
|
|
+ unit->channels[channel_id] = channel;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ portEXIT_CRITICAL(&unit->spinlock);
|
|
|
+ ESP_GOTO_ON_FALSE(channel_id != -1, ESP_ERR_NOT_FOUND, err, TAG, "no free channel in unit (%d,%d)", group_id, unit_id);
|
|
|
+
|
|
|
+ // GPIO configuration
|
|
|
+ gpio_config_t gpio_conf = {
|
|
|
+ .intr_type = GPIO_INTR_DISABLE,
|
|
|
+ .mode = GPIO_MODE_INPUT | (config->flags.io_loop_back ? GPIO_MODE_OUTPUT : 0), // also enable the output path if `io_loop_back` is enabled
|
|
|
+ .pull_down_en = false,
|
|
|
+ .pull_up_en = true,
|
|
|
+ };
|
|
|
+ if (config->edge_gpio_num >= 0) {
|
|
|
+ gpio_conf.pin_bit_mask = 1ULL << config->edge_gpio_num;
|
|
|
+ ESP_GOTO_ON_ERROR(gpio_config(&gpio_conf), err, TAG, "config edge GPIO failed");
|
|
|
+ esp_rom_gpio_connect_in_signal(config->edge_gpio_num,
|
|
|
+ pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].pulse_sig,
|
|
|
+ config->flags.invert_edge_input);
|
|
|
+ }
|
|
|
+ if (config->level_gpio_num >= 0) {
|
|
|
+ gpio_conf.pin_bit_mask = 1ULL << config->level_gpio_num;
|
|
|
+ ESP_GOTO_ON_ERROR(gpio_config(&gpio_conf), err, TAG, "config level GPIO failed");
|
|
|
+ esp_rom_gpio_connect_in_signal(config->level_gpio_num,
|
|
|
+ pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].control_sig,
|
|
|
+ config->flags.invert_level_input);
|
|
|
+ }
|
|
|
+
|
|
|
+ channel->channel_id = channel_id;
|
|
|
+ channel->unit = unit;
|
|
|
+ channel->edge_gpio_num = config->edge_gpio_num;
|
|
|
+ channel->level_gpio_num = config->level_gpio_num;
|
|
|
+ ESP_LOGD(TAG, "new pcnt channel(%d,%d,%d) at %p", group_id, unit_id, channel_id, channel);
|
|
|
+
|
|
|
+ *ret_chan = channel;
|
|
|
+ return ESP_OK;
|
|
|
+err:
|
|
|
+ if (channel) {
|
|
|
+ free(channel);
|
|
|
+ }
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+esp_err_t pcnt_del_channel(pcnt_channel_handle_t chan)
|
|
|
+{
|
|
|
+ ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
+ pcnt_unit_t *unit = chan->unit;
|
|
|
+ pcnt_group_t *group = unit->group;
|
|
|
+ int group_id = group->group_id;
|
|
|
+ int unit_id = unit->unit_id;
|
|
|
+ int channel_id = chan->channel_id;
|
|
|
+
|
|
|
+ portENTER_CRITICAL(&unit->spinlock);
|
|
|
+ unit->channels[channel_id] = NULL;
|
|
|
+ portEXIT_CRITICAL(&unit->spinlock);
|
|
|
+
|
|
|
+ if (chan->level_gpio_num >= 0) {
|
|
|
+ gpio_reset_pin(chan->level_gpio_num);
|
|
|
+ }
|
|
|
+ if (chan->edge_gpio_num >= 0) {
|
|
|
+ gpio_reset_pin(chan->edge_gpio_num);
|
|
|
+ }
|
|
|
+
|
|
|
+ free(chan);
|
|
|
+ ESP_LOGD(TAG, "del pcnt channel(%d,%d,%d)", group_id, unit_id, channel_id);
|
|
|
+ return ESP_OK;
|
|
|
+}
|
|
|
+
|
|
|
+esp_err_t pcnt_channel_set_edge_action(pcnt_channel_handle_t chan, pcnt_channel_edge_action_t pos_act, pcnt_channel_edge_action_t neg_act)
|
|
|
+{
|
|
|
+ pcnt_group_t *group = NULL;
|
|
|
+ ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
+ pcnt_unit_t *unit = chan->unit;
|
|
|
+ group = unit->group;
|
|
|
+
|
|
|
+ // mode control bits are mixed with other PCNT control bits in a same register
|
|
|
+ portENTER_CRITICAL(&unit->spinlock);
|
|
|
+ pcnt_ll_set_edge_action(group->hal.dev, unit->unit_id, chan->channel_id, pos_act, neg_act);
|
|
|
+ portEXIT_CRITICAL(&unit->spinlock);
|
|
|
+
|
|
|
+ return ESP_OK;
|
|
|
+}
|
|
|
+
|
|
|
+esp_err_t pcnt_channel_set_level_action(pcnt_channel_handle_t chan, pcnt_channel_level_action_t high_act, pcnt_channel_level_action_t low_act)
|
|
|
+{
|
|
|
+ pcnt_group_t *group = NULL;
|
|
|
+ ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
+ pcnt_unit_t *unit = chan->unit;
|
|
|
+ group = unit->group;
|
|
|
+
|
|
|
+ // mode control bits are mixed with other PCNT control bits in a same register
|
|
|
+ portENTER_CRITICAL(&unit->spinlock);
|
|
|
+ pcnt_ll_set_level_action(group->hal.dev, unit->unit_id, chan->channel_id, high_act, low_act);
|
|
|
+ portEXIT_CRITICAL(&unit->spinlock);
|
|
|
+
|
|
|
+ return ESP_OK;
|
|
|
+}
|
|
|
+
|
|
|
+static pcnt_group_t *pcnt_acquire_group_handle(int group_id)
|
|
|
+{
|
|
|
+#if CONFIG_PCNT_ENABLE_DEBUG_LOG
|
|
|
+ esp_log_level_set(TAG, ESP_LOG_DEBUG);
|
|
|
+#endif
|
|
|
+ bool new_group = false;
|
|
|
+ pcnt_group_t *group = NULL;
|
|
|
+
|
|
|
+ // prevent install pcnt group concurrently
|
|
|
+ _lock_acquire(&s_platform.mutex);
|
|
|
+ if (!s_platform.groups[group_id]) {
|
|
|
+ group = heap_caps_calloc(1, sizeof(pcnt_group_t), PCNT_MEM_ALLOC_CAPS);
|
|
|
+ if (group) {
|
|
|
+ new_group = true;
|
|
|
+ s_platform.groups[group_id] = group; // register to platform
|
|
|
+ // initialize pcnt group members
|
|
|
+ group->group_id = group_id;
|
|
|
+ group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
|
|
|
+ // enable APB access pcnt registers
|
|
|
+ periph_module_enable(pcnt_periph_signals.groups[group_id].module);
|
|
|
+ periph_module_reset(pcnt_periph_signals.groups[group_id].module);
|
|
|
+ // initialize HAL context
|
|
|
+ pcnt_hal_init(&group->hal, group_id);
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ group = s_platform.groups[group_id];
|
|
|
+ }
|
|
|
+ if (group) {
|
|
|
+ // someone acquired the group handle means we have a new object that refer to this group
|
|
|
+ s_platform.group_ref_counts[group_id]++;
|
|
|
+ }
|
|
|
+ _lock_release(&s_platform.mutex);
|
|
|
+
|
|
|
+ if (new_group) {
|
|
|
+ ESP_LOGD(TAG, "new group (%d) at %p", group_id, group);
|
|
|
+ }
|
|
|
+
|
|
|
+ return group;
|
|
|
+}
|
|
|
+
|
|
|
+static void pcnt_release_group_handle(pcnt_group_t *group)
|
|
|
+{
|
|
|
+ int group_id = group->group_id;
|
|
|
+ bool do_deinitialize = false;
|
|
|
+
|
|
|
+ _lock_acquire(&s_platform.mutex);
|
|
|
+ s_platform.group_ref_counts[group_id]--;
|
|
|
+ if (s_platform.group_ref_counts[group_id] == 0) {
|
|
|
+ assert(s_platform.groups[group_id]);
|
|
|
+ do_deinitialize = true;
|
|
|
+ s_platform.groups[group_id] = NULL; // deregister from platform
|
|
|
+ periph_module_disable(pcnt_periph_signals.groups[group_id].module);
|
|
|
+ }
|
|
|
+ _lock_release(&s_platform.mutex);
|
|
|
+
|
|
|
+ if (do_deinitialize) {
|
|
|
+ free(group);
|
|
|
+ ESP_LOGD(TAG, "del group (%d)", group_id);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+IRAM_ATTR static void pcnt_default_isr(void *args)
|
|
|
+{
|
|
|
+ bool need_yield = false;
|
|
|
+ pcnt_unit_t *unit = (pcnt_unit_t *)args;
|
|
|
+ int unit_id = unit->unit_id;
|
|
|
+ pcnt_group_t *group = unit->group;
|
|
|
+ pcnt_watch_cb_t on_reach = unit->on_reach;
|
|
|
+
|
|
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+ uint32_t intr_status = pcnt_ll_get_intr_status(group->hal.dev);
|
|
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+ if (intr_status & PCNT_LL_UNIT_WATCH_EVENT(unit_id)) {
|
|
|
+ pcnt_ll_clear_intr_status(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id));
|
|
|
+ uint32_t event_status = pcnt_ll_get_event_status(group->hal.dev, unit_id);
|
|
|
+ // iter on each event_id
|
|
|
+ while (event_status) {
|
|
|
+ int event_id = __builtin_ffs(event_status) - 1;
|
|
|
+ event_status &= (event_status - 1); // clear the right most bit
|
|
|
+
|
|
|
+ // invoked user registered callback
|
|
|
+ if (on_reach) {
|
|
|
+ pcnt_watch_event_data_t edata = {
|
|
|
+ .watch_point_value = unit->watchers[event_id].watch_point_value,
|
|
|
+ .zero_cross_mode = pcnt_ll_get_zero_cross_mode(group->hal.dev, unit_id),
|
|
|
+ };
|
|
|
+ if (on_reach(unit, &edata, unit->user_data)) {
|
|
|
+ // check if we need to yield for high priority task
|
|
|
+ need_yield = true;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ if (need_yield) {
|
|
|
+ portYIELD_FROM_ISR();
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * @brief This function will be called during start up, to check that pulse_cnt driver is not running along with the legacy pcnt driver
|
|
|
+ */
|
|
|
+__attribute__((constructor))
|
|
|
+static void check_pulse_cnt_driver_conflict(void)
|
|
|
+{
|
|
|
+ extern int pcnt_driver_init_count;
|
|
|
+ pcnt_driver_init_count++;
|
|
|
+ if (pcnt_driver_init_count > 1) {
|
|
|
+ ESP_EARLY_LOGE(TAG, "CONFLICT! The pulse_cnt driver can't work along with the legacy pcnt driver");
|
|
|
+ abort();
|
|
|
+ }
|
|
|
+}
|
morris