Merge branch 'bugfix/fix_wrong_mmu_end_addr_check' into 'master'

mmu: fix wrong mmu end check in mmu_ll.h

See merge request espressif/esp-idf!19257

components/esp_psram/esp_psram.c

@@ -159,8 +159,8 @@ esp_err_t esp_psram_init(void)
     //----------------------------------Map the PSRAM physical range to MMU-----------------------------//
     intptr_t vaddr_start = mmu_get_psram_vaddr_start();
     if (vaddr_start + psram_available_size > mmu_get_psram_vaddr_end()) {
-        ESP_EARLY_LOGV(TAG, "Virtual address not enough for PSRAM!");
         psram_available_size = mmu_get_psram_vaddr_end() - vaddr_start;
+        ESP_EARLY_LOGV(TAG, "Virtual address not enough for PSRAM, map as much as we can. %dMB is mapped", psram_available_size / 1024 / 1024);
     }
 
 #if CONFIG_IDF_TARGET_ESP32

components/hal/esp32/include/hal/mmu_ll.h

@@ -60,7 +60,7 @@ __attribute__((always_inline))
 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len)
 {
     (void)mmu_id;
-    uint32_t vaddr_end = vaddr_start + len;
+    uint32_t vaddr_end = vaddr_start + len - 1;
 
     return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) ||
            (ADDRESS_IN_IRAM1_CACHE(vaddr_start) && ADDRESS_IN_IRAM1_CACHE(vaddr_end)) ||

components/hal/esp32c2/include/hal/mmu_ll.h

@@ -68,7 +68,7 @@ __attribute__((always_inline))
 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len)
 {
     (void)mmu_id;
-    uint32_t vaddr_end = vaddr_start + len;
+    uint32_t vaddr_end = vaddr_start + len - 1;
     return (ADDRESS_IN_IRAM0_CACHE(vaddr_start, MMU_LL_PAGE_SIZE) && ADDRESS_IN_IRAM0_CACHE(vaddr_end, MMU_LL_PAGE_SIZE)) || (ADDRESS_IN_DRAM0_CACHE(vaddr_start, MMU_LL_PAGE_SIZE) && ADDRESS_IN_DRAM0_CACHE(vaddr_end, MMU_LL_PAGE_SIZE));
 }
 

components/hal/esp32c3/include/hal/mmu_ll.h

@@ -60,7 +60,7 @@ __attribute__((always_inline))
 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len)
 {
     (void)mmu_id;
-    uint32_t vaddr_end = vaddr_start + len;
+    uint32_t vaddr_end = vaddr_start + len - 1;
     return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end));
 }
 

components/hal/esp32h2/include/hal/mmu_ll.h

@@ -60,7 +60,7 @@ __attribute__((always_inline))
 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len)
 {
     (void)mmu_id;
-    uint32_t vaddr_end = vaddr_start + len;
+    uint32_t vaddr_end = vaddr_start + len - 1;
     return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end));
 }
 

components/hal/esp32s3/include/hal/mmu_ll.h

@@ -60,7 +60,7 @@ __attribute__((always_inline))
 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len)
 {
     (void)mmu_id;
-    uint32_t vaddr_end = vaddr_start + len;
+    uint32_t vaddr_end = vaddr_start + len - 1;
     return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end));
 }
 

components/hal/mmu_hal.c

@@ -83,7 +83,7 @@ void mmu_hal_map_region(uint32_t mmu_id, mmu_target_t mem_type, uint32_t vaddr,
     uint32_t page_size_in_bytes = mmu_hal_pages_to_bytes(mmu_id, 1);
     HAL_ASSERT(vaddr % page_size_in_bytes == 0);
     HAL_ASSERT(paddr % page_size_in_bytes == 0);
-    HAL_ASSERT((paddr + len) <= mmu_hal_pages_to_bytes(mmu_id, MMU_MAX_PADDR_PAGE_NUM));
+    HAL_ASSERT((paddr + len - 1) < mmu_hal_pages_to_bytes(mmu_id, MMU_MAX_PADDR_PAGE_NUM));
     HAL_ASSERT(mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr, len));
 
     uint32_t page_num = (len + page_size_in_bytes - 1) / page_size_in_bytes;