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@@ -25,6 +25,7 @@
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#include "soc/ana_cmpr_periph.h"
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#include "hal/ana_cmpr_ll.h"
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#include "driver/ana_cmpr.h"
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+#include "driver/gpio.h"
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#include "esp_private/io_mux.h"
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#include "esp_private/esp_clk.h"
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@@ -36,6 +37,7 @@ struct ana_cmpr_t {
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ana_cmpr_event_callbacks_t cbs; /*!< The callback group that set by user */
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intr_handle_t intr_handle; /*!< Interrupt handle */
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uint32_t intr_mask; /*!< Interrupt mask */
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+ int intr_priority; /*!< Interrupt priority */
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void *user_data; /*!< User data that passed to the callbacks */
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uint32_t src_clk_freq_hz; /*!< Source clock frequency of the Analog Comparator unit */
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esp_pm_lock_handle_t pm_lock; /*!< The Power Management lock that used to avoid unexpected power down of the clock domain */
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@@ -44,16 +46,16 @@ struct ana_cmpr_t {
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/* Helper macros */
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#define ANA_CMPR_NULL_POINTER_CHECK(p) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, TAG, "input parameter '"#p"' is NULL")
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#define ANA_CMPR_NULL_POINTER_CHECK_ISR(p) ESP_RETURN_ON_FALSE_ISR((p), ESP_ERR_INVALID_ARG, TAG, "input parameter '"#p"' is NULL")
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-#define ANA_CMPR_UNIT_CHECK(unit) ESP_RETURN_ON_FALSE((unit) >= ANA_CMPR_UNIT_0 && (unit) < SOC_ANA_CMPR_NUM, \
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+#define ANA_CMPR_UNIT_CHECK(unit) ESP_RETURN_ON_FALSE((unit) >= 0 && (unit) < SOC_ANA_CMPR_NUM, \
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ESP_ERR_INVALID_ARG, TAG, "invalid uint number");
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/* Memory allocation caps which decide the section that memory supposed to allocate */
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#if CONFIG_ANA_CMPR_ISR_IRAM_SAFE
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#define ANA_CMPR_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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-#define ANA_CMPR_INTR_FLAG (ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_IRAM) // Shared with GPIO
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+#define ANA_CMPR_INTR_FLAG (ESP_INTR_FLAG_IRAM)
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#else
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#define ANA_CMPR_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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-#define ANA_CMPR_INTR_FLAG (ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED) // Shared with GPIO
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+#define ANA_CMPR_INTR_FLAG (0)
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#endif
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/* Driver tag */
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@@ -71,20 +73,20 @@ static void IRAM_ATTR s_ana_cmpr_default_intr_handler(void *usr_data)
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{
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ana_cmpr_handle_t cmpr_handle = (ana_cmpr_handle_t)usr_data;
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bool need_yield = false;
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- ana_cmpr_cross_event_data_t evt_data;
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+ ana_cmpr_cross_event_data_t evt_data = {.cross_type = ANA_CMPR_CROSS_ANY};
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/* Get and clear the interrupt status */
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uint32_t status = analog_cmpr_ll_get_intr_status(cmpr_handle->dev);
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analog_cmpr_ll_clear_intr(cmpr_handle->dev, status);
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/* Call the user callback function if it is specified and the corresponding event triggers*/
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if (cmpr_handle->cbs.on_cross && (status & cmpr_handle->intr_mask)) {
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-#if SOC_ANA_CMPR_SUPPORT_MULTI_INTR
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+#if SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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if (status & ANALOG_CMPR_LL_POS_CROSS_MASK(cmpr_handle->unit)) {
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evt_data.cross_type = ANA_CMPR_CROSS_POS;
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} else if (status & ANALOG_CMPR_LL_NEG_CROSS_MASK(cmpr_handle->unit)) {
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evt_data.cross_type = ANA_CMPR_CROSS_NEG;
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}
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-#endif // SOC_ANA_CMPR_SUPPORT_MULTI_INTR
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+#endif // SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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need_yield = cmpr_handle->cbs.on_cross(cmpr_handle, &evt_data, cmpr_handle->user_data);
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}
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if (need_yield) {
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@@ -92,6 +94,22 @@ static void IRAM_ATTR s_ana_cmpr_default_intr_handler(void *usr_data)
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}
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}
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+static esp_err_t s_ana_cmpr_init_gpio(ana_cmpr_handle_t cmpr, bool is_external_ref)
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+{
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+ uint64_t pin_mask = BIT64(ana_cmpr_periph[cmpr->unit].src_gpio);
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+ if (is_external_ref) {
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+ pin_mask |= BIT64(ana_cmpr_periph[cmpr->unit].ext_ref_gpio);
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+ }
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+ gpio_config_t ana_cmpr_gpio_cfg = {
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+ .pin_bit_mask = pin_mask,
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+ .mode = GPIO_MODE_DISABLE,
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+ .pull_up_en = GPIO_PULLUP_DISABLE,
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+ .pull_down_en = GPIO_PULLDOWN_DISABLE,
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+ .intr_type = GPIO_INTR_DISABLE,
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+ };
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+ return gpio_config(&ana_cmpr_gpio_cfg);
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+}
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+
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esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *ret_cmpr)
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{
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#if CONFIG_ANA_CMPR_ENABLE_DEBUG_LOG
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@@ -101,6 +119,7 @@ esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *
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ANA_CMPR_NULL_POINTER_CHECK(ret_cmpr);
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ana_cmpr_unit_t unit = config->unit;
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ANA_CMPR_UNIT_CHECK(unit);
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+ ESP_RETURN_ON_FALSE(config->intr_priority >= 0 && config->intr_priority <= 7, ESP_ERR_INVALID_ARG, TAG, "interrupt priority should be within 0~7");
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ESP_RETURN_ON_FALSE(!s_ana_cmpr[unit], ESP_ERR_INVALID_STATE, TAG,
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"unit has been allocated already");
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esp_err_t ret = ESP_OK;
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@@ -112,6 +131,7 @@ esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *
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/* Assign analog comparator unit */
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s_ana_cmpr[unit]->dev = ANALOG_CMPR_LL_GET_HW(unit);
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s_ana_cmpr[unit]->ref_src = config->ref_src;
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+ s_ana_cmpr[unit]->intr_priority = config->intr_priority;
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s_ana_cmpr[unit]->is_enabled = false;
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s_ana_cmpr[unit]->pm_lock = NULL;
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@@ -123,6 +143,10 @@ esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *
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ESP_GOTO_ON_ERROR(ret, err, TAG, "create NO_LIGHT_SLEEP, lock failed");
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#endif
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+ if (!config->flags.io_loop_back) {
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+ ESP_GOTO_ON_ERROR(s_ana_cmpr_init_gpio(s_ana_cmpr[unit], config->ref_src == ANA_CMPR_REF_SRC_EXTERNAL), err, TAG, "failed to initialize GPIO");
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+ }
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+
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/* Analog clock comes from IO MUX, but IO MUX clock might be shared with other submodules as well */
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ESP_GOTO_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)config->clk_src,
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ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,
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@@ -134,23 +158,19 @@ esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *
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/* Configure the register */
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portENTER_CRITICAL(&s_spinlock);
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analog_cmpr_ll_set_ref_source(s_ana_cmpr[unit]->dev, config->ref_src);
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-#if !SOC_ANA_CMPR_SUPPORT_MULTI_INTR
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+#if !SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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analog_cmpr_ll_set_cross_type(s_ana_cmpr[unit]->dev, config->cross_type);
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-#endif // SOC_ANA_CMPR_SUPPORT_MULTI_INTR
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- portEXIT_CRITICAL(&s_spinlock);
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-
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- /* Allocate the interrupt, currently the interrupt source of Analog Comparator is shared with GPIO interrupt source */
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+#endif // SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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+ /* Record the interrupt mask, the interrupt will be lazy installed when register the callbacks */
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s_ana_cmpr[unit]->intr_mask = analog_cmpr_ll_get_intr_mask_by_type(s_ana_cmpr[unit]->dev, config->cross_type);
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- ESP_GOTO_ON_ERROR(esp_intr_alloc_intrstatus(ana_cmpr_io_map[unit].intr_src, ANA_CMPR_INTR_FLAG, (uint32_t)analog_cmpr_ll_get_intr_status_reg(s_ana_cmpr[unit]->dev),
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- s_ana_cmpr[unit]->intr_mask, s_ana_cmpr_default_intr_handler, s_ana_cmpr[unit], &s_ana_cmpr[unit]->intr_handle),
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- err, TAG, "allocate interrupt failed");
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+ portEXIT_CRITICAL(&s_spinlock);
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if (config->ref_src == ANA_CMPR_REF_SRC_INTERNAL) {
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ESP_LOGD(TAG, "unit %d allocated, source signal: GPIO %d, reference signal: internal",
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- (int)unit, ana_cmpr_io_map[unit].src_gpio);
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+ (int)unit, ana_cmpr_periph[unit].src_gpio);
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} else {
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ESP_LOGD(TAG, "unit %d allocated, source signal: GPIO %d, reference signal: GPIO %d",
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- (int)unit, ana_cmpr_io_map[unit].src_gpio, ana_cmpr_io_map[unit].ext_ref_gpio);
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+ (int)unit, ana_cmpr_periph[unit].src_gpio, ana_cmpr_periph[unit].ext_ref_gpio);
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}
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*ret_cmpr = s_ana_cmpr[unit];
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@@ -230,12 +250,19 @@ esp_err_t ana_cmpr_set_debounce(ana_cmpr_handle_t cmpr, const ana_cmpr_debounce_
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esp_err_t ana_cmpr_set_cross_type(ana_cmpr_handle_t cmpr, ana_cmpr_cross_type_t cross_type)
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{
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+#if SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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+ /* Not support to set the cross type after initialized, because it relies on the interrupt types to distinguish the edge,
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+ * i.e. have to re-allocate the interrupt to change the cross type */
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+ (void)cmpr;
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+ (void)cross_type;
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+ return ESP_ERR_NOT_SUPPORTED;
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+#else
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ANA_CMPR_NULL_POINTER_CHECK_ISR(cmpr);
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ESP_RETURN_ON_FALSE_ISR(cross_type >= ANA_CMPR_CROSS_DISABLE && cross_type <= ANA_CMPR_CROSS_ANY,
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ESP_ERR_INVALID_ARG, TAG, "invalid cross type");
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portENTER_CRITICAL_SAFE(&s_spinlock);
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-#if !SOC_ANA_CMPR_SUPPORT_MULTI_INTR
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+#if !SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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analog_cmpr_ll_set_cross_type(cmpr->dev, cross_type);
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#endif
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cmpr->intr_mask = analog_cmpr_ll_get_intr_mask_by_type(cmpr->dev, cross_type);
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@@ -244,6 +271,7 @@ esp_err_t ana_cmpr_set_cross_type(ana_cmpr_handle_t cmpr, ana_cmpr_cross_type_t
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ESP_EARLY_LOGD(TAG, "unit %d cross type updated to %d", (int)cmpr->unit, cross_type);
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return ESP_OK;
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+#endif
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}
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esp_err_t ana_cmpr_register_event_callbacks(ana_cmpr_handle_t cmpr, const ana_cmpr_event_callbacks_t *cbs, void *user_data)
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@@ -263,6 +291,16 @@ esp_err_t ana_cmpr_register_event_callbacks(ana_cmpr_handle_t cmpr, const ana_cm
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}
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#endif
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+ /* Allocate the interrupt, the interrupt source of Analog Comparator is shared with GPIO interrupt source on ESP32H2 */
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+ if (!cmpr->intr_handle) {
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+ int intr_flags = ANA_CMPR_INTR_FLAG | (cmpr->intr_priority ? BIT(cmpr->intr_priority) : ESP_INTR_FLAG_LOWMED);
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+#if SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO
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+ intr_flags |= ESP_INTR_FLAG_SHARED;
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+#endif // SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO
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+ ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(ana_cmpr_periph[cmpr->unit].intr_src, intr_flags, (uint32_t)analog_cmpr_ll_get_intr_status_reg(cmpr->dev),
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+ cmpr->intr_mask, s_ana_cmpr_default_intr_handler, cmpr, &cmpr->intr_handle), TAG, "allocate interrupt failed");
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+ }
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+
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/* Save the callback group */
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memcpy(&(cmpr->cbs), cbs, sizeof(ana_cmpr_event_callbacks_t));
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cmpr->user_data = user_data;
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@@ -327,10 +365,10 @@ esp_err_t ana_cmpr_get_gpio(ana_cmpr_unit_t unit, ana_cmpr_channel_type_t chan_t
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/* Get the gpio number according to the channel type */
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switch (chan_type) {
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case ANA_CMPR_SOURCE_CHAN:
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- *gpio_num = ana_cmpr_io_map[unit].src_gpio;
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+ *gpio_num = ana_cmpr_periph[unit].src_gpio;
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break;
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case ANA_CMPR_EXT_REF_CHAN:
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- *gpio_num = ana_cmpr_io_map[unit].ext_ref_gpio;
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+ *gpio_num = ana_cmpr_periph[unit].ext_ref_gpio;
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break;
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default:
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ESP_LOGE(TAG, "invalid channel type");
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@@ -339,3 +377,11 @@ esp_err_t ana_cmpr_get_gpio(ana_cmpr_unit_t unit, ana_cmpr_channel_type_t chan_t
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return ESP_OK;
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}
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+
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+ana_cmpr_unit_t ana_cmpr_priv_get_unit_by_handle(ana_cmpr_handle_t cmpr)
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+{
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+ if (!cmpr) {
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+ return -1;
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+ }
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+ return cmpr->unit;
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+}
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