bt.c 48 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/xtensa_api.h"
  25. #include "freertos/portmacro.h"
  26. #include "xtensa/core-macros.h"
  27. #include "esp_types.h"
  28. #include "esp_system.h"
  29. #include "esp_task.h"
  30. #include "esp_intr_alloc.h"
  31. #include "esp_attr.h"
  32. #include "esp_phy_init.h"
  33. #include "esp_bt.h"
  34. #include "esp_err.h"
  35. #include "esp_log.h"
  36. #include "esp_pm.h"
  37. #include "esp_ipc.h"
  38. #include "driver/periph_ctrl.h"
  39. #include "soc/rtc.h"
  40. #include "soc/soc_memory_layout.h"
  41. #include "esp32/clk.h"
  42. #include "esp_coexist_internal.h"
  43. #if CONFIG_BT_ENABLED
  44. /* Macro definition
  45. ************************************************************************
  46. */
  47. #define BTDM_LOG_TAG "BTDM_INIT"
  48. #define BTDM_INIT_PERIOD (5000) /* ms */
  49. /* Bluetooth system and controller config */
  50. #define BTDM_CFG_BT_DATA_RELEASE (1<<0)
  51. #define BTDM_CFG_HCI_UART (1<<1)
  52. #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
  53. #define BTDM_CFG_SCAN_DUPLICATE_OPTIONS (1<<3)
  54. #define BTDM_CFG_SEND_ADV_RESERVED_SIZE (1<<4)
  55. #define BTDM_CFG_BLE_FULL_SCAN_SUPPORTED (1<<5)
  56. /* Sleep mode */
  57. #define BTDM_MODEM_SLEEP_MODE_NONE (0)
  58. #define BTDM_MODEM_SLEEP_MODE_ORIG (1)
  59. #define BTDM_MODEM_SLEEP_MODE_EVED (2) // sleep mode for BLE controller, used only for internal test.
  60. /* Low Power Clock Selection */
  61. #define BTDM_LPCLK_SEL_XTAL (0)
  62. #define BTDM_LPCLK_SEL_XTAL32K (1)
  63. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  64. #define BTDM_LPCLK_SEL_8M (3)
  65. /* Sleep and wakeup interval control */
  66. #define BTDM_MIN_SLEEP_DURATION (12) // threshold of interval in slots to allow to fall into modem sleep
  67. #define BTDM_MODEM_WAKE_UP_DELAY (4) // delay in slots of modem wake up procedure, including re-enable PHY/RF
  68. #ifdef CONFIG_PM_ENABLE
  69. #ifndef CONFIG_BTDM_LPCLK_SEL_MAIN_XTAL
  70. #define BTDM_ALLOW_LIGHT_SLEEP 1
  71. #else
  72. #define BTDM_ALLOW_LIGHT_SLEEP 0
  73. #endif
  74. #endif
  75. #define BT_DEBUG(...)
  76. #define BT_API_CALL_CHECK(info, api_call, ret) \
  77. do{\
  78. esp_err_t __err = (api_call);\
  79. if ((ret) != __err) {\
  80. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  81. return __err;\
  82. }\
  83. } while(0)
  84. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  85. #define OSI_VERSION 0x00010001
  86. #define OSI_MAGIC_VALUE 0xFADEBEAD
  87. /* SPIRAM Configuration */
  88. #if CONFIG_SPIRAM_USE_MALLOC
  89. #define BTDM_MAX_QUEUE_NUM (5)
  90. #endif
  91. /* Types definition
  92. ************************************************************************
  93. */
  94. /* VHCI function interface */
  95. typedef struct vhci_host_callback {
  96. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  97. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  98. } vhci_host_callback_t;
  99. /* Dram region */
  100. typedef struct {
  101. esp_bt_mode_t mode;
  102. intptr_t start;
  103. intptr_t end;
  104. } btdm_dram_available_region_t;
  105. /* PSRAM configuration */
  106. #if CONFIG_SPIRAM_USE_MALLOC
  107. typedef struct {
  108. QueueHandle_t handle;
  109. void *storage;
  110. void *buffer;
  111. } btdm_queue_item_t;
  112. #endif
  113. /* OSI function */
  114. struct osi_funcs_t {
  115. uint32_t _version;
  116. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  117. void (*_ints_on)(unsigned int mask);
  118. void (*_interrupt_disable)(void);
  119. void (*_interrupt_restore)(void);
  120. void (*_task_yield)(void);
  121. void (*_task_yield_from_isr)(void);
  122. void *(*_semphr_create)(uint32_t max, uint32_t init);
  123. void (*_semphr_delete)(void *semphr);
  124. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  125. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  126. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  127. int32_t (*_semphr_give)(void *semphr);
  128. void *(*_mutex_create)(void);
  129. void (*_mutex_delete)(void *mutex);
  130. int32_t (*_mutex_lock)(void *mutex);
  131. int32_t (*_mutex_unlock)(void *mutex);
  132. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  133. void (* _queue_delete)(void *queue);
  134. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  135. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  136. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  137. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  138. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  139. void (* _task_delete)(void *task_handle);
  140. bool (* _is_in_isr)(void);
  141. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  142. void *(* _malloc)(uint32_t size);
  143. void *(* _malloc_internal)(uint32_t size);
  144. void (* _free)(void *p);
  145. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  146. void (* _srand)(unsigned int seed);
  147. int (* _rand)(void);
  148. uint32_t (* _btdm_lpcycles_2_us)(uint32_t cycles);
  149. uint32_t (* _btdm_us_2_lpcycles)(uint32_t us);
  150. bool (* _btdm_sleep_check_duration)(uint32_t *slot_cnt);
  151. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  152. void (* _btdm_sleep_enter_phase2)(void);
  153. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  154. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  155. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  156. int (* _coex_bt_request)(uint32_t event, uint32_t latency, uint32_t duration);
  157. int (* _coex_bt_release)(uint32_t event);
  158. int (* _coex_register_bt_cb)(coex_func_cb_t cb);
  159. uint32_t (* _coex_bb_reset_lock)(void);
  160. void (* _coex_bb_reset_unlock)(uint32_t restore);
  161. uint32_t _magic;
  162. };
  163. /* External functions or values
  164. ************************************************************************
  165. */
  166. /* not for user call, so don't put to include file */
  167. /* OSI */
  168. extern int btdm_osi_funcs_register(void *osi_funcs);
  169. /* Initialise and De-initialise */
  170. extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
  171. extern void btdm_controller_deinit(void);
  172. extern int btdm_controller_enable(esp_bt_mode_t mode);
  173. extern void btdm_controller_disable(void);
  174. extern uint8_t btdm_controller_get_mode(void);
  175. extern const char *btdm_controller_get_compile_version(void);
  176. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  177. /* Sleep */
  178. extern void btdm_controller_enable_sleep(bool enable);
  179. extern void btdm_controller_set_sleep_mode(uint8_t mode);
  180. extern uint8_t btdm_controller_get_sleep_mode(void);
  181. extern bool btdm_power_state_active(void);
  182. extern void btdm_wakeup_request(bool request_lock);
  183. extern void btdm_wakeup_request_end(void);
  184. /* Low Power Clock */
  185. extern bool btdm_lpclk_select_src(uint32_t sel);
  186. extern bool btdm_lpclk_set_div(uint32_t div);
  187. /* VHCI */
  188. extern bool API_vhci_host_check_send_available(void);
  189. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  190. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  191. /* TX power */
  192. extern int ble_txpwr_set(int power_type, int power_level);
  193. extern int ble_txpwr_get(int power_type);
  194. extern int bredr_txpwr_set(int min_power_level, int max_power_level);
  195. extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
  196. extern void bredr_sco_datapath_set(uint8_t data_path);
  197. extern void btdm_controller_scan_duplicate_list_clear(void);
  198. /* Coexistence */
  199. extern int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
  200. extern int coex_bt_release_wrapper(uint32_t event);
  201. extern int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
  202. extern uint32_t coex_bb_reset_lock_wrapper(void);
  203. extern void coex_bb_reset_unlock_wrapper(uint32_t restore);
  204. extern void coex_ble_adv_priority_high_set(bool high);
  205. extern char _bss_start_btdm;
  206. extern char _bss_end_btdm;
  207. extern char _data_start_btdm;
  208. extern char _data_end_btdm;
  209. extern uint32_t _data_start_btdm_rom;
  210. extern uint32_t _data_end_btdm_rom;
  211. extern uint32_t _bt_bss_start;
  212. extern uint32_t _bt_bss_end;
  213. extern uint32_t _nimble_bss_start;
  214. extern uint32_t _nimble_bss_end;
  215. extern uint32_t _btdm_bss_start;
  216. extern uint32_t _btdm_bss_end;
  217. extern uint32_t _bt_data_start;
  218. extern uint32_t _bt_data_end;
  219. extern uint32_t _nimble_data_start;
  220. extern uint32_t _nimble_data_end;
  221. extern uint32_t _btdm_data_start;
  222. extern uint32_t _btdm_data_end;
  223. /* Local Function Declare
  224. *********************************************************************
  225. */
  226. #if CONFIG_SPIRAM_USE_MALLOC
  227. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
  228. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
  229. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  230. static void IRAM_ATTR interrupt_disable(void);
  231. static void IRAM_ATTR interrupt_restore(void);
  232. static void IRAM_ATTR task_yield_from_isr(void);
  233. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  234. static void semphr_delete_wrapper(void *semphr);
  235. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  236. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  237. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  238. static int32_t semphr_give_wrapper(void *semphr);
  239. static void *mutex_create_wrapper(void);
  240. static void mutex_delete_wrapper(void *mutex);
  241. static int32_t mutex_lock_wrapper(void *mutex);
  242. static int32_t mutex_unlock_wrapper(void *mutex);
  243. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  244. static void queue_delete_wrapper(void *queue);
  245. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  246. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  247. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  248. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  249. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  250. static void task_delete_wrapper(void *task_handle);
  251. static bool IRAM_ATTR is_in_isr_wrapper(void);
  252. static void IRAM_ATTR cause_sw_intr(void *arg);
  253. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
  254. static void *malloc_internal_wrapper(size_t size);
  255. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  256. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  257. static int IRAM_ATTR rand_wrapper(void);
  258. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles);
  259. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us);
  260. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt);
  261. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  262. static void btdm_sleep_enter_phase2_wrapper(void);
  263. static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void);
  264. static void btdm_sleep_exit_phase3_wrapper(void);
  265. /* Local variable definition
  266. ***************************************************************************
  267. */
  268. /* OSI funcs */
  269. static const struct osi_funcs_t osi_funcs_ro = {
  270. ._version = OSI_VERSION,
  271. ._set_isr = xt_set_interrupt_handler,
  272. ._ints_on = xt_ints_on,
  273. ._interrupt_disable = interrupt_disable,
  274. ._interrupt_restore = interrupt_restore,
  275. ._task_yield = vPortYield,
  276. ._task_yield_from_isr = task_yield_from_isr,
  277. ._semphr_create = semphr_create_wrapper,
  278. ._semphr_delete = semphr_delete_wrapper,
  279. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  280. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  281. ._semphr_take = semphr_take_wrapper,
  282. ._semphr_give = semphr_give_wrapper,
  283. ._mutex_create = mutex_create_wrapper,
  284. ._mutex_delete = mutex_delete_wrapper,
  285. ._mutex_lock = mutex_lock_wrapper,
  286. ._mutex_unlock = mutex_unlock_wrapper,
  287. ._queue_create = queue_create_wrapper,
  288. ._queue_delete = queue_delete_wrapper,
  289. ._queue_send = queue_send_wrapper,
  290. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  291. ._queue_recv = queue_recv_wrapper,
  292. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  293. ._task_create = task_create_wrapper,
  294. ._task_delete = task_delete_wrapper,
  295. ._is_in_isr = is_in_isr_wrapper,
  296. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  297. ._malloc = malloc,
  298. ._malloc_internal = malloc_internal_wrapper,
  299. ._free = free,
  300. ._read_efuse_mac = read_mac_wrapper,
  301. ._srand = srand_wrapper,
  302. ._rand = rand_wrapper,
  303. ._btdm_lpcycles_2_us = btdm_lpcycles_2_us,
  304. ._btdm_us_2_lpcycles = btdm_us_2_lpcycles,
  305. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  306. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  307. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  308. ._btdm_sleep_exit_phase1 = btdm_sleep_exit_phase1_wrapper,
  309. ._btdm_sleep_exit_phase2 = NULL,
  310. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  311. ._coex_bt_request = coex_bt_request_wrapper,
  312. ._coex_bt_release = coex_bt_release_wrapper,
  313. ._coex_register_bt_cb = coex_register_bt_cb_wrapper,
  314. ._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
  315. ._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
  316. ._magic = OSI_MAGIC_VALUE,
  317. };
  318. /* the mode column will be modified by release function to indicate the available region */
  319. static btdm_dram_available_region_t btdm_dram_available_region[] = {
  320. //following is .data
  321. {ESP_BT_MODE_BTDM, SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END },
  322. //following is memory which HW will use
  323. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM0_START, SOC_MEM_BT_EM_BTDM0_END },
  324. {ESP_BT_MODE_BLE, SOC_MEM_BT_EM_BLE_START, SOC_MEM_BT_EM_BLE_END },
  325. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM1_START, SOC_MEM_BT_EM_BTDM1_END },
  326. {ESP_BT_MODE_CLASSIC_BT, SOC_MEM_BT_EM_BREDR_START, SOC_MEM_BT_EM_BREDR_REAL_END},
  327. //following is .bss
  328. {ESP_BT_MODE_BTDM, SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END },
  329. {ESP_BT_MODE_BTDM, SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END },
  330. };
  331. /* Reserve the full memory region used by Bluetooth Controller,
  332. * some may be released later at runtime. */
  333. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_EM_START, SOC_MEM_BT_EM_BREDR_REAL_END, rom_bt_em);
  334. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END, rom_bt_bss);
  335. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END, rom_bt_misc);
  336. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END, rom_bt_data);
  337. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  338. #if CONFIG_SPIRAM_USE_MALLOC
  339. static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
  340. static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
  341. #endif /* #if CONFIG_SPIRAM_USE_MALLOC */
  342. /* Static variable declare */
  343. // timestamp when PHY/RF was switched on
  344. static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
  345. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  346. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  347. // measured average low power clock period in micro seconds
  348. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  349. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
  350. #ifdef CONFIG_PM_ENABLE
  351. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  352. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  353. static DRAM_ATTR QueueHandle_t s_pm_lock_sem = NULL;
  354. #if !BTDM_ALLOW_LIGHT_SLEEP
  355. // pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
  356. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  357. #endif /* #if !BTDM_ALLOW_LIGHT_SLEEP */
  358. static void btdm_slp_tmr_callback(void *arg);
  359. #endif
  360. static inline void btdm_check_and_init_bb(void)
  361. {
  362. /* init BT-BB if PHY/RF has been switched off since last BT-BB init */
  363. int64_t latest_ts = esp_phy_rf_get_on_ts();
  364. if (latest_ts != s_time_phy_rf_just_enabled ||
  365. s_time_phy_rf_just_enabled == 0) {
  366. btdm_rf_bb_init_phase2();
  367. s_time_phy_rf_just_enabled = latest_ts;
  368. }
  369. }
  370. #if CONFIG_SPIRAM_USE_MALLOC
  371. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
  372. {
  373. if (!btdm_queue_table_mux || !queue) {
  374. return NULL;
  375. }
  376. bool ret = false;
  377. btdm_queue_item_t *item;
  378. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  379. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  380. item = &btdm_queue_table[i];
  381. if (item->handle == NULL) {
  382. memcpy(item, queue, sizeof(btdm_queue_item_t));
  383. ret = true;
  384. break;
  385. }
  386. }
  387. xSemaphoreGive(btdm_queue_table_mux);
  388. return ret;
  389. }
  390. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
  391. {
  392. if (!btdm_queue_table_mux || !queue) {
  393. return false;
  394. }
  395. bool ret = false;
  396. btdm_queue_item_t *item;
  397. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  398. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  399. item = &btdm_queue_table[i];
  400. if (item->handle == queue->handle) {
  401. memcpy(queue, item, sizeof(btdm_queue_item_t));
  402. memset(item, 0, sizeof(btdm_queue_item_t));
  403. ret = true;
  404. break;
  405. }
  406. }
  407. xSemaphoreGive(btdm_queue_table_mux);
  408. return ret;
  409. }
  410. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  411. static void IRAM_ATTR interrupt_disable(void)
  412. {
  413. if (xPortInIsrContext()) {
  414. portENTER_CRITICAL_ISR(&global_int_mux);
  415. } else {
  416. portENTER_CRITICAL(&global_int_mux);
  417. }
  418. }
  419. static void IRAM_ATTR interrupt_restore(void)
  420. {
  421. if (xPortInIsrContext()) {
  422. portEXIT_CRITICAL_ISR(&global_int_mux);
  423. } else {
  424. portEXIT_CRITICAL(&global_int_mux);
  425. }
  426. }
  427. static void IRAM_ATTR task_yield_from_isr(void)
  428. {
  429. portYIELD_FROM_ISR();
  430. }
  431. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  432. {
  433. #if !CONFIG_SPIRAM_USE_MALLOC
  434. return (void *)xSemaphoreCreateCounting(max, init);
  435. #else
  436. StaticQueue_t *queue_buffer = NULL;
  437. QueueHandle_t handle = NULL;
  438. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  439. if (!queue_buffer) {
  440. goto error;
  441. }
  442. handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
  443. if (!handle) {
  444. goto error;
  445. }
  446. btdm_queue_item_t item = {
  447. .handle = handle,
  448. .storage = NULL,
  449. .buffer = queue_buffer,
  450. };
  451. if (!btdm_queue_generic_register(&item)) {
  452. goto error;
  453. }
  454. return handle;
  455. error:
  456. if (handle) {
  457. vSemaphoreDelete(handle);
  458. }
  459. if (queue_buffer) {
  460. free(queue_buffer);
  461. }
  462. return NULL;
  463. #endif
  464. }
  465. static void semphr_delete_wrapper(void *semphr)
  466. {
  467. #if !CONFIG_SPIRAM_USE_MALLOC
  468. vSemaphoreDelete(semphr);
  469. #else
  470. btdm_queue_item_t item = {
  471. .handle = semphr,
  472. .storage = NULL,
  473. .buffer = NULL,
  474. };
  475. if (btdm_queue_generic_deregister(&item)) {
  476. vSemaphoreDelete(item.handle);
  477. free(item.buffer);
  478. }
  479. return;
  480. #endif
  481. }
  482. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  483. {
  484. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  485. }
  486. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  487. {
  488. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  489. }
  490. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  491. {
  492. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  493. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  494. } else {
  495. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  496. }
  497. }
  498. static int32_t semphr_give_wrapper(void *semphr)
  499. {
  500. return (int32_t)xSemaphoreGive(semphr);
  501. }
  502. static void *mutex_create_wrapper(void)
  503. {
  504. #if CONFIG_SPIRAM_USE_MALLOC
  505. StaticQueue_t *queue_buffer = NULL;
  506. QueueHandle_t handle = NULL;
  507. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  508. if (!queue_buffer) {
  509. goto error;
  510. }
  511. handle = xSemaphoreCreateMutexStatic(queue_buffer);
  512. if (!handle) {
  513. goto error;
  514. }
  515. btdm_queue_item_t item = {
  516. .handle = handle,
  517. .storage = NULL,
  518. .buffer = queue_buffer,
  519. };
  520. if (!btdm_queue_generic_register(&item)) {
  521. goto error;
  522. }
  523. return handle;
  524. error:
  525. if (handle) {
  526. vSemaphoreDelete(handle);
  527. }
  528. if (queue_buffer) {
  529. free(queue_buffer);
  530. }
  531. return NULL;
  532. #else
  533. return (void *)xSemaphoreCreateMutex();
  534. #endif
  535. }
  536. static void mutex_delete_wrapper(void *mutex)
  537. {
  538. #if !CONFIG_SPIRAM_USE_MALLOC
  539. vSemaphoreDelete(mutex);
  540. #else
  541. btdm_queue_item_t item = {
  542. .handle = mutex,
  543. .storage = NULL,
  544. .buffer = NULL,
  545. };
  546. if (btdm_queue_generic_deregister(&item)) {
  547. vSemaphoreDelete(item.handle);
  548. free(item.buffer);
  549. }
  550. return;
  551. #endif
  552. }
  553. static int32_t mutex_lock_wrapper(void *mutex)
  554. {
  555. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  556. }
  557. static int32_t mutex_unlock_wrapper(void *mutex)
  558. {
  559. return (int32_t)xSemaphoreGive(mutex);
  560. }
  561. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  562. {
  563. #if CONFIG_SPIRAM_USE_MALLOC
  564. StaticQueue_t *queue_buffer = NULL;
  565. uint8_t *queue_storage = NULL;
  566. QueueHandle_t handle = NULL;
  567. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  568. if (!queue_buffer) {
  569. goto error;
  570. }
  571. queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  572. if (!queue_storage ) {
  573. goto error;
  574. }
  575. handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
  576. if (!handle) {
  577. goto error;
  578. }
  579. btdm_queue_item_t item = {
  580. .handle = handle,
  581. .storage = queue_storage,
  582. .buffer = queue_buffer,
  583. };
  584. if (!btdm_queue_generic_register(&item)) {
  585. goto error;
  586. }
  587. return handle;
  588. error:
  589. if (handle) {
  590. vQueueDelete(handle);
  591. }
  592. if (queue_storage) {
  593. free(queue_storage);
  594. }
  595. if (queue_buffer) {
  596. free(queue_buffer);
  597. }
  598. return NULL;
  599. #else
  600. return (void *)xQueueCreate(queue_len, item_size);
  601. #endif
  602. }
  603. static void queue_delete_wrapper(void *queue)
  604. {
  605. #if !CONFIG_SPIRAM_USE_MALLOC
  606. vQueueDelete(queue);
  607. #else
  608. btdm_queue_item_t item = {
  609. .handle = queue,
  610. .storage = NULL,
  611. .buffer = NULL,
  612. };
  613. if (btdm_queue_generic_deregister(&item)) {
  614. vQueueDelete(item.handle);
  615. free(item.storage);
  616. free(item.buffer);
  617. }
  618. return;
  619. #endif
  620. }
  621. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  622. {
  623. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  624. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  625. } else {
  626. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  627. }
  628. }
  629. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  630. {
  631. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  632. }
  633. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  634. {
  635. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  636. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  637. } else {
  638. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  639. }
  640. }
  641. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  642. {
  643. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  644. }
  645. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  646. {
  647. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  648. }
  649. static void task_delete_wrapper(void *task_handle)
  650. {
  651. vTaskDelete(task_handle);
  652. }
  653. static bool IRAM_ATTR is_in_isr_wrapper(void)
  654. {
  655. return !xPortCanYield();
  656. }
  657. static void IRAM_ATTR cause_sw_intr(void *arg)
  658. {
  659. /* just convert void * to int, because the width is the same */
  660. uint32_t intr_no = (uint32_t)arg;
  661. XTHAL_SET_INTSET((1<<intr_no));
  662. }
  663. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  664. {
  665. esp_err_t err = ESP_OK;
  666. if (xPortGetCoreID() == core_id) {
  667. cause_sw_intr((void *)intr_no);
  668. } else {
  669. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  670. }
  671. return err;
  672. }
  673. static void *malloc_internal_wrapper(size_t size)
  674. {
  675. return heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL);
  676. }
  677. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  678. {
  679. return esp_read_mac(mac, ESP_MAC_BT);
  680. }
  681. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  682. {
  683. /* empty function */
  684. }
  685. static int IRAM_ATTR rand_wrapper(void)
  686. {
  687. return (int)esp_random();
  688. }
  689. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles)
  690. {
  691. // The number of lp cycles should not lead to overflow. Thrs: 100s
  692. // clock measurement is conducted
  693. uint64_t us = (uint64_t)btdm_lpcycle_us * cycles;
  694. us = (us + (1 << (btdm_lpcycle_us_frac - 1))) >> btdm_lpcycle_us_frac;
  695. return (uint32_t)us;
  696. }
  697. /*
  698. * @brief Converts a duration in slots into a number of low power clock cycles.
  699. */
  700. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us)
  701. {
  702. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  703. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  704. // clock measurement is conducted
  705. uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  706. return (uint32_t)cycles;
  707. }
  708. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt)
  709. {
  710. if (*slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  711. return false;
  712. }
  713. /* wake up in advance considering the delay in enabling PHY/RF */
  714. *slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  715. return true;
  716. }
  717. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  718. {
  719. #ifdef CONFIG_PM_ENABLE
  720. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  721. uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
  722. #define BTDM_MIN_TIMER_UNCERTAINTY_US (500)
  723. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  724. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  725. // and set the timer in advance
  726. uint32_t uncertainty = (us_to_sleep >> 11);
  727. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  728. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  729. }
  730. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
  731. ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
  732. }
  733. #endif
  734. }
  735. static void btdm_sleep_enter_phase2_wrapper(void)
  736. {
  737. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  738. esp_modem_sleep_enter(MODEM_BLE_MODULE);
  739. esp_modem_sleep_enter(MODEM_CLASSIC_BT_MODULE);
  740. #ifdef CONFIG_PM_ENABLE
  741. esp_pm_lock_release(s_pm_lock);
  742. semphr_give_wrapper(s_pm_lock_sem);
  743. #endif
  744. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  745. esp_modem_sleep_enter(MODEM_BLE_MODULE);
  746. // pause bluetooth baseband
  747. periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
  748. }
  749. }
  750. static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void)
  751. {
  752. #ifdef CONFIG_PM_ENABLE
  753. if (semphr_take_from_isr_wrapper(s_pm_lock_sem, NULL) == pdTRUE) {
  754. esp_pm_lock_acquire(s_pm_lock);
  755. }
  756. #endif
  757. }
  758. static void btdm_sleep_exit_phase3_wrapper(void)
  759. {
  760. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  761. esp_modem_sleep_exit(MODEM_BLE_MODULE);
  762. esp_modem_sleep_exit(MODEM_CLASSIC_BT_MODULE);
  763. btdm_check_and_init_bb();
  764. #ifdef CONFIG_PM_ENABLE
  765. esp_timer_stop(s_btdm_slp_tmr);
  766. #endif
  767. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  768. // resume bluetooth baseband
  769. periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
  770. esp_modem_sleep_exit(MODEM_BLE_MODULE);
  771. }
  772. }
  773. #ifdef CONFIG_PM_ENABLE
  774. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  775. {
  776. if (semphr_take_wrapper(s_pm_lock_sem, 0) == pdTRUE) {
  777. esp_pm_lock_acquire(s_pm_lock);
  778. }
  779. }
  780. #endif
  781. bool esp_vhci_host_check_send_available(void)
  782. {
  783. return API_vhci_host_check_send_available();
  784. }
  785. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  786. {
  787. bool do_wakeup_request = false;
  788. if (!btdm_power_state_active()) {
  789. #if CONFIG_PM_ENABLE
  790. if (semphr_take_wrapper(s_pm_lock_sem, 0)) {
  791. esp_pm_lock_acquire(s_pm_lock);
  792. }
  793. esp_timer_stop(s_btdm_slp_tmr);
  794. #endif
  795. do_wakeup_request = true;
  796. btdm_wakeup_request(true);
  797. }
  798. API_vhci_host_send_packet(data, len);
  799. if (do_wakeup_request) {
  800. btdm_wakeup_request_end();
  801. }
  802. }
  803. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  804. {
  805. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  806. }
  807. static uint32_t btdm_config_mask_load(void)
  808. {
  809. uint32_t mask = 0x0;
  810. #if CONFIG_BTDM_CTRL_HCI_MODE_UART_H4
  811. mask |= BTDM_CFG_HCI_UART;
  812. #endif
  813. #if CONFIG_BTDM_CTRL_PINNED_TO_CORE == 1
  814. mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
  815. #endif
  816. #if CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED
  817. mask |= BTDM_CFG_BLE_FULL_SCAN_SUPPORTED;
  818. #endif /* CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED */
  819. mask |= BTDM_CFG_SCAN_DUPLICATE_OPTIONS;
  820. mask |= BTDM_CFG_SEND_ADV_RESERVED_SIZE;
  821. return mask;
  822. }
  823. static void btdm_controller_mem_init(void)
  824. {
  825. /* initialise .data section */
  826. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  827. ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
  828. //initial em, .bss section
  829. for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  830. if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
  831. memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
  832. ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
  833. }
  834. }
  835. }
  836. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  837. {
  838. int ret = heap_caps_add_region(start, end);
  839. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  840. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  841. * we replace it by ESP_OK
  842. */
  843. if (ret == ESP_ERR_INVALID_SIZE) {
  844. return ESP_OK;
  845. }
  846. return ret;
  847. }
  848. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  849. {
  850. bool update = true;
  851. intptr_t mem_start, mem_end;
  852. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  853. return ESP_ERR_INVALID_STATE;
  854. }
  855. //already released
  856. if (!(mode & btdm_dram_available_region[0].mode)) {
  857. return ESP_ERR_INVALID_STATE;
  858. }
  859. for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  860. //skip the share mode, idle mode and other mode
  861. if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
  862. || (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
  863. //clear the bit of the mode which will be released
  864. btdm_dram_available_region[i].mode &= ~mode;
  865. continue;
  866. } else {
  867. //clear the bit of the mode which will be released
  868. btdm_dram_available_region[i].mode &= ~mode;
  869. }
  870. if (update) {
  871. mem_start = btdm_dram_available_region[i].start;
  872. mem_end = btdm_dram_available_region[i].end;
  873. update = false;
  874. }
  875. if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
  876. mem_end = btdm_dram_available_region[i].end;
  877. if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
  878. && (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
  879. && mem_end == btdm_dram_available_region[i+1].start) {
  880. continue;
  881. } else {
  882. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  883. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  884. update = true;
  885. }
  886. } else {
  887. mem_end = btdm_dram_available_region[i].end;
  888. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  889. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  890. update = true;
  891. }
  892. }
  893. if (mode == ESP_BT_MODE_BTDM) {
  894. mem_start = (intptr_t)&_btdm_bss_start;
  895. mem_end = (intptr_t)&_btdm_bss_end;
  896. if (mem_start != mem_end) {
  897. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  898. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  899. }
  900. mem_start = (intptr_t)&_btdm_data_start;
  901. mem_end = (intptr_t)&_btdm_data_end;
  902. if (mem_start != mem_end) {
  903. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  904. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  905. }
  906. }
  907. return ESP_OK;
  908. }
  909. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  910. {
  911. int ret;
  912. intptr_t mem_start, mem_end;
  913. ret = esp_bt_controller_mem_release(mode);
  914. if (ret != ESP_OK) {
  915. return ret;
  916. }
  917. if (mode == ESP_BT_MODE_BTDM) {
  918. mem_start = (intptr_t)&_bt_bss_start;
  919. mem_end = (intptr_t)&_bt_bss_end;
  920. if (mem_start != mem_end) {
  921. ESP_LOGD(BTDM_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  922. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  923. }
  924. mem_start = (intptr_t)&_bt_data_start;
  925. mem_end = (intptr_t)&_bt_data_end;
  926. if (mem_start != mem_end) {
  927. ESP_LOGD(BTDM_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  928. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  929. }
  930. mem_start = (intptr_t)&_nimble_bss_start;
  931. mem_end = (intptr_t)&_nimble_bss_end;
  932. if (mem_start != mem_end) {
  933. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  934. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  935. }
  936. mem_start = (intptr_t)&_nimble_data_start;
  937. mem_end = (intptr_t)&_nimble_data_end;
  938. if (mem_start != mem_end) {
  939. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  940. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  941. }
  942. }
  943. return ESP_OK;
  944. }
  945. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  946. {
  947. esp_err_t err;
  948. uint32_t btdm_cfg_mask = 0;
  949. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  950. if (osi_funcs_p == NULL) {
  951. return ESP_ERR_NO_MEM;
  952. }
  953. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  954. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  955. return ESP_ERR_INVALID_ARG;
  956. }
  957. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  958. return ESP_ERR_INVALID_STATE;
  959. }
  960. //if all the bt available memory was already released, cannot initialize bluetooth controller
  961. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
  962. return ESP_ERR_INVALID_STATE;
  963. }
  964. if (cfg == NULL) {
  965. return ESP_ERR_INVALID_ARG;
  966. }
  967. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  968. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  969. return ESP_ERR_INVALID_ARG;
  970. }
  971. //overwrite some parameters
  972. cfg->bt_max_sync_conn = CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF;
  973. cfg->magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL;
  974. if (((cfg->mode & ESP_BT_MODE_BLE) && (cfg->ble_max_conn <= 0 || cfg->ble_max_conn > BTDM_CONTROLLER_BLE_MAX_CONN_LIMIT))
  975. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_acl_conn <= 0 || cfg->bt_max_acl_conn > BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_LIMIT))
  976. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_sync_conn > BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_LIMIT))) {
  977. return ESP_ERR_INVALID_ARG;
  978. }
  979. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  980. #if CONFIG_SPIRAM_USE_MALLOC
  981. btdm_queue_table_mux = xSemaphoreCreateMutex();
  982. if (btdm_queue_table_mux == NULL) {
  983. return ESP_ERR_NO_MEM;
  984. }
  985. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  986. #endif
  987. #ifdef CONFIG_PM_ENABLE
  988. #if !BTDM_ALLOW_LIGHT_SLEEP
  989. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  990. goto error;
  991. }
  992. #endif /* #if !BTDM_ALLOW_LIGHT_SLEEP */
  993. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  994. goto error;
  995. }
  996. esp_timer_create_args_t create_args = {
  997. .callback = btdm_slp_tmr_callback,
  998. .arg = NULL,
  999. .name = "btSlp"
  1000. };
  1001. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1002. goto error;
  1003. }
  1004. s_pm_lock_sem = semphr_create_wrapper(1, 0);
  1005. if (s_pm_lock_sem == NULL) {
  1006. err = ESP_ERR_NO_MEM;
  1007. goto error;
  1008. }
  1009. #endif
  1010. btdm_controller_mem_init();
  1011. periph_module_enable(PERIPH_BT_MODULE);
  1012. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1013. btdm_lpcycle_us = 32 << btdm_lpcycle_us_frac;
  1014. #if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
  1015. bool select_src_ret = false;
  1016. bool set_div_ret = false;
  1017. #if CONFIG_BTDM_LPCLK_SEL_MAIN_XTAL
  1018. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1019. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2 - 1);
  1020. assert(select_src_ret && set_div_ret);
  1021. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1022. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1023. #elif CONFIG_BTDM_LPCLK_SEL_EXT_32K_XTAL
  1024. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1025. set_div_ret = btdm_lpclk_set_div(0);
  1026. assert(select_src_ret && set_div_ret);
  1027. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1028. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1029. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1030. assert(btdm_lpcycle_us != 0);
  1031. #endif // CONFIG_BTDM_LPCLK_SEL_XX
  1032. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
  1033. #elif CONFIG_BTDM_MODEM_SLEEP_MODE_EVED
  1034. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
  1035. #else
  1036. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1037. #endif
  1038. btdm_cfg_mask = btdm_config_mask_load();
  1039. if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
  1040. err = ESP_ERR_NO_MEM;
  1041. goto error;
  1042. }
  1043. #ifdef CONFIG_BTDM_COEX_BLE_ADV_HIGH_PRIORITY
  1044. coex_ble_adv_priority_high_set(true);
  1045. #else
  1046. coex_ble_adv_priority_high_set(false);
  1047. #endif
  1048. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1049. return ESP_OK;
  1050. error:
  1051. #ifdef CONFIG_PM_ENABLE
  1052. #if !BTDM_ALLOW_LIGHT_SLEEP
  1053. if (s_light_sleep_pm_lock != NULL) {
  1054. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1055. s_light_sleep_pm_lock = NULL;
  1056. }
  1057. #endif /* #if !BTDM_ALLOW_LIGHT_SLEEP */
  1058. if (s_pm_lock != NULL) {
  1059. esp_pm_lock_delete(s_pm_lock);
  1060. s_pm_lock = NULL;
  1061. }
  1062. if (s_btdm_slp_tmr != NULL) {
  1063. esp_timer_delete(s_btdm_slp_tmr);
  1064. s_btdm_slp_tmr = NULL;
  1065. }
  1066. if (s_pm_lock_sem) {
  1067. semphr_delete_wrapper(s_pm_lock_sem);
  1068. s_pm_lock_sem = NULL;
  1069. }
  1070. #endif
  1071. return err;
  1072. }
  1073. esp_err_t esp_bt_controller_deinit(void)
  1074. {
  1075. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1076. return ESP_ERR_INVALID_STATE;
  1077. }
  1078. btdm_controller_deinit();
  1079. periph_module_disable(PERIPH_BT_MODULE);
  1080. #ifdef CONFIG_PM_ENABLE
  1081. #if !BTDM_ALLOW_LIGHT_SLEEP
  1082. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1083. s_light_sleep_pm_lock = NULL;
  1084. #endif /* #if !BTDM_ALLOW_LIGHT_SLEEP */
  1085. esp_pm_lock_delete(s_pm_lock);
  1086. s_pm_lock = NULL;
  1087. esp_timer_stop(s_btdm_slp_tmr);
  1088. esp_timer_delete(s_btdm_slp_tmr);
  1089. s_btdm_slp_tmr = NULL;
  1090. semphr_delete_wrapper(s_pm_lock_sem);
  1091. s_pm_lock_sem = NULL;
  1092. #endif
  1093. #if CONFIG_SPIRAM_USE_MALLOC
  1094. vSemaphoreDelete(btdm_queue_table_mux);
  1095. btdm_queue_table_mux = NULL;
  1096. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1097. #endif
  1098. free(osi_funcs_p);
  1099. osi_funcs_p = NULL;
  1100. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1101. btdm_lpcycle_us = 0;
  1102. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1103. return ESP_OK;
  1104. }
  1105. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1106. {
  1107. int ret;
  1108. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1109. return ESP_ERR_INVALID_STATE;
  1110. }
  1111. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1112. if (mode != btdm_controller_get_mode()) {
  1113. return ESP_ERR_INVALID_ARG;
  1114. }
  1115. #ifdef CONFIG_PM_ENABLE
  1116. #if !BTDM_ALLOW_LIGHT_SLEEP
  1117. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1118. #endif /* #if !BTDM_ALLOW_LIGHT_SLEEP */
  1119. esp_pm_lock_acquire(s_pm_lock);
  1120. #endif
  1121. esp_phy_load_cal_and_init(PHY_BT_MODULE);
  1122. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_NONE) {
  1123. //Just register to sleep module, make the modem sleep modules check BT sleep status when sleep enter.
  1124. //Thus, it will prevent WIFI from disabling RF when BT is not in sleep but is using RF.
  1125. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1126. esp_modem_sleep_register(MODEM_CLASSIC_BT_MODULE);
  1127. esp_modem_sleep_exit(MODEM_BLE_MODULE);
  1128. esp_modem_sleep_exit(MODEM_CLASSIC_BT_MODULE);
  1129. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1130. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1131. esp_modem_sleep_register(MODEM_CLASSIC_BT_MODULE);
  1132. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1133. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1134. }
  1135. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1136. btdm_controller_enable_sleep(true);
  1137. }
  1138. // inititalize bluetooth baseband
  1139. btdm_check_and_init_bb();
  1140. ret = btdm_controller_enable(mode);
  1141. if (ret) {
  1142. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_NONE
  1143. || btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1144. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1145. esp_modem_sleep_deregister(MODEM_CLASSIC_BT_MODULE);
  1146. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1147. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1148. }
  1149. esp_phy_rf_deinit(PHY_BT_MODULE);
  1150. #ifdef CONFIG_PM_ENABLE
  1151. #if !BTDM_ALLOW_LIGHT_SLEEP
  1152. esp_pm_lock_release(s_light_sleep_pm_lock);
  1153. #endif /* #if !BTDM_ALLOW_LIGHT_SLEEP */
  1154. esp_pm_lock_release(s_pm_lock);
  1155. #endif
  1156. return ESP_ERR_INVALID_STATE;
  1157. }
  1158. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1159. return ESP_OK;
  1160. }
  1161. esp_err_t esp_bt_controller_disable(void)
  1162. {
  1163. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1164. return ESP_ERR_INVALID_STATE;
  1165. }
  1166. // disable modem sleep and wake up from sleep mode
  1167. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1168. btdm_controller_enable_sleep(false);
  1169. if (!btdm_power_state_active()) {
  1170. btdm_wakeup_request(false);
  1171. }
  1172. while (!btdm_power_state_active()) {
  1173. ets_delay_us(1000);
  1174. }
  1175. }
  1176. btdm_controller_disable();
  1177. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_NONE
  1178. || btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1179. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1180. esp_modem_sleep_deregister(MODEM_CLASSIC_BT_MODULE);
  1181. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1182. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1183. }
  1184. esp_phy_rf_deinit(PHY_BT_MODULE);
  1185. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1186. #ifdef CONFIG_PM_ENABLE
  1187. #if !BTDM_ALLOW_LIGHT_SLEEP
  1188. esp_pm_lock_release(s_light_sleep_pm_lock);
  1189. #endif /* #if !BTDM_ALLOW_LIGHT_SLEEP */
  1190. esp_pm_lock_release(s_pm_lock);
  1191. #endif
  1192. return ESP_OK;
  1193. }
  1194. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1195. {
  1196. return btdm_controller_status;
  1197. }
  1198. /* extra functions */
  1199. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1200. {
  1201. if (ble_txpwr_set(power_type, power_level) != 0) {
  1202. return ESP_ERR_INVALID_ARG;
  1203. }
  1204. return ESP_OK;
  1205. }
  1206. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1207. {
  1208. return (esp_power_level_t)ble_txpwr_get(power_type);
  1209. }
  1210. esp_err_t esp_bredr_tx_power_set(esp_power_level_t min_power_level, esp_power_level_t max_power_level)
  1211. {
  1212. esp_err_t err;
  1213. int ret;
  1214. ret = bredr_txpwr_set(min_power_level, max_power_level);
  1215. if (ret == 0) {
  1216. err = ESP_OK;
  1217. } else if (ret == -1) {
  1218. err = ESP_ERR_INVALID_ARG;
  1219. } else {
  1220. err = ESP_ERR_INVALID_STATE;
  1221. }
  1222. return err;
  1223. }
  1224. esp_err_t esp_bredr_tx_power_get(esp_power_level_t *min_power_level, esp_power_level_t *max_power_level)
  1225. {
  1226. if (bredr_txpwr_get((int *)min_power_level, (int *)max_power_level) != 0) {
  1227. return ESP_ERR_INVALID_ARG;
  1228. }
  1229. return ESP_OK;
  1230. }
  1231. esp_err_t esp_bt_sleep_enable (void)
  1232. {
  1233. esp_err_t status;
  1234. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1235. return ESP_ERR_INVALID_STATE;
  1236. }
  1237. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1238. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1239. esp_modem_sleep_register(MODEM_CLASSIC_BT_MODULE);
  1240. btdm_controller_enable_sleep (true);
  1241. status = ESP_OK;
  1242. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1243. esp_modem_sleep_register(MODEM_BLE_MODULE);
  1244. btdm_controller_enable_sleep (true);
  1245. status = ESP_OK;
  1246. } else {
  1247. status = ESP_ERR_NOT_SUPPORTED;
  1248. }
  1249. return status;
  1250. }
  1251. esp_err_t esp_bt_sleep_disable (void)
  1252. {
  1253. esp_err_t status;
  1254. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1255. return ESP_ERR_INVALID_STATE;
  1256. }
  1257. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1258. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1259. esp_modem_sleep_deregister(MODEM_CLASSIC_BT_MODULE);
  1260. btdm_controller_enable_sleep (false);
  1261. status = ESP_OK;
  1262. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1263. esp_modem_sleep_deregister(MODEM_BLE_MODULE);
  1264. btdm_controller_enable_sleep (false);
  1265. status = ESP_OK;
  1266. } else {
  1267. status = ESP_ERR_NOT_SUPPORTED;
  1268. }
  1269. return status;
  1270. }
  1271. bool esp_bt_controller_is_sleeping(void)
  1272. {
  1273. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1274. btdm_controller_get_sleep_mode() != BTDM_MODEM_SLEEP_MODE_ORIG) {
  1275. return false;
  1276. }
  1277. return !btdm_power_state_active();
  1278. }
  1279. void esp_bt_controller_wakeup_request(void)
  1280. {
  1281. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1282. btdm_controller_get_sleep_mode() != BTDM_MODEM_SLEEP_MODE_ORIG) {
  1283. return;
  1284. }
  1285. btdm_wakeup_request(false);
  1286. }
  1287. esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
  1288. {
  1289. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1290. return ESP_ERR_INVALID_STATE;
  1291. }
  1292. bredr_sco_datapath_set(data_path);
  1293. return ESP_OK;
  1294. }
  1295. esp_err_t esp_ble_scan_dupilcate_list_flush(void)
  1296. {
  1297. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1298. return ESP_ERR_INVALID_STATE;
  1299. }
  1300. btdm_controller_scan_duplicate_list_clear();
  1301. return ESP_OK;
  1302. }
  1303. #endif /* CONFIG_BT_ENABLED */