Kconfig 9.7 KB

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  1. menu "Common ESP-related"
  2. config ESP_TIMER_PROFILING
  3. bool "Enable esp_timer profiling features"
  4. default n
  5. help
  6. If enabled, esp_timer_dump will dump information such as number of times the timer was started, number of
  7. times the timer has triggered, and the total time it took for the callback to run. This option has some
  8. effect on timer performance and the amount of memory used for timer storage, and should only be used for
  9. debugging/testing purposes.
  10. config ESP_ERR_TO_NAME_LOOKUP
  11. bool "Enable lookup of error code strings"
  12. default "y"
  13. help
  14. Functions esp_err_to_name() and esp_err_to_name_r() return string representations of error codes from a
  15. pre-generated lookup table. This option can be used to turn off the use of the look-up table in order to
  16. save memory but this comes at the price of sacrificing distinguishable (meaningful) output string
  17. representations.
  18. config ESP_SYSTEM_EVENT_QUEUE_SIZE
  19. int "System event queue size"
  20. default 32
  21. help
  22. Config system event queue size in different application.
  23. config ESP_SYSTEM_EVENT_TASK_STACK_SIZE
  24. int "Event loop task stack size"
  25. default 2304
  26. help
  27. Config system event task stack size in different application.
  28. config ESP_MAIN_TASK_STACK_SIZE
  29. int "Main task stack size"
  30. default 3584
  31. help
  32. Configure the "main task" stack size. This is the stack of the task
  33. which calls app_main(). If app_main() returns then this task is deleted
  34. and its stack memory is freed.
  35. config ESP_IPC_TASK_STACK_SIZE
  36. int "Inter-Processor Call (IPC) task stack size"
  37. range 512 65536 if !APPTRACE_ENABLE
  38. range 2048 65536 if APPTRACE_ENABLE
  39. default 2048 if APPTRACE_ENABLE
  40. default 1024
  41. help
  42. Configure the IPC tasks stack size. One IPC task runs on each core
  43. (in dual core mode), and allows for cross-core function calls.
  44. See IPC documentation for more details.
  45. The default stack size should be enough for most common use cases.
  46. It can be shrunk if you are sure that you do not use any custom
  47. IPC functionality.
  48. config ESP_IPC_USES_CALLERS_PRIORITY
  49. bool "IPC runs at caller's priority"
  50. default y
  51. depends on !FREERTOS_UNICORE
  52. help
  53. If this option is not enabled then the IPC task will keep behavior
  54. same as prior to that of ESP-IDF v4.0, and hence IPC task will run
  55. at (configMAX_PRIORITIES - 1) priority.
  56. config ESP_TIMER_TASK_STACK_SIZE
  57. int "High-resolution timer task stack size"
  58. default 3584
  59. range 2048 65536
  60. help
  61. Configure the stack size of esp_timer/ets_timer task. This task is used
  62. to dispatch callbacks of timers created using ets_timer and esp_timer
  63. APIs. If you are seing stack overflow errors in timer task, increase
  64. this value.
  65. Note that this is not the same as FreeRTOS timer task. To configure
  66. FreeRTOS timer task size, see "FreeRTOS timer task stack size" option
  67. in "FreeRTOS" menu.
  68. config ESP_MINIMAL_SHARED_STACK_SIZE
  69. int "Minimal allowed size for shared stack"
  70. default 2048
  71. help
  72. Minimal value of size, in bytes, accepted to execute a expression
  73. with shared stack.
  74. choice ESP_CONSOLE_UART
  75. prompt "UART for console output"
  76. default ESP_CONSOLE_UART_DEFAULT
  77. help
  78. Select whether to use UART for console output (through stdout and stderr).
  79. - Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
  80. - If "Custom" is selected, UART0 or UART1 can be chosen,
  81. and any pins can be selected.
  82. - If "None" is selected, there will be no console output on any UART, except
  83. for initial output from ROM bootloader. This output can be further suppressed by
  84. bootstrapping GPIO13 pin to low logic level.
  85. config ESP_CONSOLE_UART_DEFAULT
  86. bool "Default: UART0, TX=GPIO1, RX=GPIO3"
  87. config ESP_CONSOLE_UART_CUSTOM
  88. bool "Custom"
  89. config ESP_CONSOLE_UART_NONE
  90. bool "None"
  91. endchoice
  92. choice ESP_CONSOLE_UART_NUM
  93. prompt "UART peripheral to use for console output (0-1)"
  94. depends on ESP_CONSOLE_UART_CUSTOM
  95. default ESP_CONSOLE_UART_CUSTOM_NUM_0
  96. help
  97. Due of a ROM bug, UART2 is not supported for console output
  98. via ets_printf.
  99. config ESP_CONSOLE_UART_CUSTOM_NUM_0
  100. bool "UART0"
  101. config ESP_CONSOLE_UART_CUSTOM_NUM_1
  102. bool "UART1"
  103. endchoice
  104. config ESP_CONSOLE_UART_NUM
  105. int
  106. default 0 if ESP_CONSOLE_UART_DEFAULT || ESP_CONSOLE_UART_NONE
  107. default 0 if ESP_CONSOLE_UART_CUSTOM_NUM_0
  108. default 1 if ESP_CONSOLE_UART_CUSTOM_NUM_1
  109. config ESP_CONSOLE_UART_TX_GPIO
  110. int "UART TX on GPIO#"
  111. depends on ESP_CONSOLE_UART_CUSTOM
  112. range 0 33
  113. default 19
  114. config ESP_CONSOLE_UART_RX_GPIO
  115. int "UART RX on GPIO#"
  116. depends on ESP_CONSOLE_UART_CUSTOM
  117. range 0 39
  118. default 21
  119. config ESP_CONSOLE_UART_BAUDRATE
  120. int "UART console baud rate"
  121. depends on !ESP_CONSOLE_UART_NONE
  122. default 115200
  123. range 1200 4000000
  124. config ESP_INT_WDT
  125. bool "Interrupt watchdog"
  126. default y
  127. help
  128. This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
  129. either because a task turned off interrupts and did not turn them on for a long time, or because an
  130. interrupt handler did not return. It will try to invoke the panic handler first and failing that
  131. reset the SoC.
  132. config ESP_INT_WDT_TIMEOUT_MS
  133. int "Interrupt watchdog timeout (ms)"
  134. depends on ESP_INT_WDT
  135. default 600 if !ESP32_SPIRAM_SUPPORT
  136. default 800 if ESP32_SPIRAM_SUPPORT
  137. range 10 10000
  138. help
  139. The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
  140. config ESP_INT_WDT_CHECK_CPU1
  141. bool "Also watch CPU1 tick interrupt"
  142. depends on ESP_INT_WDT && !FREERTOS_UNICORE
  143. default y
  144. help
  145. Also detect if interrupts on CPU 1 are disabled for too long.
  146. config ESP_TASK_WDT
  147. bool "Initialize Task Watchdog Timer on startup"
  148. default y
  149. help
  150. The Task Watchdog Timer can be used to make sure individual tasks are still
  151. running. Enabling this option will cause the Task Watchdog Timer to be
  152. initialized automatically at startup. The Task Watchdog timer can be
  153. initialized after startup as well (see Task Watchdog Timer API Reference)
  154. config ESP_TASK_WDT_PANIC
  155. bool "Invoke panic handler on Task Watchdog timeout"
  156. depends on ESP_TASK_WDT
  157. default n
  158. help
  159. If this option is enabled, the Task Watchdog Timer will be configured to
  160. trigger the panic handler when it times out. This can also be configured
  161. at run time (see Task Watchdog Timer API Reference)
  162. config ESP_TASK_WDT_TIMEOUT_S
  163. int "Task Watchdog timeout period (seconds)"
  164. depends on ESP_TASK_WDT
  165. range 1 60
  166. default 5
  167. help
  168. Timeout period configuration for the Task Watchdog Timer in seconds.
  169. This is also configurable at run time (see Task Watchdog Timer API Reference)
  170. config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
  171. bool "Watch CPU0 Idle Task"
  172. depends on ESP_TASK_WDT
  173. default y
  174. help
  175. If this option is enabled, the Task Watchdog Timer will watch the CPU0
  176. Idle Task. Having the Task Watchdog watch the Idle Task allows for detection
  177. of CPU starvation as the Idle Task not being called is usually a symptom of
  178. CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household
  179. tasks depend on the Idle Task getting some runtime every now and then.
  180. config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
  181. bool "Watch CPU1 Idle Task"
  182. depends on ESP_TASK_WDT && !FREERTOS_UNICORE
  183. default y
  184. help
  185. If this option is enabled, the Task Wtachdog Timer will wach the CPU1
  186. Idle Task.
  187. config ESP_PANIC_HANDLER_IRAM
  188. bool "Place panic handler code in IRAM"
  189. default n
  190. depends on IDF_TARGET_ESP32 # pending ESP32-S2 Beta support
  191. help
  192. If this option is disabled (default), the panic handler code is placed in flash not IRAM.
  193. This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will
  194. automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor
  195. risk, if the flash cache status is also corrupted during the crash.
  196. If this option is enabled, the panic handler code is placed in IRAM. This allows the panic
  197. handler to run without needing to re-enable cache first. This may be necessary to debug some
  198. complex issues with crashes while flash cache is disabled (for example, when writing to
  199. SPI flash.)
  200. config ESP_DEBUG_STUBS_ENABLE
  201. bool
  202. default COMPILER_OPTIMIZATION_LEVEL_DEBUG
  203. depends on !ESP32_TRAX && !ESP32S2_TRAX
  204. help
  205. Debug stubs are used by OpenOCD to execute pre-compiled onboard code
  206. which does some useful debugging stuff, e.g. GCOV data dump.
  207. endmenu # Common ESP-related