cpu_start.c 7.9 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stdint.h>
  14. #include <string.h>
  15. #include "esp_attr.h"
  16. #include "esp_err.h"
  17. #include "rom/ets_sys.h"
  18. #include "rom/uart.h"
  19. #include "rom/rtc.h"
  20. #include "rom/cache.h"
  21. #include "soc/cpu.h"
  22. #include "soc/dport_reg.h"
  23. #include "soc/io_mux_reg.h"
  24. #include "soc/rtc_cntl_reg.h"
  25. #include "soc/timer_group_reg.h"
  26. #include "driver/rtc_io.h"
  27. #include "freertos/FreeRTOS.h"
  28. #include "freertos/task.h"
  29. #include "freertos/semphr.h"
  30. #include "freertos/queue.h"
  31. #include "freertos/portmacro.h"
  32. #include "tcpip_adapter.h"
  33. #include "esp_heap_alloc_caps.h"
  34. #include "sdkconfig.h"
  35. #include "esp_system.h"
  36. #include "esp_spi_flash.h"
  37. #include "nvs_flash.h"
  38. #include "esp_event.h"
  39. #include "esp_spi_flash.h"
  40. #include "esp_ipc.h"
  41. #include "esp_crosscore_int.h"
  42. #include "esp_log.h"
  43. #include "esp_vfs_dev.h"
  44. #include "esp_newlib.h"
  45. #include "esp_brownout.h"
  46. #include "esp_int_wdt.h"
  47. #include "esp_task_wdt.h"
  48. #include "esp_phy_init.h"
  49. #include "esp_coexist.h"
  50. #include "esp_core_dump.h"
  51. #include "trax.h"
  52. #define STRINGIFY(s) STRINGIFY2(s)
  53. #define STRINGIFY2(s) #s
  54. void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
  55. void start_cpu0_default(void) IRAM_ATTR;
  56. #if !CONFIG_FREERTOS_UNICORE
  57. static void IRAM_ATTR call_start_cpu1();
  58. void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default")));
  59. void start_cpu1_default(void) IRAM_ATTR;
  60. static bool app_cpu_started = false;
  61. #endif //!CONFIG_FREERTOS_UNICORE
  62. static void do_global_ctors(void);
  63. static void main_task(void* args);
  64. extern void app_main(void);
  65. extern int _bss_start;
  66. extern int _bss_end;
  67. extern int _rtc_bss_start;
  68. extern int _rtc_bss_end;
  69. extern int _init_start;
  70. extern void (*__init_array_start)(void);
  71. extern void (*__init_array_end)(void);
  72. extern volatile int port_xSchedulerRunning[2];
  73. static const char* TAG = "cpu_start";
  74. /*
  75. * We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
  76. * and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
  77. */
  78. void IRAM_ATTR call_start_cpu0()
  79. {
  80. cpu_configure_region_protection();
  81. //Move exception vectors to IRAM
  82. asm volatile (\
  83. "wsr %0, vecbase\n" \
  84. ::"r"(&_init_start));
  85. memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
  86. /* Unless waking from deep sleep (implying RTC memory is intact), clear RTC bss */
  87. if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET) {
  88. memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
  89. }
  90. ESP_EARLY_LOGI(TAG, "Pro cpu up.");
  91. #if !CONFIG_FREERTOS_UNICORE
  92. ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
  93. //Flush and enable icache for APP CPU
  94. Cache_Flush(1);
  95. Cache_Read_Enable(1);
  96. esp_cpu_unstall(1);
  97. //Enable clock gating and reset the app cpu.
  98. SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
  99. CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL);
  100. SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
  101. CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
  102. ets_set_appcpu_boot_addr((uint32_t)call_start_cpu1);
  103. while (!app_cpu_started) {
  104. ets_delay_us(100);
  105. }
  106. #else
  107. ESP_EARLY_LOGI(TAG, "Single core mode");
  108. CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
  109. #endif
  110. /* Initialize heap allocator. WARNING: This *needs* to happen *after* the app cpu has booted.
  111. If the heap allocator is initialized first, it will put free memory linked list items into
  112. memory also used by the ROM. Starting the app cpu will let its ROM initialize that memory,
  113. corrupting those linked lists. Initializing the allocator *after* the app cpu has booted
  114. works around this problem. */
  115. heap_alloc_caps_init();
  116. ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
  117. start_cpu0();
  118. }
  119. #if !CONFIG_FREERTOS_UNICORE
  120. void IRAM_ATTR call_start_cpu1()
  121. {
  122. asm volatile (\
  123. "wsr %0, vecbase\n" \
  124. ::"r"(&_init_start));
  125. cpu_configure_region_protection();
  126. #if CONFIG_CONSOLE_UART_NONE
  127. ets_install_putc1(NULL);
  128. ets_install_putc2(NULL);
  129. #else // CONFIG_CONSOLE_UART_NONE
  130. uartAttach();
  131. ets_install_uart_printf();
  132. uart_tx_switch(CONFIG_CONSOLE_UART_NUM);
  133. #endif
  134. ESP_EARLY_LOGI(TAG, "App cpu up.");
  135. app_cpu_started = 1;
  136. start_cpu1();
  137. }
  138. #endif //!CONFIG_FREERTOS_UNICORE
  139. void start_cpu0_default(void)
  140. {
  141. esp_setup_syscall_table();
  142. //Enable trace memory and immediately start trace.
  143. #if CONFIG_MEMMAP_TRACEMEM
  144. #if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
  145. trax_enable(TRAX_ENA_PRO_APP);
  146. #else
  147. trax_enable(TRAX_ENA_PRO);
  148. #endif
  149. trax_start_trace(TRAX_DOWNCOUNT_WORDS);
  150. #endif
  151. esp_set_cpu_freq(); // set CPU frequency configured in menuconfig
  152. #ifndef CONFIG_CONSOLE_UART_NONE
  153. uart_div_modify(CONFIG_CONSOLE_UART_NUM, (APB_CLK_FREQ << 4) / CONFIG_CONSOLE_UART_BAUDRATE);
  154. #endif
  155. #if CONFIG_BROWNOUT_DET
  156. esp_brownout_init();
  157. #endif
  158. rtc_gpio_unhold_all();
  159. esp_setup_time_syscalls();
  160. esp_vfs_dev_uart_register();
  161. esp_reent_init(_GLOBAL_REENT);
  162. #ifndef CONFIG_CONSOLE_UART_NONE
  163. const char* default_uart_dev = "/dev/uart/" STRINGIFY(CONFIG_CONSOLE_UART_NUM);
  164. _GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
  165. _GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
  166. _GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
  167. #else
  168. _GLOBAL_REENT->_stdin = (FILE*) &__sf_fake_stdin;
  169. _GLOBAL_REENT->_stdout = (FILE*) &__sf_fake_stdout;
  170. _GLOBAL_REENT->_stderr = (FILE*) &__sf_fake_stderr;
  171. #endif
  172. do_global_ctors();
  173. #if CONFIG_INT_WDT
  174. esp_int_wdt_init();
  175. #endif
  176. #if CONFIG_TASK_WDT
  177. esp_task_wdt_init();
  178. #endif
  179. #if !CONFIG_FREERTOS_UNICORE
  180. esp_crosscore_int_init();
  181. #endif
  182. esp_ipc_init();
  183. spi_flash_init();
  184. /* init default OS-aware flash access critical section */
  185. spi_flash_guard_set(&g_flash_guard_default_ops);
  186. #if CONFIG_ESP32_ENABLE_COREDUMP
  187. esp_core_dump_init();
  188. #endif
  189. xTaskCreatePinnedToCore(&main_task, "main",
  190. ESP_TASK_MAIN_STACK, NULL,
  191. ESP_TASK_MAIN_PRIO, NULL, 0);
  192. ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
  193. vTaskStartScheduler();
  194. }
  195. #if !CONFIG_FREERTOS_UNICORE
  196. void start_cpu1_default(void)
  197. {
  198. #if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
  199. trax_start_trace(TRAX_DOWNCOUNT_WORDS);
  200. #endif
  201. // Wait for FreeRTOS initialization to finish on PRO CPU
  202. while (port_xSchedulerRunning[0] == 0) {
  203. ;
  204. }
  205. //Take care putting stuff here: if asked, FreeRTOS will happily tell you the scheduler
  206. //has started, but it isn't active *on this CPU* yet.
  207. esp_crosscore_int_init();
  208. ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU.");
  209. xPortStartScheduler();
  210. }
  211. #endif //!CONFIG_FREERTOS_UNICORE
  212. static void do_global_ctors(void)
  213. {
  214. void (**p)(void);
  215. for (p = &__init_array_end - 1; p >= &__init_array_start; --p) {
  216. (*p)();
  217. }
  218. }
  219. static void main_task(void* args)
  220. {
  221. // Now that the application is about to start, disable boot watchdogs
  222. REG_CLR_BIT(TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN_S);
  223. REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
  224. //Enable allocation in region where the startup stacks were located.
  225. heap_alloc_enable_nonos_stack_tag();
  226. app_main();
  227. vTaskDelete(NULL);
  228. }