test_intr_alloc.c 11 KB

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  1. /*
  2. Tests for the interrupt allocator.
  3. */
  4. #include <esp_types.h>
  5. #include <stdio.h>
  6. #include "esp_rom_sys.h"
  7. #include "freertos/FreeRTOS.h"
  8. #include "freertos/task.h"
  9. #include "freertos/semphr.h"
  10. #include "freertos/queue.h"
  11. #include "unity.h"
  12. #include "soc/uart_periph.h"
  13. #include "soc/gpio_periph.h"
  14. #include "esp_intr_alloc.h"
  15. #include "driver/periph_ctrl.h"
  16. #include "driver/timer.h"
  17. #include "sdkconfig.h"
  18. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3,ESP32C3)
  19. #define TIMER_DIVIDER 16 /*!< Hardware timer clock divider */
  20. #define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */
  21. #define TIMER_INTERVAL0_SEC (3.4179) /*!< test interval for timer 0 */
  22. #define TIMER_INTERVAL1_SEC (5.78) /*!< test interval for timer 1 */
  23. static void my_timer_init(int timer_group, int timer_idx, int ival)
  24. {
  25. timer_config_t config;
  26. config.alarm_en = 1;
  27. config.auto_reload = 1;
  28. config.counter_dir = TIMER_COUNT_UP;
  29. config.divider = TIMER_DIVIDER;
  30. config.intr_type = TIMER_INTR_LEVEL;
  31. config.counter_en = TIMER_PAUSE;
  32. /*Configure timer*/
  33. timer_init(timer_group, timer_idx, &config);
  34. /*Stop timer counter*/
  35. timer_pause(timer_group, timer_idx);
  36. /*Load counter value */
  37. timer_set_counter_value(timer_group, timer_idx, 0x00000000ULL);
  38. /*Set alarm value*/
  39. timer_set_alarm_value(timer_group, timer_idx, ival);
  40. /*Enable timer interrupt*/
  41. timer_enable_intr(timer_group, timer_idx);
  42. }
  43. static volatile int count[4]={0,0,0,0};
  44. static void timer_isr(void *arg)
  45. {
  46. int timer_idx = (int)arg;
  47. count[timer_idx]++;
  48. if (timer_idx==0) {
  49. timer_group_clr_intr_status_in_isr(TIMER_GROUP_0, TIMER_0);
  50. timer_group_enable_alarm_in_isr(TIMER_GROUP_0, TIMER_0);
  51. }
  52. if (timer_idx==1) {
  53. timer_group_clr_intr_status_in_isr(TIMER_GROUP_0, TIMER_1);
  54. timer_group_enable_alarm_in_isr(TIMER_GROUP_0, TIMER_1);
  55. }
  56. if (timer_idx==2) {
  57. timer_group_clr_intr_status_in_isr(TIMER_GROUP_1, TIMER_0);
  58. timer_group_enable_alarm_in_isr(TIMER_GROUP_1, TIMER_0);
  59. }
  60. if (timer_idx==3) {
  61. timer_group_clr_intr_status_in_isr(TIMER_GROUP_1, TIMER_1);
  62. timer_group_enable_alarm_in_isr(TIMER_GROUP_1, TIMER_1);
  63. }
  64. }
  65. static void timer_test(int flags) {
  66. int x;
  67. timer_isr_handle_t inth[4];
  68. my_timer_init(TIMER_GROUP_0, TIMER_0, 110000);
  69. my_timer_init(TIMER_GROUP_0, TIMER_1, 120000);
  70. my_timer_init(TIMER_GROUP_1, TIMER_0, 130000);
  71. my_timer_init(TIMER_GROUP_1, TIMER_1, 140000);
  72. timer_isr_register(TIMER_GROUP_0, TIMER_0, timer_isr, (void*)0, flags|ESP_INTR_FLAG_INTRDISABLED, &inth[0]);
  73. timer_isr_register(TIMER_GROUP_0, TIMER_1, timer_isr, (void*)1, flags, &inth[1]);
  74. timer_isr_register(TIMER_GROUP_1, TIMER_0, timer_isr, (void*)2, flags, &inth[2]);
  75. timer_isr_register(TIMER_GROUP_1, TIMER_1, timer_isr, (void*)3, flags, &inth[3]);
  76. timer_start(TIMER_GROUP_0, TIMER_0);
  77. timer_start(TIMER_GROUP_0, TIMER_1);
  78. timer_start(TIMER_GROUP_1, TIMER_0);
  79. timer_start(TIMER_GROUP_1, TIMER_1);
  80. for (x=0; x<4; x++) count[x]=0;
  81. printf("Interrupts allocated: %d (dis) %d %d %d\n",
  82. esp_intr_get_intno(inth[0]), esp_intr_get_intno(inth[1]),
  83. esp_intr_get_intno(inth[2]), esp_intr_get_intno(inth[3]));
  84. printf("Timer values on start: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
  85. vTaskDelay(1000 / portTICK_PERIOD_MS);
  86. printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
  87. TEST_ASSERT(count[0]==0);
  88. TEST_ASSERT(count[1]!=0);
  89. TEST_ASSERT(count[2]!=0);
  90. TEST_ASSERT(count[3]!=0);
  91. printf("Disabling timers 1 and 2...\n");
  92. esp_intr_enable(inth[0]);
  93. esp_intr_disable(inth[1]);
  94. esp_intr_disable(inth[2]);
  95. for (x=0; x<4; x++) count[x]=0;
  96. vTaskDelay(1000 / portTICK_PERIOD_MS);
  97. printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
  98. TEST_ASSERT(count[0]!=0);
  99. TEST_ASSERT(count[1]==0);
  100. TEST_ASSERT(count[2]==0);
  101. TEST_ASSERT(count[3]!=0);
  102. printf("Disabling other half...\n");
  103. esp_intr_enable(inth[1]);
  104. esp_intr_enable(inth[2]);
  105. esp_intr_disable(inth[0]);
  106. esp_intr_disable(inth[3]);
  107. for (x=0; x<4; x++) count[x]=0;
  108. vTaskDelay(1000 / portTICK_PERIOD_MS);
  109. printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
  110. TEST_ASSERT(count[0]==0);
  111. TEST_ASSERT(count[1]!=0);
  112. TEST_ASSERT(count[2]!=0);
  113. TEST_ASSERT(count[3]==0);
  114. printf("Done.\n");
  115. esp_intr_free(inth[0]);
  116. esp_intr_free(inth[1]);
  117. esp_intr_free(inth[2]);
  118. esp_intr_free(inth[3]);
  119. }
  120. static volatile int int_timer_ctr;
  121. void int_timer_handler(void *arg) {
  122. xthal_set_ccompare(1, xthal_get_ccount()+8000000);
  123. int_timer_ctr++;
  124. }
  125. void local_timer_test(void)
  126. {
  127. intr_handle_t ih;
  128. esp_err_t r;
  129. r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
  130. TEST_ASSERT(r==ESP_OK);
  131. printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
  132. xthal_set_ccompare(1, xthal_get_ccount()+8000000);
  133. int_timer_ctr=0;
  134. vTaskDelay(1000 / portTICK_PERIOD_MS);
  135. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  136. TEST_ASSERT(int_timer_ctr!=0);
  137. printf("Disabling int\n");
  138. esp_intr_disable(ih);
  139. int_timer_ctr=0;
  140. vTaskDelay(1000 / portTICK_PERIOD_MS);
  141. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  142. TEST_ASSERT(int_timer_ctr==0);
  143. printf("Re-enabling\n");
  144. esp_intr_enable(ih);
  145. vTaskDelay(1000 / portTICK_PERIOD_MS);
  146. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  147. TEST_ASSERT(int_timer_ctr!=0);
  148. printf("Free int, re-alloc disabled\n");
  149. r=esp_intr_free(ih);
  150. TEST_ASSERT(r==ESP_OK);
  151. r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
  152. TEST_ASSERT(r==ESP_OK);
  153. int_timer_ctr=0;
  154. vTaskDelay(1000 / portTICK_PERIOD_MS);
  155. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  156. TEST_ASSERT(int_timer_ctr==0);
  157. printf("Re-enabling\n");
  158. esp_intr_enable(ih);
  159. vTaskDelay(1000 / portTICK_PERIOD_MS);
  160. printf("Timer val after 1 sec: %d\n", int_timer_ctr);
  161. TEST_ASSERT(int_timer_ctr!=0);
  162. r=esp_intr_free(ih);
  163. TEST_ASSERT(r==ESP_OK);
  164. printf("Done.\n");
  165. }
  166. TEST_CASE("Intr_alloc test, CPU-local int source", "[intr_alloc]")
  167. {
  168. local_timer_test();
  169. }
  170. TEST_CASE("Intr_alloc test, private ints", "[intr_alloc]")
  171. {
  172. timer_test(0);
  173. }
  174. TEST_CASE("Intr_alloc test, shared ints", "[intr_alloc]")
  175. {
  176. timer_test(ESP_INTR_FLAG_SHARED);
  177. }
  178. TEST_CASE("Can allocate IRAM int only with an IRAM handler", "[intr_alloc]")
  179. {
  180. void dummy(void* arg)
  181. {
  182. }
  183. IRAM_ATTR void dummy_iram(void* arg)
  184. {
  185. }
  186. RTC_IRAM_ATTR void dummy_rtc(void* arg)
  187. {
  188. }
  189. intr_handle_t ih;
  190. esp_err_t err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE,
  191. ESP_INTR_FLAG_IRAM, &dummy, NULL, &ih);
  192. TEST_ASSERT_EQUAL_INT(ESP_ERR_INVALID_ARG, err);
  193. err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE,
  194. ESP_INTR_FLAG_IRAM, &dummy_iram, NULL, &ih);
  195. TEST_ESP_OK(err);
  196. err = esp_intr_free(ih);
  197. TEST_ESP_OK(err);
  198. err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE,
  199. ESP_INTR_FLAG_IRAM, &dummy_rtc, NULL, &ih);
  200. TEST_ESP_OK(err);
  201. err = esp_intr_free(ih);
  202. TEST_ESP_OK(err);
  203. }
  204. #include "soc/spi_periph.h"
  205. typedef struct {
  206. bool flag1;
  207. bool flag2;
  208. bool flag3;
  209. bool flag4;
  210. } intr_alloc_test_ctx_t;
  211. void IRAM_ATTR int_handler1(void* arg)
  212. {
  213. intr_alloc_test_ctx_t* ctx=(intr_alloc_test_ctx_t*)arg;
  214. esp_rom_printf("handler 1 called.\n");
  215. if ( ctx->flag1 ) {
  216. ctx->flag3 = true;
  217. } else {
  218. ctx->flag1 = true;
  219. }
  220. #ifdef CONFIG_IDF_TARGET_ESP32
  221. SPI2.slave.trans_done = 0;
  222. #else
  223. GPSPI2.slave.trans_done = 0;
  224. #endif
  225. }
  226. void IRAM_ATTR int_handler2(void* arg)
  227. {
  228. intr_alloc_test_ctx_t* ctx = (intr_alloc_test_ctx_t*)arg;
  229. esp_rom_printf("handler 2 called.\n");
  230. if ( ctx->flag2 ) {
  231. ctx->flag4 = true;
  232. } else {
  233. ctx->flag2 = true;
  234. }
  235. }
  236. TEST_CASE("allocate 2 handlers for a same source and remove the later one","[intr_alloc]")
  237. {
  238. intr_alloc_test_ctx_t ctx = {false, false, false, false };
  239. intr_handle_t handle1, handle2;
  240. #ifdef CONFIG_IDF_TARGET_ESP32
  241. //enable HSPI(spi2)
  242. periph_module_enable(PERIPH_HSPI_MODULE);
  243. #else
  244. periph_module_enable(PERIPH_FSPI_MODULE);
  245. #endif
  246. esp_err_t r;
  247. r=esp_intr_alloc(ETS_SPI2_INTR_SOURCE, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1);
  248. TEST_ESP_OK(r);
  249. //try an invalid assign first
  250. r=esp_intr_alloc(ETS_SPI2_INTR_SOURCE, 0, int_handler2, NULL, &handle2);
  251. TEST_ASSERT_EQUAL_INT(r, ESP_ERR_NOT_FOUND );
  252. //assign shared then
  253. r=esp_intr_alloc(ETS_SPI2_INTR_SOURCE, ESP_INTR_FLAG_SHARED, int_handler2, &ctx, &handle2);
  254. TEST_ESP_OK(r);
  255. #ifdef CONFIG_IDF_TARGET_ESP32
  256. SPI2.slave.trans_inten = 1;
  257. #else
  258. GPSPI2.slave.int_trans_done_en = 1;
  259. #endif
  260. printf("trigger first time.\n");
  261. #ifdef CONFIG_IDF_TARGET_ESP32
  262. SPI2.slave.trans_done = 1;
  263. #else
  264. GPSPI2.slave.trans_done = 1;
  265. #endif
  266. vTaskDelay(100);
  267. TEST_ASSERT( ctx.flag1 && ctx.flag2 );
  268. printf("remove intr 1.\n");
  269. r=esp_intr_free(handle2);
  270. printf("trigger second time.\n");
  271. #ifdef CONFIG_IDF_TARGET_ESP32
  272. SPI2.slave.trans_done = 1;
  273. #else
  274. GPSPI2.slave.trans_done = 1;
  275. #endif
  276. vTaskDelay(500);
  277. TEST_ASSERT( ctx.flag3 && !ctx.flag4 );
  278. printf("test passed.\n");
  279. }
  280. #ifndef CONFIG_FREERTOS_UNICORE
  281. void isr_free_task(void *param)
  282. {
  283. esp_err_t ret = ESP_FAIL;
  284. intr_handle_t *test_handle = (intr_handle_t *)param;
  285. if(*test_handle != NULL) {
  286. ret = esp_intr_free(*test_handle);
  287. if(ret == ESP_OK) {
  288. *test_handle = NULL;
  289. }
  290. }
  291. vTaskDelete(NULL);
  292. }
  293. void isr_alloc_free_test(void)
  294. {
  295. intr_handle_t test_handle = NULL;
  296. esp_err_t ret = esp_intr_alloc(ETS_SPI2_INTR_SOURCE, 0, int_handler1, NULL, &test_handle);
  297. if(ret != ESP_OK) {
  298. printf("alloc isr handle fail\n");
  299. } else {
  300. printf("alloc isr handle on core %d\n",esp_intr_get_cpu(test_handle));
  301. }
  302. TEST_ASSERT(ret == ESP_OK);
  303. xTaskCreatePinnedToCore(isr_free_task, "isr_free_task", 1024*2, (void *)&test_handle, 10, NULL, !xPortGetCoreID());
  304. vTaskDelay(1000/portTICK_RATE_MS);
  305. TEST_ASSERT(test_handle == NULL);
  306. printf("test passed\n");
  307. }
  308. TEST_CASE("alloc and free isr handle on different core", "[intr_alloc]")
  309. {
  310. isr_alloc_free_test();
  311. }
  312. #endif
  313. #endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)