timer.c 23 KB

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  1. // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <string.h>
  14. #include "esp_log.h"
  15. #include "esp_err.h"
  16. #include "esp_check.h"
  17. #include "esp_intr_alloc.h"
  18. #include "freertos/FreeRTOS.h"
  19. #include "driver/timer.h"
  20. #include "driver/periph_ctrl.h"
  21. #include "hal/timer_hal.h"
  22. #include "soc/timer_periph.h"
  23. #include "soc/rtc.h"
  24. static const char *TIMER_TAG = "timer_group";
  25. #define TIMER_GROUP_NUM_ERROR "TIMER GROUP NUM ERROR"
  26. #define TIMER_NUM_ERROR "HW TIMER NUM ERROR"
  27. #define TIMER_PARAM_ADDR_ERROR "HW TIMER PARAM ADDR ERROR"
  28. #define TIMER_NEVER_INIT_ERROR "HW TIMER NEVER INIT ERROR"
  29. #define TIMER_COUNT_DIR_ERROR "HW TIMER COUNTER DIR ERROR"
  30. #define TIMER_AUTORELOAD_ERROR "HW TIMER AUTORELOAD ERROR"
  31. #define TIMER_SCALE_ERROR "HW TIMER SCALE ERROR"
  32. #define TIMER_ALARM_ERROR "HW TIMER ALARM ERROR"
  33. #define DIVIDER_RANGE_ERROR "HW TIMER divider outside of [2, 65536] range error"
  34. #define TIMER_ENTER_CRITICAL(mux) portENTER_CRITICAL_SAFE(mux);
  35. #define TIMER_EXIT_CRITICAL(mux) portEXIT_CRITICAL_SAFE(mux);
  36. typedef struct {
  37. timer_isr_t fn; /*!< isr function */
  38. void *args; /*!< isr function args */
  39. timer_isr_handle_t timer_isr_handle; /*!< interrupt handle */
  40. timer_group_t isr_timer_group; /*!< timer group of interrupt triggered */
  41. } timer_isr_func_t;
  42. typedef struct {
  43. timer_hal_context_t hal;
  44. timer_isr_func_t timer_isr_fun;
  45. } timer_obj_t;
  46. static timer_obj_t *p_timer_obj[TIMER_GROUP_MAX][TIMER_MAX] = {0};
  47. static portMUX_TYPE timer_spinlock[TIMER_GROUP_MAX] = {portMUX_INITIALIZER_UNLOCKED, portMUX_INITIALIZER_UNLOCKED};
  48. esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *timer_val)
  49. {
  50. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  51. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  52. ESP_RETURN_ON_FALSE(timer_val != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  53. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  54. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  55. timer_hal_get_counter_value(&(p_timer_obj[group_num][timer_num]->hal), timer_val);
  56. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  57. return ESP_OK;
  58. }
  59. esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double *time)
  60. {
  61. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  62. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  63. ESP_RETURN_ON_FALSE(time != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  64. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  65. uint64_t timer_val;
  66. esp_err_t err = timer_get_counter_value(group_num, timer_num, &timer_val);
  67. if (err == ESP_OK) {
  68. uint32_t div;
  69. timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div);
  70. *time = (double)timer_val * div / rtc_clk_apb_freq_get();
  71. #if SOC_TIMER_GROUP_SUPPORT_XTAL
  72. if (timer_hal_get_use_xtal(&(p_timer_obj[group_num][timer_num]->hal))) {
  73. *time = (double)timer_val * div / ((int)rtc_clk_xtal_freq_get() * 1000000);
  74. }
  75. #endif
  76. }
  77. return err;
  78. }
  79. esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val)
  80. {
  81. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  82. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  83. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  84. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  85. timer_hal_set_counter_value(&(p_timer_obj[group_num][timer_num]->hal), load_val);
  86. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  87. return ESP_OK;
  88. }
  89. esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num)
  90. {
  91. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  92. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  93. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  94. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  95. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_START);
  96. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  97. return ESP_OK;
  98. }
  99. esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num)
  100. {
  101. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  102. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  103. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  104. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  105. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_PAUSE);
  106. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  107. return ESP_OK;
  108. }
  109. esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir)
  110. {
  111. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  112. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  113. ESP_RETURN_ON_FALSE(counter_dir < TIMER_COUNT_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_COUNT_DIR_ERROR);
  114. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  115. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  116. timer_hal_set_counter_increase(&(p_timer_obj[group_num][timer_num]->hal), counter_dir);
  117. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  118. return ESP_OK;
  119. }
  120. esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload)
  121. {
  122. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  123. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  124. ESP_RETURN_ON_FALSE(reload < TIMER_AUTORELOAD_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_AUTORELOAD_ERROR);
  125. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  126. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  127. timer_hal_set_auto_reload(&(p_timer_obj[group_num][timer_num]->hal), reload);
  128. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  129. return ESP_OK;
  130. }
  131. esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint32_t divider)
  132. {
  133. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  134. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  135. ESP_RETURN_ON_FALSE(divider > 1 && divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
  136. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  137. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  138. timer_hal_set_divider(&(p_timer_obj[group_num][timer_num]->hal), divider);
  139. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  140. return ESP_OK;
  141. }
  142. esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value)
  143. {
  144. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  145. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  146. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  147. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  148. timer_hal_set_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_value);
  149. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  150. return ESP_OK;
  151. }
  152. esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *alarm_value)
  153. {
  154. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  155. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  156. ESP_RETURN_ON_FALSE(alarm_value != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  157. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  158. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  159. timer_hal_get_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_value);
  160. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  161. return ESP_OK;
  162. }
  163. esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en)
  164. {
  165. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  166. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  167. ESP_RETURN_ON_FALSE(alarm_en < TIMER_ALARM_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_ALARM_ERROR);
  168. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  169. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  170. timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), alarm_en);
  171. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  172. return ESP_OK;
  173. }
  174. static void IRAM_ATTR timer_isr_default(void *arg)
  175. {
  176. bool is_awoken = false;
  177. timer_obj_t *timer_obj = (timer_obj_t *)arg;
  178. if (timer_obj == NULL) {
  179. return;
  180. }
  181. if (timer_obj->timer_isr_fun.fn == NULL) {
  182. return;
  183. }
  184. TIMER_ENTER_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
  185. {
  186. uint32_t intr_status = 0;
  187. timer_hal_get_intr_status(&(timer_obj->hal), &intr_status);
  188. if (intr_status & BIT(timer_obj->hal.idx)) {
  189. is_awoken = timer_obj->timer_isr_fun.fn(timer_obj->timer_isr_fun.args);
  190. //Clear intrrupt status
  191. timer_hal_clear_intr_status(&(timer_obj->hal));
  192. //After the alarm has been triggered, we need enable it again, so it is triggered the next time.
  193. timer_hal_set_alarm_enable(&(timer_obj->hal), TIMER_ALARM_EN);
  194. }
  195. }
  196. TIMER_EXIT_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
  197. if (is_awoken) {
  198. portYIELD_FROM_ISR();
  199. }
  200. }
  201. esp_err_t timer_isr_callback_add(timer_group_t group_num, timer_idx_t timer_num, timer_isr_t isr_handler, void *args, int intr_alloc_flags)
  202. {
  203. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  204. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  205. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  206. timer_disable_intr(group_num, timer_num);
  207. p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = isr_handler;
  208. p_timer_obj[group_num][timer_num]->timer_isr_fun.args = args;
  209. p_timer_obj[group_num][timer_num]->timer_isr_fun.isr_timer_group = group_num;
  210. timer_isr_register(group_num, timer_num, timer_isr_default, (void *)p_timer_obj[group_num][timer_num],
  211. intr_alloc_flags, &(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle));
  212. timer_enable_intr(group_num, timer_num);
  213. return ESP_OK;
  214. }
  215. esp_err_t timer_isr_callback_remove(timer_group_t group_num, timer_idx_t timer_num)
  216. {
  217. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  218. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  219. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  220. timer_disable_intr(group_num, timer_num);
  221. p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = NULL;
  222. p_timer_obj[group_num][timer_num]->timer_isr_fun.args = NULL;
  223. esp_intr_free(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle);
  224. return ESP_OK;
  225. }
  226. esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num,
  227. void (*fn)(void *), void *arg, int intr_alloc_flags, timer_isr_handle_t *handle)
  228. {
  229. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  230. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  231. ESP_RETURN_ON_FALSE(fn != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  232. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  233. uint32_t status_reg = 0;
  234. uint32_t mask = 0;
  235. timer_hal_get_status_reg_mask_bit(&(p_timer_obj[group_num][timer_num]->hal), &status_reg, &mask);
  236. return esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_num].t0_irq_id + timer_num, intr_alloc_flags, status_reg, mask, fn, arg, handle);
  237. }
  238. esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer_config_t *config)
  239. {
  240. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  241. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  242. ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  243. ESP_RETURN_ON_FALSE(config->divider > 1 && config->divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
  244. periph_module_enable(timer_group_periph_signals.groups[group_num].module);
  245. if (p_timer_obj[group_num][timer_num] == NULL) {
  246. p_timer_obj[group_num][timer_num] = (timer_obj_t *) heap_caps_calloc(1, sizeof(timer_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
  247. if (p_timer_obj[group_num][timer_num] == NULL) {
  248. ESP_LOGE(TIMER_TAG, "TIMER driver malloc error");
  249. return ESP_FAIL;
  250. }
  251. }
  252. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  253. timer_hal_init(&(p_timer_obj[group_num][timer_num]->hal), group_num, timer_num);
  254. timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
  255. timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
  256. timer_hal_set_auto_reload(&(p_timer_obj[group_num][timer_num]->hal), config->auto_reload);
  257. timer_hal_set_divider(&(p_timer_obj[group_num][timer_num]->hal), config->divider);
  258. timer_hal_set_counter_increase(&(p_timer_obj[group_num][timer_num]->hal), config->counter_dir);
  259. timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), config->alarm_en);
  260. timer_hal_set_level_int_enable(&(p_timer_obj[group_num][timer_num]->hal), true);
  261. if (config->intr_type != TIMER_INTR_LEVEL) {
  262. ESP_LOGW(TIMER_TAG, "only support Level Interrupt, switch to Level Interrupt instead");
  263. }
  264. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), config->counter_en);
  265. #if SOC_TIMER_GROUP_SUPPORT_XTAL
  266. timer_hal_set_use_xtal(&(p_timer_obj[group_num][timer_num]->hal), config->clk_src);
  267. #endif
  268. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  269. return ESP_OK;
  270. }
  271. esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num)
  272. {
  273. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  274. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  275. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  276. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  277. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_PAUSE);
  278. timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
  279. timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
  280. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  281. heap_caps_free(p_timer_obj[group_num][timer_num]);
  282. p_timer_obj[group_num][timer_num] = NULL;
  283. return ESP_OK;
  284. }
  285. esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config)
  286. {
  287. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  288. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  289. ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
  290. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  291. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  292. config->alarm_en = timer_hal_get_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal));
  293. config->auto_reload = timer_hal_get_auto_reload(&(p_timer_obj[group_num][timer_num]->hal));
  294. config->counter_dir = timer_hal_get_counter_increase(&(p_timer_obj[group_num][timer_num]->hal));
  295. config->counter_en = timer_hal_get_counter_enable(&(p_timer_obj[group_num][timer_num]->hal));
  296. uint32_t div;
  297. timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div);
  298. config->divider = div;
  299. if (timer_hal_get_level_int_enable(&(p_timer_obj[group_num][timer_num]->hal))) {
  300. config->intr_type = TIMER_INTR_LEVEL;
  301. } else {
  302. config->intr_type = TIMER_INTR_MAX;
  303. }
  304. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  305. return ESP_OK;
  306. }
  307. esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t en_mask)
  308. {
  309. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  310. ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  311. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  312. for (int i = 0; i < TIMER_MAX; i++) {
  313. if (en_mask & BIT(i)) {
  314. timer_hal_intr_enable(&(p_timer_obj[group_num][i]->hal));
  315. }
  316. }
  317. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  318. return ESP_OK;
  319. }
  320. esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t disable_mask)
  321. {
  322. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  323. ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  324. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  325. for (int i = 0; i < TIMER_MAX; i++) {
  326. if (disable_mask & BIT(i)) {
  327. timer_hal_intr_disable(&(p_timer_obj[group_num][i]->hal));
  328. }
  329. }
  330. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  331. return ESP_OK;
  332. }
  333. esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num)
  334. {
  335. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  336. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  337. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  338. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  339. timer_hal_intr_enable(&(p_timer_obj[group_num][timer_num]->hal));
  340. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  341. return ESP_OK;
  342. }
  343. esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num)
  344. {
  345. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  346. ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
  347. ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
  348. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  349. timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
  350. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  351. return ESP_OK;
  352. }
  353. /* This function is deprecated */
  354. timer_intr_t IRAM_ATTR timer_group_intr_get_in_isr(timer_group_t group_num)
  355. {
  356. uint32_t intr_raw_status = 0;
  357. timer_hal_get_intr_raw_status(group_num, &intr_raw_status);
  358. return intr_raw_status;
  359. }
  360. uint32_t IRAM_ATTR timer_group_get_intr_status_in_isr(timer_group_t group_num)
  361. {
  362. uint32_t intr_status = 0;
  363. if (p_timer_obj[group_num][TIMER_0] != NULL) {
  364. timer_hal_get_intr_status(&(p_timer_obj[group_num][TIMER_0]->hal), &intr_status);
  365. }
  366. #if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
  367. else if (p_timer_obj[group_num][TIMER_1] != NULL) {
  368. timer_hal_get_intr_status(&(p_timer_obj[group_num][TIMER_1]->hal), &intr_status);
  369. }
  370. #endif
  371. return intr_status;
  372. }
  373. /* This function is deprecated */
  374. void IRAM_ATTR timer_group_intr_clr_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  375. {
  376. timer_group_clr_intr_status_in_isr(group_num, timer_num);
  377. }
  378. void IRAM_ATTR timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  379. {
  380. timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
  381. }
  382. void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  383. {
  384. timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), true);
  385. }
  386. uint64_t IRAM_ATTR timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  387. {
  388. uint64_t val;
  389. timer_hal_get_counter_value(&(p_timer_obj[group_num][timer_num]->hal), &val);
  390. return val;
  391. }
  392. void IRAM_ATTR timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_val)
  393. {
  394. timer_hal_set_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_val);
  395. }
  396. void IRAM_ATTR timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en)
  397. {
  398. timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), counter_en);
  399. }
  400. /* This function is deprecated */
  401. void IRAM_ATTR timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_mask)
  402. {
  403. for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
  404. if (intr_mask & BIT(timer_idx)) {
  405. timer_group_clr_intr_status_in_isr(group_num, timer_idx);
  406. }
  407. }
  408. }
  409. bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num)
  410. {
  411. return timer_hal_get_auto_reload(&(p_timer_obj[group_num][timer_num]->hal));
  412. }
  413. esp_err_t IRAM_ATTR timer_spinlock_take(timer_group_t group_num)
  414. {
  415. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  416. TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
  417. return ESP_OK;
  418. }
  419. esp_err_t IRAM_ATTR timer_spinlock_give(timer_group_t group_num)
  420. {
  421. ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
  422. TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
  423. return ESP_OK;
  424. }