bt.c 50 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629
  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/xtensa_api.h"
  25. #include "freertos/portmacro.h"
  26. #include "xtensa/core-macros.h"
  27. #include "esp_types.h"
  28. #include "esp_system.h"
  29. #include "esp_task.h"
  30. #include "esp_intr_alloc.h"
  31. #include "esp_attr.h"
  32. #include "esp_phy_init.h"
  33. #include "esp_bt.h"
  34. #include "esp_err.h"
  35. #include "esp_log.h"
  36. #include "esp_pm.h"
  37. #include "driver/periph_ctrl.h"
  38. #include "soc/rtc.h"
  39. #include "soc/soc_memory_layout.h"
  40. #include "esp32/clk.h"
  41. #include "esp_coexist_internal.h"
  42. #if !CONFIG_FREERTOS_UNICORE
  43. #include "esp_ipc.h"
  44. #endif
  45. #include "esp_rom_sys.h"
  46. #if CONFIG_BT_ENABLED
  47. /* Macro definition
  48. ************************************************************************
  49. */
  50. #define BTDM_LOG_TAG "BTDM_INIT"
  51. #define BTDM_INIT_PERIOD (5000) /* ms */
  52. /* Bluetooth system and controller config */
  53. #define BTDM_CFG_BT_DATA_RELEASE (1<<0)
  54. #define BTDM_CFG_HCI_UART (1<<1)
  55. #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
  56. #define BTDM_CFG_SCAN_DUPLICATE_OPTIONS (1<<3)
  57. #define BTDM_CFG_SEND_ADV_RESERVED_SIZE (1<<4)
  58. #define BTDM_CFG_BLE_FULL_SCAN_SUPPORTED (1<<5)
  59. /* Sleep mode */
  60. #define BTDM_MODEM_SLEEP_MODE_NONE (0)
  61. #define BTDM_MODEM_SLEEP_MODE_ORIG (1)
  62. #define BTDM_MODEM_SLEEP_MODE_EVED (2) // sleep mode for BLE controller, used only for internal test.
  63. /* Low Power Clock Selection */
  64. #define BTDM_LPCLK_SEL_XTAL (0)
  65. #define BTDM_LPCLK_SEL_XTAL32K (1)
  66. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  67. #define BTDM_LPCLK_SEL_8M (3)
  68. /* Sleep and wakeup interval control */
  69. #define BTDM_MIN_SLEEP_DURATION (12) // threshold of interval in slots to allow to fall into modem sleep
  70. #define BTDM_MODEM_WAKE_UP_DELAY (4) // delay in slots of modem wake up procedure, including re-enable PHY/RF
  71. #define BT_DEBUG(...)
  72. #define BT_API_CALL_CHECK(info, api_call, ret) \
  73. do{\
  74. esp_err_t __err = (api_call);\
  75. if ((ret) != __err) {\
  76. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  77. return __err;\
  78. }\
  79. } while(0)
  80. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  81. #define OSI_VERSION 0x00010002
  82. #define OSI_MAGIC_VALUE 0xFADEBEAD
  83. /* SPIRAM Configuration */
  84. #if CONFIG_SPIRAM_USE_MALLOC
  85. #define BTDM_MAX_QUEUE_NUM (5)
  86. #endif
  87. /* Types definition
  88. ************************************************************************
  89. */
  90. /* VHCI function interface */
  91. typedef struct vhci_host_callback {
  92. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  93. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  94. } vhci_host_callback_t;
  95. /* Dram region */
  96. typedef struct {
  97. esp_bt_mode_t mode;
  98. intptr_t start;
  99. intptr_t end;
  100. } btdm_dram_available_region_t;
  101. /* PSRAM configuration */
  102. #if CONFIG_SPIRAM_USE_MALLOC
  103. typedef struct {
  104. QueueHandle_t handle;
  105. void *storage;
  106. void *buffer;
  107. } btdm_queue_item_t;
  108. #endif
  109. /* OSI function */
  110. struct osi_funcs_t {
  111. uint32_t _version;
  112. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  113. void (*_ints_on)(unsigned int mask);
  114. void (*_interrupt_disable)(void);
  115. void (*_interrupt_restore)(void);
  116. void (*_task_yield)(void);
  117. void (*_task_yield_from_isr)(void);
  118. void *(*_semphr_create)(uint32_t max, uint32_t init);
  119. void (*_semphr_delete)(void *semphr);
  120. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  121. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  122. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  123. int32_t (*_semphr_give)(void *semphr);
  124. void *(*_mutex_create)(void);
  125. void (*_mutex_delete)(void *mutex);
  126. int32_t (*_mutex_lock)(void *mutex);
  127. int32_t (*_mutex_unlock)(void *mutex);
  128. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  129. void (* _queue_delete)(void *queue);
  130. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  131. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  132. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  133. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  134. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  135. void (* _task_delete)(void *task_handle);
  136. bool (* _is_in_isr)(void);
  137. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  138. void *(* _malloc)(uint32_t size);
  139. void *(* _malloc_internal)(uint32_t size);
  140. void (* _free)(void *p);
  141. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  142. void (* _srand)(unsigned int seed);
  143. int (* _rand)(void);
  144. uint32_t (* _btdm_lpcycles_2_us)(uint32_t cycles);
  145. uint32_t (* _btdm_us_2_lpcycles)(uint32_t us);
  146. bool (* _btdm_sleep_check_duration)(uint32_t *slot_cnt);
  147. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  148. void (* _btdm_sleep_enter_phase2)(void);
  149. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  150. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  151. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  152. bool (* _coex_bt_wakeup_request)(void);
  153. void (* _coex_bt_wakeup_request_end)(void);
  154. int (* _coex_bt_request)(uint32_t event, uint32_t latency, uint32_t duration);
  155. int (* _coex_bt_release)(uint32_t event);
  156. int (* _coex_register_bt_cb)(coex_func_cb_t cb);
  157. uint32_t (* _coex_bb_reset_lock)(void);
  158. void (* _coex_bb_reset_unlock)(uint32_t restore);
  159. uint32_t _magic;
  160. };
  161. typedef void (*workitem_handler_t)(void* arg);
  162. /* External functions or values
  163. ************************************************************************
  164. */
  165. /* not for user call, so don't put to include file */
  166. /* OSI */
  167. extern int btdm_osi_funcs_register(void *osi_funcs);
  168. /* Initialise and De-initialise */
  169. extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
  170. extern void btdm_controller_deinit(void);
  171. extern int btdm_controller_enable(esp_bt_mode_t mode);
  172. extern void btdm_controller_disable(void);
  173. extern uint8_t btdm_controller_get_mode(void);
  174. extern const char *btdm_controller_get_compile_version(void);
  175. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  176. extern int btdm_dispatch_work_to_controller(workitem_handler_t callback, void *arg, bool blocking);
  177. /* Sleep */
  178. extern void btdm_controller_enable_sleep(bool enable);
  179. extern void btdm_controller_set_sleep_mode(uint8_t mode);
  180. extern uint8_t btdm_controller_get_sleep_mode(void);
  181. extern bool btdm_power_state_active(void);
  182. extern void btdm_wakeup_request(void);
  183. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  184. /* Low Power Clock */
  185. extern bool btdm_lpclk_select_src(uint32_t sel);
  186. extern bool btdm_lpclk_set_div(uint32_t div);
  187. /* VHCI */
  188. extern bool API_vhci_host_check_send_available(void);
  189. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  190. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  191. /* TX power */
  192. extern int ble_txpwr_set(int power_type, int power_level);
  193. extern int ble_txpwr_get(int power_type);
  194. extern int bredr_txpwr_set(int min_power_level, int max_power_level);
  195. extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
  196. extern void bredr_sco_datapath_set(uint8_t data_path);
  197. extern void btdm_controller_scan_duplicate_list_clear(void);
  198. /* Coexistence */
  199. extern int coex_bt_request(uint32_t event, uint32_t latency, uint32_t duration);
  200. extern int coex_bt_release(uint32_t event);
  201. extern int coex_register_bt_cb(coex_func_cb_t cb);
  202. extern uint32_t coex_bb_reset_lock(void);
  203. extern void coex_bb_reset_unlock(uint32_t restore);
  204. extern void coex_ble_adv_priority_high_set(bool high);
  205. extern char _bss_start_btdm;
  206. extern char _bss_end_btdm;
  207. extern char _data_start_btdm;
  208. extern char _data_end_btdm;
  209. extern uint32_t _data_start_btdm_rom;
  210. extern uint32_t _data_end_btdm_rom;
  211. extern uint32_t _bt_bss_start;
  212. extern uint32_t _bt_bss_end;
  213. extern uint32_t _nimble_bss_start;
  214. extern uint32_t _nimble_bss_end;
  215. extern uint32_t _btdm_bss_start;
  216. extern uint32_t _btdm_bss_end;
  217. extern uint32_t _bt_data_start;
  218. extern uint32_t _bt_data_end;
  219. extern uint32_t _nimble_data_start;
  220. extern uint32_t _nimble_data_end;
  221. extern uint32_t _btdm_data_start;
  222. extern uint32_t _btdm_data_end;
  223. /* Local Function Declare
  224. *********************************************************************
  225. */
  226. #if CONFIG_SPIRAM_USE_MALLOC
  227. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
  228. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
  229. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  230. static void IRAM_ATTR interrupt_disable(void);
  231. static void IRAM_ATTR interrupt_restore(void);
  232. static void IRAM_ATTR task_yield_from_isr(void);
  233. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  234. static void semphr_delete_wrapper(void *semphr);
  235. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  236. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  237. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  238. static int32_t semphr_give_wrapper(void *semphr);
  239. static void *mutex_create_wrapper(void);
  240. static void mutex_delete_wrapper(void *mutex);
  241. static int32_t mutex_lock_wrapper(void *mutex);
  242. static int32_t mutex_unlock_wrapper(void *mutex);
  243. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  244. static void queue_delete_wrapper(void *queue);
  245. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  246. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  247. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  248. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  249. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  250. static void task_delete_wrapper(void *task_handle);
  251. static bool IRAM_ATTR is_in_isr_wrapper(void);
  252. static void IRAM_ATTR cause_sw_intr(void *arg);
  253. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
  254. static void *malloc_internal_wrapper(size_t size);
  255. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  256. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  257. static int IRAM_ATTR rand_wrapper(void);
  258. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles);
  259. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us);
  260. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt);
  261. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  262. static void btdm_sleep_enter_phase2_wrapper(void);
  263. static void btdm_sleep_exit_phase3_wrapper(void);
  264. static bool coex_bt_wakeup_request(void);
  265. static void coex_bt_wakeup_request_end(void);
  266. static int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
  267. static int coex_bt_release_wrapper(uint32_t event);
  268. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
  269. static uint32_t coex_bb_reset_lock_wrapper(void);
  270. static void coex_bb_reset_unlock_wrapper(uint32_t restore);
  271. /* Local variable definition
  272. ***************************************************************************
  273. */
  274. /* OSI funcs */
  275. static const struct osi_funcs_t osi_funcs_ro = {
  276. ._version = OSI_VERSION,
  277. ._set_isr = xt_set_interrupt_handler,
  278. ._ints_on = xt_ints_on,
  279. ._interrupt_disable = interrupt_disable,
  280. ._interrupt_restore = interrupt_restore,
  281. ._task_yield = vPortYield,
  282. ._task_yield_from_isr = task_yield_from_isr,
  283. ._semphr_create = semphr_create_wrapper,
  284. ._semphr_delete = semphr_delete_wrapper,
  285. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  286. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  287. ._semphr_take = semphr_take_wrapper,
  288. ._semphr_give = semphr_give_wrapper,
  289. ._mutex_create = mutex_create_wrapper,
  290. ._mutex_delete = mutex_delete_wrapper,
  291. ._mutex_lock = mutex_lock_wrapper,
  292. ._mutex_unlock = mutex_unlock_wrapper,
  293. ._queue_create = queue_create_wrapper,
  294. ._queue_delete = queue_delete_wrapper,
  295. ._queue_send = queue_send_wrapper,
  296. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  297. ._queue_recv = queue_recv_wrapper,
  298. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  299. ._task_create = task_create_wrapper,
  300. ._task_delete = task_delete_wrapper,
  301. ._is_in_isr = is_in_isr_wrapper,
  302. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  303. ._malloc = malloc,
  304. ._malloc_internal = malloc_internal_wrapper,
  305. ._free = free,
  306. ._read_efuse_mac = read_mac_wrapper,
  307. ._srand = srand_wrapper,
  308. ._rand = rand_wrapper,
  309. ._btdm_lpcycles_2_us = btdm_lpcycles_2_us,
  310. ._btdm_us_2_lpcycles = btdm_us_2_lpcycles,
  311. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  312. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  313. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  314. ._btdm_sleep_exit_phase1 = NULL,
  315. ._btdm_sleep_exit_phase2 = NULL,
  316. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  317. ._coex_bt_wakeup_request = coex_bt_wakeup_request,
  318. ._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
  319. ._coex_bt_request = coex_bt_request_wrapper,
  320. ._coex_bt_release = coex_bt_release_wrapper,
  321. ._coex_register_bt_cb = coex_register_bt_cb_wrapper,
  322. ._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
  323. ._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
  324. ._magic = OSI_MAGIC_VALUE,
  325. };
  326. /* the mode column will be modified by release function to indicate the available region */
  327. static btdm_dram_available_region_t btdm_dram_available_region[] = {
  328. //following is .data
  329. {ESP_BT_MODE_BTDM, SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END },
  330. //following is memory which HW will use
  331. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM0_START, SOC_MEM_BT_EM_BTDM0_END },
  332. {ESP_BT_MODE_BLE, SOC_MEM_BT_EM_BLE_START, SOC_MEM_BT_EM_BLE_END },
  333. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM1_START, SOC_MEM_BT_EM_BTDM1_END },
  334. {ESP_BT_MODE_CLASSIC_BT, SOC_MEM_BT_EM_BREDR_START, SOC_MEM_BT_EM_BREDR_REAL_END},
  335. //following is .bss
  336. {ESP_BT_MODE_BTDM, SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END },
  337. {ESP_BT_MODE_BTDM, SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END },
  338. };
  339. /* Reserve the full memory region used by Bluetooth Controller,
  340. * some may be released later at runtime. */
  341. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_EM_START, SOC_MEM_BT_EM_BREDR_REAL_END, rom_bt_em);
  342. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END, rom_bt_bss);
  343. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END, rom_bt_misc);
  344. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END, rom_bt_data);
  345. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  346. #if CONFIG_SPIRAM_USE_MALLOC
  347. static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
  348. static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
  349. #endif /* #if CONFIG_SPIRAM_USE_MALLOC */
  350. /* Static variable declare */
  351. // timestamp when PHY/RF was switched on
  352. static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
  353. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  354. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  355. // measured average low power clock period in micro seconds
  356. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  357. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
  358. #if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
  359. // used low power clock
  360. static DRAM_ATTR uint8_t btdm_lpclk_sel;
  361. #endif /* #ifdef CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG */
  362. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  363. #ifdef CONFIG_PM_ENABLE
  364. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  365. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  366. static bool s_pm_lock_acquired = true;
  367. static DRAM_ATTR bool s_btdm_allow_light_sleep;
  368. // pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
  369. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  370. static void btdm_slp_tmr_callback(void *arg);
  371. #endif /* #ifdef CONFIG_PM_ENABLE */
  372. static inline void btdm_check_and_init_bb(void)
  373. {
  374. /* init BT-BB if PHY/RF has been switched off since last BT-BB init */
  375. int64_t latest_ts = esp_phy_rf_get_on_ts();
  376. if (latest_ts != s_time_phy_rf_just_enabled ||
  377. s_time_phy_rf_just_enabled == 0) {
  378. btdm_rf_bb_init_phase2();
  379. s_time_phy_rf_just_enabled = latest_ts;
  380. }
  381. }
  382. #if CONFIG_SPIRAM_USE_MALLOC
  383. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
  384. {
  385. if (!btdm_queue_table_mux || !queue) {
  386. return NULL;
  387. }
  388. bool ret = false;
  389. btdm_queue_item_t *item;
  390. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  391. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  392. item = &btdm_queue_table[i];
  393. if (item->handle == NULL) {
  394. memcpy(item, queue, sizeof(btdm_queue_item_t));
  395. ret = true;
  396. break;
  397. }
  398. }
  399. xSemaphoreGive(btdm_queue_table_mux);
  400. return ret;
  401. }
  402. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
  403. {
  404. if (!btdm_queue_table_mux || !queue) {
  405. return false;
  406. }
  407. bool ret = false;
  408. btdm_queue_item_t *item;
  409. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  410. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  411. item = &btdm_queue_table[i];
  412. if (item->handle == queue->handle) {
  413. memcpy(queue, item, sizeof(btdm_queue_item_t));
  414. memset(item, 0, sizeof(btdm_queue_item_t));
  415. ret = true;
  416. break;
  417. }
  418. }
  419. xSemaphoreGive(btdm_queue_table_mux);
  420. return ret;
  421. }
  422. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  423. static void IRAM_ATTR interrupt_disable(void)
  424. {
  425. if (xPortInIsrContext()) {
  426. portENTER_CRITICAL_ISR(&global_int_mux);
  427. } else {
  428. portENTER_CRITICAL(&global_int_mux);
  429. }
  430. }
  431. static void IRAM_ATTR interrupt_restore(void)
  432. {
  433. if (xPortInIsrContext()) {
  434. portEXIT_CRITICAL_ISR(&global_int_mux);
  435. } else {
  436. portEXIT_CRITICAL(&global_int_mux);
  437. }
  438. }
  439. static void IRAM_ATTR task_yield_from_isr(void)
  440. {
  441. portYIELD_FROM_ISR();
  442. }
  443. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  444. {
  445. #if !CONFIG_SPIRAM_USE_MALLOC
  446. return (void *)xSemaphoreCreateCounting(max, init);
  447. #else
  448. StaticQueue_t *queue_buffer = NULL;
  449. QueueHandle_t handle = NULL;
  450. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  451. if (!queue_buffer) {
  452. goto error;
  453. }
  454. handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
  455. if (!handle) {
  456. goto error;
  457. }
  458. btdm_queue_item_t item = {
  459. .handle = handle,
  460. .storage = NULL,
  461. .buffer = queue_buffer,
  462. };
  463. if (!btdm_queue_generic_register(&item)) {
  464. goto error;
  465. }
  466. return handle;
  467. error:
  468. if (handle) {
  469. vSemaphoreDelete(handle);
  470. }
  471. if (queue_buffer) {
  472. free(queue_buffer);
  473. }
  474. return NULL;
  475. #endif
  476. }
  477. static void semphr_delete_wrapper(void *semphr)
  478. {
  479. #if !CONFIG_SPIRAM_USE_MALLOC
  480. vSemaphoreDelete(semphr);
  481. #else
  482. btdm_queue_item_t item = {
  483. .handle = semphr,
  484. .storage = NULL,
  485. .buffer = NULL,
  486. };
  487. if (btdm_queue_generic_deregister(&item)) {
  488. vSemaphoreDelete(item.handle);
  489. free(item.buffer);
  490. }
  491. return;
  492. #endif
  493. }
  494. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  495. {
  496. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  497. }
  498. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  499. {
  500. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  501. }
  502. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  503. {
  504. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  505. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  506. } else {
  507. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  508. }
  509. }
  510. static int32_t semphr_give_wrapper(void *semphr)
  511. {
  512. return (int32_t)xSemaphoreGive(semphr);
  513. }
  514. static void *mutex_create_wrapper(void)
  515. {
  516. #if CONFIG_SPIRAM_USE_MALLOC
  517. StaticQueue_t *queue_buffer = NULL;
  518. QueueHandle_t handle = NULL;
  519. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  520. if (!queue_buffer) {
  521. goto error;
  522. }
  523. handle = xSemaphoreCreateMutexStatic(queue_buffer);
  524. if (!handle) {
  525. goto error;
  526. }
  527. btdm_queue_item_t item = {
  528. .handle = handle,
  529. .storage = NULL,
  530. .buffer = queue_buffer,
  531. };
  532. if (!btdm_queue_generic_register(&item)) {
  533. goto error;
  534. }
  535. return handle;
  536. error:
  537. if (handle) {
  538. vSemaphoreDelete(handle);
  539. }
  540. if (queue_buffer) {
  541. free(queue_buffer);
  542. }
  543. return NULL;
  544. #else
  545. return (void *)xSemaphoreCreateMutex();
  546. #endif
  547. }
  548. static void mutex_delete_wrapper(void *mutex)
  549. {
  550. #if !CONFIG_SPIRAM_USE_MALLOC
  551. vSemaphoreDelete(mutex);
  552. #else
  553. btdm_queue_item_t item = {
  554. .handle = mutex,
  555. .storage = NULL,
  556. .buffer = NULL,
  557. };
  558. if (btdm_queue_generic_deregister(&item)) {
  559. vSemaphoreDelete(item.handle);
  560. free(item.buffer);
  561. }
  562. return;
  563. #endif
  564. }
  565. static int32_t mutex_lock_wrapper(void *mutex)
  566. {
  567. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  568. }
  569. static int32_t mutex_unlock_wrapper(void *mutex)
  570. {
  571. return (int32_t)xSemaphoreGive(mutex);
  572. }
  573. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  574. {
  575. #if CONFIG_SPIRAM_USE_MALLOC
  576. StaticQueue_t *queue_buffer = NULL;
  577. uint8_t *queue_storage = NULL;
  578. QueueHandle_t handle = NULL;
  579. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  580. if (!queue_buffer) {
  581. goto error;
  582. }
  583. queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  584. if (!queue_storage ) {
  585. goto error;
  586. }
  587. handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
  588. if (!handle) {
  589. goto error;
  590. }
  591. btdm_queue_item_t item = {
  592. .handle = handle,
  593. .storage = queue_storage,
  594. .buffer = queue_buffer,
  595. };
  596. if (!btdm_queue_generic_register(&item)) {
  597. goto error;
  598. }
  599. return handle;
  600. error:
  601. if (handle) {
  602. vQueueDelete(handle);
  603. }
  604. if (queue_storage) {
  605. free(queue_storage);
  606. }
  607. if (queue_buffer) {
  608. free(queue_buffer);
  609. }
  610. return NULL;
  611. #else
  612. return (void *)xQueueCreate(queue_len, item_size);
  613. #endif
  614. }
  615. static void queue_delete_wrapper(void *queue)
  616. {
  617. #if !CONFIG_SPIRAM_USE_MALLOC
  618. vQueueDelete(queue);
  619. #else
  620. btdm_queue_item_t item = {
  621. .handle = queue,
  622. .storage = NULL,
  623. .buffer = NULL,
  624. };
  625. if (btdm_queue_generic_deregister(&item)) {
  626. vQueueDelete(item.handle);
  627. free(item.storage);
  628. free(item.buffer);
  629. }
  630. return;
  631. #endif
  632. }
  633. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  634. {
  635. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  636. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  637. } else {
  638. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  639. }
  640. }
  641. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  642. {
  643. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  644. }
  645. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  646. {
  647. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  648. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  649. } else {
  650. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  651. }
  652. }
  653. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  654. {
  655. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  656. }
  657. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  658. {
  659. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  660. }
  661. static void task_delete_wrapper(void *task_handle)
  662. {
  663. vTaskDelete(task_handle);
  664. }
  665. static bool IRAM_ATTR is_in_isr_wrapper(void)
  666. {
  667. return !xPortCanYield();
  668. }
  669. static void IRAM_ATTR cause_sw_intr(void *arg)
  670. {
  671. /* just convert void * to int, because the width is the same */
  672. uint32_t intr_no = (uint32_t)arg;
  673. XTHAL_SET_INTSET((1<<intr_no));
  674. }
  675. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  676. {
  677. esp_err_t err = ESP_OK;
  678. #if CONFIG_FREERTOS_UNICORE
  679. cause_sw_intr((void *)intr_no);
  680. #else /* CONFIG_FREERTOS_UNICORE */
  681. if (xPortGetCoreID() == core_id) {
  682. cause_sw_intr((void *)intr_no);
  683. } else {
  684. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  685. }
  686. #endif /* !CONFIG_FREERTOS_UNICORE */
  687. return err;
  688. }
  689. static void *malloc_internal_wrapper(size_t size)
  690. {
  691. return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
  692. }
  693. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  694. {
  695. return esp_read_mac(mac, ESP_MAC_BT);
  696. }
  697. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  698. {
  699. /* empty function */
  700. }
  701. static int IRAM_ATTR rand_wrapper(void)
  702. {
  703. return (int)esp_random();
  704. }
  705. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles)
  706. {
  707. // The number of lp cycles should not lead to overflow. Thrs: 100s
  708. // clock measurement is conducted
  709. uint64_t us = (uint64_t)btdm_lpcycle_us * cycles;
  710. us = (us + (1 << (btdm_lpcycle_us_frac - 1))) >> btdm_lpcycle_us_frac;
  711. return (uint32_t)us;
  712. }
  713. /*
  714. * @brief Converts a duration in slots into a number of low power clock cycles.
  715. */
  716. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us)
  717. {
  718. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  719. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  720. // clock measurement is conducted
  721. uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  722. return (uint32_t)cycles;
  723. }
  724. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt)
  725. {
  726. if (*slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  727. return false;
  728. }
  729. /* wake up in advance considering the delay in enabling PHY/RF */
  730. *slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  731. return true;
  732. }
  733. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  734. {
  735. #ifdef CONFIG_PM_ENABLE
  736. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  737. uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
  738. #define BTDM_MIN_TIMER_UNCERTAINTY_US (500)
  739. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  740. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  741. // and set the timer in advance
  742. uint32_t uncertainty = (us_to_sleep >> 11);
  743. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  744. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  745. }
  746. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
  747. ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
  748. }
  749. #endif
  750. }
  751. static void btdm_sleep_enter_phase2_wrapper(void)
  752. {
  753. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  754. esp_phy_disable();
  755. #ifdef CONFIG_PM_ENABLE
  756. if (s_pm_lock_acquired) {
  757. esp_pm_lock_release(s_pm_lock);
  758. s_pm_lock_acquired = false;
  759. }
  760. #endif
  761. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  762. esp_phy_disable();
  763. // pause bluetooth baseband
  764. periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
  765. }
  766. }
  767. static void btdm_sleep_exit_phase3_wrapper(void)
  768. {
  769. #ifdef CONFIG_PM_ENABLE
  770. if (!s_pm_lock_acquired) {
  771. s_pm_lock_acquired = true;
  772. esp_pm_lock_acquire(s_pm_lock);
  773. }
  774. #endif
  775. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  776. esp_phy_enable();
  777. btdm_check_and_init_bb();
  778. #ifdef CONFIG_PM_ENABLE
  779. esp_timer_stop(s_btdm_slp_tmr);
  780. #endif
  781. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  782. // resume bluetooth baseband
  783. periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
  784. esp_phy_enable();
  785. }
  786. }
  787. #ifdef CONFIG_PM_ENABLE
  788. static void btdm_slp_tmr_customer_callback(void * arg)
  789. {
  790. (void)(arg);
  791. if (!s_pm_lock_acquired) {
  792. s_pm_lock_acquired = true;
  793. esp_pm_lock_acquire(s_pm_lock);
  794. }
  795. }
  796. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  797. {
  798. (void)(arg);
  799. btdm_dispatch_work_to_controller(btdm_slp_tmr_customer_callback, NULL, true);
  800. }
  801. #endif
  802. #define BTDM_ASYNC_WAKEUP_REQ_HCI 0
  803. #define BTDM_ASYNC_WAKEUP_REQ_COEX 1
  804. #define BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA 2
  805. #define BTDM_ASYNC_WAKEUP_REQMAX 3
  806. static void btdm_wakeup_request_callback(void * arg)
  807. {
  808. (void)(arg);
  809. #if CONFIG_PM_ENABLE
  810. if (!s_pm_lock_acquired) {
  811. s_pm_lock_acquired = true;
  812. esp_pm_lock_acquire(s_pm_lock);
  813. }
  814. esp_timer_stop(s_btdm_slp_tmr);
  815. #endif
  816. btdm_wakeup_request();
  817. semphr_give_wrapper(s_wakeup_req_sem);
  818. }
  819. static bool async_wakeup_request(int event)
  820. {
  821. bool do_wakeup_request = false;
  822. switch (event) {
  823. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  824. btdm_in_wakeup_requesting_set(true);
  825. // NO break
  826. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  827. if (!btdm_power_state_active()) {
  828. do_wakeup_request = true;
  829. btdm_dispatch_work_to_controller(btdm_wakeup_request_callback, NULL, true);
  830. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  831. }
  832. break;
  833. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  834. if (!btdm_power_state_active()) {
  835. do_wakeup_request = true;
  836. #if CONFIG_PM_ENABLE
  837. if (!s_pm_lock_acquired) {
  838. s_pm_lock_acquired = true;
  839. esp_pm_lock_acquire(s_pm_lock);
  840. }
  841. esp_timer_stop(s_btdm_slp_tmr);
  842. #endif
  843. btdm_wakeup_request();
  844. }
  845. break;
  846. default:
  847. return false;
  848. }
  849. return do_wakeup_request;
  850. }
  851. static void async_wakeup_request_end(int event)
  852. {
  853. bool request_lock = false;
  854. switch (event) {
  855. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  856. request_lock = true;
  857. break;
  858. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  859. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  860. request_lock = false;
  861. break;
  862. default:
  863. return;
  864. }
  865. if (request_lock) {
  866. btdm_in_wakeup_requesting_set(false);
  867. }
  868. return;
  869. }
  870. static bool coex_bt_wakeup_request(void)
  871. {
  872. return async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_COEX);
  873. }
  874. static void coex_bt_wakeup_request_end(void)
  875. {
  876. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_COEX);
  877. return;
  878. }
  879. int IRAM_ATTR coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
  880. {
  881. #if CONFIG_SW_COEXIST_ENABLE
  882. return coex_bt_request(event, latency, duration);
  883. #else
  884. return 0;
  885. #endif
  886. }
  887. int IRAM_ATTR coex_bt_release_wrapper(uint32_t event)
  888. {
  889. #if CONFIG_SW_COEXIST_ENABLE
  890. return coex_bt_release(event);
  891. #else
  892. return 0;
  893. #endif
  894. }
  895. int coex_register_bt_cb_wrapper(coex_func_cb_t cb)
  896. {
  897. #if CONFIG_SW_COEXIST_ENABLE
  898. return coex_register_bt_cb(cb);
  899. #else
  900. return 0;
  901. #endif
  902. }
  903. uint32_t IRAM_ATTR coex_bb_reset_lock_wrapper(void)
  904. {
  905. #if CONFIG_SW_COEXIST_ENABLE
  906. return coex_bb_reset_lock();
  907. #else
  908. return 0;
  909. #endif
  910. }
  911. void IRAM_ATTR coex_bb_reset_unlock_wrapper(uint32_t restore)
  912. {
  913. #if CONFIG_SW_COEXIST_ENABLE
  914. coex_bb_reset_unlock(restore);
  915. #endif
  916. }
  917. bool esp_vhci_host_check_send_available(void)
  918. {
  919. return API_vhci_host_check_send_available();
  920. }
  921. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  922. {
  923. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
  924. API_vhci_host_send_packet(data, len);
  925. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
  926. }
  927. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  928. {
  929. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  930. }
  931. static uint32_t btdm_config_mask_load(void)
  932. {
  933. uint32_t mask = 0x0;
  934. #if CONFIG_BTDM_CTRL_HCI_MODE_UART_H4
  935. mask |= BTDM_CFG_HCI_UART;
  936. #endif
  937. #if CONFIG_BTDM_CTRL_PINNED_TO_CORE == 1
  938. mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
  939. #endif
  940. #if CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED
  941. mask |= BTDM_CFG_BLE_FULL_SCAN_SUPPORTED;
  942. #endif /* CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED */
  943. mask |= BTDM_CFG_SCAN_DUPLICATE_OPTIONS;
  944. mask |= BTDM_CFG_SEND_ADV_RESERVED_SIZE;
  945. return mask;
  946. }
  947. static void btdm_controller_mem_init(void)
  948. {
  949. /* initialise .data section */
  950. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  951. ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
  952. //initial em, .bss section
  953. for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  954. if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
  955. memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
  956. ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
  957. }
  958. }
  959. }
  960. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  961. {
  962. int ret = heap_caps_add_region(start, end);
  963. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  964. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  965. * we replace it by ESP_OK
  966. */
  967. if (ret == ESP_ERR_INVALID_SIZE) {
  968. return ESP_OK;
  969. }
  970. return ret;
  971. }
  972. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  973. {
  974. bool update = true;
  975. intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
  976. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  977. return ESP_ERR_INVALID_STATE;
  978. }
  979. //already released
  980. if (!(mode & btdm_dram_available_region[0].mode)) {
  981. return ESP_ERR_INVALID_STATE;
  982. }
  983. for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  984. //skip the share mode, idle mode and other mode
  985. if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
  986. || (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
  987. //clear the bit of the mode which will be released
  988. btdm_dram_available_region[i].mode &= ~mode;
  989. continue;
  990. } else {
  991. //clear the bit of the mode which will be released
  992. btdm_dram_available_region[i].mode &= ~mode;
  993. }
  994. if (update) {
  995. mem_start = btdm_dram_available_region[i].start;
  996. mem_end = btdm_dram_available_region[i].end;
  997. update = false;
  998. }
  999. if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
  1000. mem_end = btdm_dram_available_region[i].end;
  1001. if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
  1002. && (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
  1003. && mem_end == btdm_dram_available_region[i+1].start) {
  1004. continue;
  1005. } else {
  1006. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1007. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1008. update = true;
  1009. }
  1010. } else {
  1011. mem_end = btdm_dram_available_region[i].end;
  1012. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1013. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1014. update = true;
  1015. }
  1016. }
  1017. if (mode == ESP_BT_MODE_BTDM) {
  1018. mem_start = (intptr_t)&_btdm_bss_start;
  1019. mem_end = (intptr_t)&_btdm_bss_end;
  1020. if (mem_start != mem_end) {
  1021. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1022. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1023. }
  1024. mem_start = (intptr_t)&_btdm_data_start;
  1025. mem_end = (intptr_t)&_btdm_data_end;
  1026. if (mem_start != mem_end) {
  1027. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1028. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1029. }
  1030. }
  1031. return ESP_OK;
  1032. }
  1033. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  1034. {
  1035. int ret;
  1036. intptr_t mem_start, mem_end;
  1037. ret = esp_bt_controller_mem_release(mode);
  1038. if (ret != ESP_OK) {
  1039. return ret;
  1040. }
  1041. if (mode == ESP_BT_MODE_BTDM) {
  1042. mem_start = (intptr_t)&_bt_bss_start;
  1043. mem_end = (intptr_t)&_bt_bss_end;
  1044. if (mem_start != mem_end) {
  1045. ESP_LOGD(BTDM_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1046. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1047. }
  1048. mem_start = (intptr_t)&_bt_data_start;
  1049. mem_end = (intptr_t)&_bt_data_end;
  1050. if (mem_start != mem_end) {
  1051. ESP_LOGD(BTDM_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1052. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1053. }
  1054. mem_start = (intptr_t)&_nimble_bss_start;
  1055. mem_end = (intptr_t)&_nimble_bss_end;
  1056. if (mem_start != mem_end) {
  1057. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1058. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1059. }
  1060. mem_start = (intptr_t)&_nimble_data_start;
  1061. mem_end = (intptr_t)&_nimble_data_end;
  1062. if (mem_start != mem_end) {
  1063. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1064. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1065. }
  1066. }
  1067. return ESP_OK;
  1068. }
  1069. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  1070. {
  1071. esp_err_t err;
  1072. uint32_t btdm_cfg_mask = 0;
  1073. //if all the bt available memory was already released, cannot initialize bluetooth controller
  1074. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
  1075. return ESP_ERR_INVALID_STATE;
  1076. }
  1077. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  1078. if (osi_funcs_p == NULL) {
  1079. return ESP_ERR_NO_MEM;
  1080. }
  1081. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  1082. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  1083. return ESP_ERR_INVALID_ARG;
  1084. }
  1085. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1086. return ESP_ERR_INVALID_STATE;
  1087. }
  1088. if (cfg == NULL) {
  1089. return ESP_ERR_INVALID_ARG;
  1090. }
  1091. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  1092. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  1093. return ESP_ERR_INVALID_ARG;
  1094. }
  1095. //overwrite some parameters
  1096. cfg->bt_max_sync_conn = CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF;
  1097. cfg->magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL;
  1098. if (((cfg->mode & ESP_BT_MODE_BLE) && (cfg->ble_max_conn <= 0 || cfg->ble_max_conn > BTDM_CONTROLLER_BLE_MAX_CONN_LIMIT))
  1099. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_acl_conn <= 0 || cfg->bt_max_acl_conn > BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_LIMIT))
  1100. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_sync_conn > BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_LIMIT))) {
  1101. return ESP_ERR_INVALID_ARG;
  1102. }
  1103. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  1104. #if CONFIG_SPIRAM_USE_MALLOC
  1105. btdm_queue_table_mux = xSemaphoreCreateMutex();
  1106. if (btdm_queue_table_mux == NULL) {
  1107. return ESP_ERR_NO_MEM;
  1108. }
  1109. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1110. #endif
  1111. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  1112. if (s_wakeup_req_sem == NULL) {
  1113. err = ESP_ERR_NO_MEM;
  1114. goto error;
  1115. }
  1116. btdm_controller_mem_init();
  1117. periph_module_enable(PERIPH_BT_MODULE);
  1118. #ifdef CONFIG_PM_ENABLE
  1119. s_btdm_allow_light_sleep = false;
  1120. #endif
  1121. // set default sleep clock cycle and its fractional bits
  1122. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1123. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1124. #if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
  1125. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1126. #if CONFIG_BTDM_LPCLK_SEL_EXT_32K_XTAL
  1127. // check whether or not EXT_CRYS is working
  1128. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  1129. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // set default value
  1130. #ifdef CONFIG_PM_ENABLE
  1131. s_btdm_allow_light_sleep = true;
  1132. #endif
  1133. } else {
  1134. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  1135. "light sleep mode will not be able to apply when bluetooth is enabled");
  1136. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1137. }
  1138. #else
  1139. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1140. #endif
  1141. bool select_src_ret, set_div_ret;
  1142. if (btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1143. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1144. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2 - 1);
  1145. assert(select_src_ret && set_div_ret);
  1146. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1147. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1148. } else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
  1149. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1150. set_div_ret = btdm_lpclk_set_div(0);
  1151. assert(select_src_ret && set_div_ret);
  1152. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1153. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1154. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1155. assert(btdm_lpcycle_us != 0);
  1156. }
  1157. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
  1158. #elif CONFIG_BTDM_MODEM_SLEEP_MODE_EVED
  1159. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
  1160. #else
  1161. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1162. #endif
  1163. #ifdef CONFIG_PM_ENABLE
  1164. if (!s_btdm_allow_light_sleep) {
  1165. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  1166. goto error;
  1167. }
  1168. }
  1169. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  1170. goto error;
  1171. }
  1172. esp_timer_create_args_t create_args = {
  1173. .callback = btdm_slp_tmr_callback,
  1174. .arg = NULL,
  1175. .name = "btSlp"
  1176. };
  1177. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1178. goto error;
  1179. }
  1180. s_pm_lock_acquired = true;
  1181. #endif
  1182. #if CONFIG_SW_COEXIST_ENABLE
  1183. coex_init();
  1184. #endif
  1185. btdm_cfg_mask = btdm_config_mask_load();
  1186. if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
  1187. err = ESP_ERR_NO_MEM;
  1188. goto error;
  1189. }
  1190. #ifdef CONFIG_BTDM_COEX_BLE_ADV_HIGH_PRIORITY
  1191. coex_ble_adv_priority_high_set(true);
  1192. #else
  1193. coex_ble_adv_priority_high_set(false);
  1194. #endif
  1195. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1196. return ESP_OK;
  1197. error:
  1198. #ifdef CONFIG_PM_ENABLE
  1199. if (!s_btdm_allow_light_sleep) {
  1200. if (s_light_sleep_pm_lock != NULL) {
  1201. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1202. s_light_sleep_pm_lock = NULL;
  1203. }
  1204. }
  1205. if (s_pm_lock != NULL) {
  1206. esp_pm_lock_delete(s_pm_lock);
  1207. s_pm_lock = NULL;
  1208. }
  1209. if (s_btdm_slp_tmr != NULL) {
  1210. esp_timer_delete(s_btdm_slp_tmr);
  1211. s_btdm_slp_tmr = NULL;
  1212. }
  1213. #endif
  1214. if (s_wakeup_req_sem) {
  1215. semphr_delete_wrapper(s_wakeup_req_sem);
  1216. s_wakeup_req_sem = NULL;
  1217. }
  1218. return err;
  1219. }
  1220. esp_err_t esp_bt_controller_deinit(void)
  1221. {
  1222. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1223. return ESP_ERR_INVALID_STATE;
  1224. }
  1225. btdm_controller_deinit();
  1226. periph_module_disable(PERIPH_BT_MODULE);
  1227. #ifdef CONFIG_PM_ENABLE
  1228. if (!s_btdm_allow_light_sleep) {
  1229. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1230. s_light_sleep_pm_lock = NULL;
  1231. }
  1232. esp_timer_stop(s_btdm_slp_tmr);
  1233. esp_timer_delete(s_btdm_slp_tmr);
  1234. s_btdm_slp_tmr = NULL;
  1235. s_pm_lock_acquired = false;
  1236. #endif
  1237. semphr_delete_wrapper(s_wakeup_req_sem);
  1238. s_wakeup_req_sem = NULL;
  1239. #if CONFIG_SPIRAM_USE_MALLOC
  1240. vSemaphoreDelete(btdm_queue_table_mux);
  1241. btdm_queue_table_mux = NULL;
  1242. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1243. #endif
  1244. free(osi_funcs_p);
  1245. osi_funcs_p = NULL;
  1246. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1247. btdm_lpcycle_us = 0;
  1248. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1249. return ESP_OK;
  1250. }
  1251. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1252. {
  1253. int ret;
  1254. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1255. return ESP_ERR_INVALID_STATE;
  1256. }
  1257. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1258. if (mode != btdm_controller_get_mode()) {
  1259. return ESP_ERR_INVALID_ARG;
  1260. }
  1261. #ifdef CONFIG_PM_ENABLE
  1262. if (!s_btdm_allow_light_sleep) {
  1263. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1264. }
  1265. esp_pm_lock_acquire(s_pm_lock);
  1266. #endif
  1267. esp_phy_enable();
  1268. #if CONFIG_SW_COEXIST_ENABLE
  1269. coex_enable();
  1270. #endif
  1271. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1272. btdm_controller_enable_sleep(true);
  1273. }
  1274. // inititalize bluetooth baseband
  1275. btdm_check_and_init_bb();
  1276. ret = btdm_controller_enable(mode);
  1277. if (ret != 0) {
  1278. #if CONFIG_SW_COEXIST_ENABLE
  1279. coex_disable();
  1280. #endif
  1281. esp_phy_disable();
  1282. #ifdef CONFIG_PM_ENABLE
  1283. if (!s_btdm_allow_light_sleep) {
  1284. esp_pm_lock_release(s_light_sleep_pm_lock);
  1285. }
  1286. esp_pm_lock_release(s_pm_lock);
  1287. #endif
  1288. return ESP_ERR_INVALID_STATE;
  1289. }
  1290. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1291. return ESP_OK;
  1292. }
  1293. esp_err_t esp_bt_controller_disable(void)
  1294. {
  1295. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1296. return ESP_ERR_INVALID_STATE;
  1297. }
  1298. // disable modem sleep and wake up from sleep mode
  1299. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1300. btdm_controller_enable_sleep(false);
  1301. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
  1302. while (!btdm_power_state_active()) {
  1303. esp_rom_delay_us(1000);
  1304. }
  1305. }
  1306. btdm_controller_disable();
  1307. #if CONFIG_SW_COEXIST_ENABLE
  1308. coex_disable();
  1309. #endif
  1310. esp_phy_disable();
  1311. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1312. #ifdef CONFIG_PM_ENABLE
  1313. if (!s_btdm_allow_light_sleep) {
  1314. esp_pm_lock_release(s_light_sleep_pm_lock);
  1315. }
  1316. esp_pm_lock_release(s_pm_lock);
  1317. #endif
  1318. return ESP_OK;
  1319. }
  1320. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1321. {
  1322. return btdm_controller_status;
  1323. }
  1324. /* extra functions */
  1325. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1326. {
  1327. if (ble_txpwr_set(power_type, power_level) != 0) {
  1328. return ESP_ERR_INVALID_ARG;
  1329. }
  1330. return ESP_OK;
  1331. }
  1332. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1333. {
  1334. return (esp_power_level_t)ble_txpwr_get(power_type);
  1335. }
  1336. esp_err_t esp_bredr_tx_power_set(esp_power_level_t min_power_level, esp_power_level_t max_power_level)
  1337. {
  1338. esp_err_t err;
  1339. int ret;
  1340. ret = bredr_txpwr_set(min_power_level, max_power_level);
  1341. if (ret == 0) {
  1342. err = ESP_OK;
  1343. } else if (ret == -1) {
  1344. err = ESP_ERR_INVALID_ARG;
  1345. } else {
  1346. err = ESP_ERR_INVALID_STATE;
  1347. }
  1348. return err;
  1349. }
  1350. esp_err_t esp_bredr_tx_power_get(esp_power_level_t *min_power_level, esp_power_level_t *max_power_level)
  1351. {
  1352. if (bredr_txpwr_get((int *)min_power_level, (int *)max_power_level) != 0) {
  1353. return ESP_ERR_INVALID_ARG;
  1354. }
  1355. return ESP_OK;
  1356. }
  1357. esp_err_t esp_bt_sleep_enable (void)
  1358. {
  1359. esp_err_t status;
  1360. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1361. return ESP_ERR_INVALID_STATE;
  1362. }
  1363. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1364. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1365. btdm_controller_enable_sleep (true);
  1366. status = ESP_OK;
  1367. } else {
  1368. status = ESP_ERR_NOT_SUPPORTED;
  1369. }
  1370. return status;
  1371. }
  1372. esp_err_t esp_bt_sleep_disable (void)
  1373. {
  1374. esp_err_t status;
  1375. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1376. return ESP_ERR_INVALID_STATE;
  1377. }
  1378. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1379. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1380. btdm_controller_enable_sleep (false);
  1381. status = ESP_OK;
  1382. } else {
  1383. status = ESP_ERR_NOT_SUPPORTED;
  1384. }
  1385. return status;
  1386. }
  1387. esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
  1388. {
  1389. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1390. return ESP_ERR_INVALID_STATE;
  1391. }
  1392. bredr_sco_datapath_set(data_path);
  1393. return ESP_OK;
  1394. }
  1395. esp_err_t esp_ble_scan_dupilcate_list_flush(void)
  1396. {
  1397. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1398. return ESP_ERR_INVALID_STATE;
  1399. }
  1400. btdm_controller_scan_duplicate_list_clear();
  1401. return ESP_OK;
  1402. }
  1403. #endif /* CONFIG_BT_ENABLED */