adc.c 6.1 KB

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  1. // Copyright 2016-2019 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <stdlib.h>
  15. #include <ctype.h>
  16. #include "sdkconfig.h"
  17. #include "esp_types.h"
  18. #include "esp_log.h"
  19. #include "sys/lock.h"
  20. #include "soc/rtc.h"
  21. #include "soc/periph_defs.h"
  22. #include "freertos/FreeRTOS.h"
  23. #include "freertos/xtensa_api.h"
  24. #include "freertos/semphr.h"
  25. #include "freertos/timers.h"
  26. #include "esp_intr_alloc.h"
  27. #include "driver/rtc_io.h"
  28. #include "driver/rtc_cntl.h"
  29. #include "driver/gpio.h"
  30. #include "driver/adc.h"
  31. #ifndef NDEBUG
  32. // Enable built-in checks in queue.h in debug builds
  33. #define INVARIANTS
  34. #endif
  35. #include "sys/queue.h"
  36. #include "hal/adc_types.h"
  37. #include "hal/adc_hal.h"
  38. #define ADC_MAX_MEAS_NUM_DEFAULT (255)
  39. #define ADC_MEAS_NUM_LIM_DEFAULT (1)
  40. #define DIG_ADC_OUTPUT_FORMAT_DEFUALT (ADC_DIGI_FORMAT_12BIT)
  41. #define DIG_ADC_ATTEN_DEFUALT (ADC_ATTEN_DB_11)
  42. #define DIG_ADC_BIT_WIDTH_DEFUALT (ADC_WIDTH_BIT_12)
  43. #define ADC_CHECK_RET(fun_ret) ({ \
  44. if (fun_ret != ESP_OK) { \
  45. ESP_LOGE(ADC_TAG,"%s:%d\n",__FUNCTION__,__LINE__); \
  46. return ESP_FAIL; \
  47. } \
  48. })
  49. static const char *ADC_TAG = "ADC";
  50. #define ADC_CHECK(a, str, ret_val) ({ \
  51. if (!(a)) { \
  52. ESP_LOGE(ADC_TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str); \
  53. return (ret_val); \
  54. } \
  55. })
  56. #define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel])
  57. #define ADC_CHANNEL_CHECK(periph, channel) ADC_CHECK(channel < SOC_ADC_CHANNEL_NUM(periph), "ADC"#periph" channel error", ESP_ERR_INVALID_ARG)
  58. extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
  59. #define ADC_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
  60. #define ADC_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
  61. /*---------------------------------------------------------------
  62. Digital controller setting
  63. ---------------------------------------------------------------*/
  64. esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src)
  65. {
  66. ADC_CHECK(src < ADC_I2S_DATA_SRC_MAX, "ADC i2s data source error", ESP_ERR_INVALID_ARG);
  67. ADC_ENTER_CRITICAL();
  68. adc_hal_digi_set_data_source(src);
  69. ADC_EXIT_CRITICAL();
  70. return ESP_OK;
  71. }
  72. esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
  73. {
  74. if (adc_unit & ADC_UNIT_1) {
  75. ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_1)), "ADC1 not support DMA for now.", ESP_ERR_INVALID_ARG);
  76. ADC_CHANNEL_CHECK(ADC_NUM_1, channel);
  77. }
  78. if (adc_unit & ADC_UNIT_2) {
  79. ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_2)), "ADC2 not support DMA for now.", ESP_ERR_INVALID_ARG);
  80. ADC_CHANNEL_CHECK(ADC_NUM_2, channel);
  81. }
  82. adc_digi_pattern_table_t adc1_pattern[1];
  83. adc_digi_pattern_table_t adc2_pattern[1];
  84. adc_digi_config_t dig_cfg = {
  85. .conv_limit_en = ADC_MEAS_NUM_LIM_DEFAULT,
  86. .conv_limit_num = ADC_MAX_MEAS_NUM_DEFAULT,
  87. .format = DIG_ADC_OUTPUT_FORMAT_DEFUALT,
  88. .conv_mode = (adc_digi_convert_mode_t)adc_unit,
  89. };
  90. if (adc_unit & ADC_UNIT_1) {
  91. adc1_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
  92. adc1_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
  93. adc1_pattern[0].channel = channel;
  94. dig_cfg.adc1_pattern_len = 1;
  95. dig_cfg.adc1_pattern = adc1_pattern;
  96. }
  97. if (adc_unit & ADC_UNIT_2) {
  98. adc2_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
  99. adc2_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
  100. adc2_pattern[0].channel = channel;
  101. dig_cfg.adc2_pattern_len = 1;
  102. dig_cfg.adc2_pattern = adc2_pattern;
  103. }
  104. adc_gpio_init(adc_unit, channel);
  105. ADC_ENTER_CRITICAL();
  106. adc_hal_digi_init();
  107. adc_hal_digi_controller_config(&dig_cfg);
  108. ADC_EXIT_CRITICAL();
  109. return ESP_OK;
  110. }
  111. esp_err_t adc_digi_init(void)
  112. {
  113. ADC_ENTER_CRITICAL();
  114. adc_hal_digi_init();
  115. ADC_EXIT_CRITICAL();
  116. return ESP_OK;
  117. }
  118. esp_err_t adc_digi_deinit(void)
  119. {
  120. ADC_ENTER_CRITICAL();
  121. adc_hal_digi_deinit();
  122. ADC_EXIT_CRITICAL();
  123. return ESP_OK;
  124. }
  125. esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
  126. {
  127. ADC_ENTER_CRITICAL();
  128. adc_hal_digi_controller_config(config);
  129. ADC_EXIT_CRITICAL();
  130. return ESP_OK;
  131. }
  132. /*---------------------------------------------------------------
  133. RTC controller setting
  134. ---------------------------------------------------------------*/
  135. /*---------------------------------------------------------------
  136. HALL SENSOR
  137. ---------------------------------------------------------------*/
  138. static int hall_sensor_get_value(void) //hall sensor without LNA
  139. {
  140. int hall_value;
  141. adc_power_acquire();
  142. ADC_ENTER_CRITICAL();
  143. /* disable other peripherals. */
  144. adc_hal_amp_disable();
  145. adc_hal_hall_enable();
  146. // set controller
  147. adc_hal_set_controller( ADC_NUM_1, ADC_CTRL_RTC );
  148. hall_value = adc_hal_hall_convert();
  149. adc_hal_hall_disable();
  150. ADC_EXIT_CRITICAL();
  151. adc_power_release();
  152. return hall_value;
  153. }
  154. int hall_sensor_read(void)
  155. {
  156. adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_0);
  157. adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_3);
  158. adc1_config_channel_atten(ADC1_CHANNEL_0, ADC_ATTEN_DB_0);
  159. adc1_config_channel_atten(ADC1_CHANNEL_3, ADC_ATTEN_DB_0);
  160. return hall_sensor_get_value();
  161. }