test_i2c.c 26 KB

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  1. /**
  2. * test environment UT_T2_I2C:
  3. * please prepare two ESP32-WROVER-KIT board.
  4. * Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
  5. */
  6. #include <stdio.h>
  7. #include <string.h>
  8. #include "unity.h"
  9. #include "test_utils.h"
  10. #include "unity_config.h"
  11. #include "driver/i2c.h"
  12. #include "esp_attr.h"
  13. #include "esp_log.h"
  14. #include "soc/gpio_periph.h"
  15. #include "soc/i2c_periph.h"
  16. #include "esp_system.h"
  17. #include "driver/pcnt.h"
  18. #include "soc/uart_struct.h"
  19. #include "driver/periph_ctrl.h"
  20. #include "esp_rom_gpio.h"
  21. #define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
  22. #define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
  23. #define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
  24. #define I2C_SLAVE_SCL_IO 19 /*!<gpio number for i2c slave clock */
  25. #define I2C_SLAVE_SDA_IO 18 /*!<gpio number for i2c slave data */
  26. #define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
  27. #define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
  28. #define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
  29. #define I2C_MASTER_SCL_IO 19 /*!< gpio number for I2C master clock */
  30. #define I2C_MASTER_SDA_IO 18 /*!< gpio number for I2C master data */
  31. #define I2C_MASTER_NUM I2C_NUM_1 /*!< I2C port number for master dev */
  32. #define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  33. #define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  34. #define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
  35. #define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
  36. #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
  37. #define READ_BIT I2C_MASTER_READ /*!< I2C master read */
  38. #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
  39. #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
  40. #define ACK_VAL 0x0 /*!< I2C ack value */
  41. #define NACK_VAL 0x1 /*!< I2C nack value */
  42. #define PULSE_IO 19
  43. #define PCNT_INPUT_IO 4
  44. #define PCNT_CTRL_FLOATING_IO 5
  45. #define HIGHEST_LIMIT 10000
  46. #define LOWEST_LIMIT -10000
  47. static DRAM_ATTR i2c_dev_t *const I2C[I2C_NUM_MAX] = { &I2C0, &I2C1 };
  48. static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
  49. {
  50. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  51. i2c_master_start(cmd);
  52. TEST_ESP_OK(i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN));
  53. TEST_ESP_OK(i2c_master_write(cmd, data_wr, size, ACK_CHECK_EN));
  54. TEST_ESP_OK(i2c_master_stop(cmd));
  55. esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  56. i2c_cmd_link_delete(cmd);
  57. return ret;
  58. }
  59. static i2c_config_t i2c_master_init(void)
  60. {
  61. i2c_config_t conf_master = {
  62. .mode = I2C_MODE_MASTER,
  63. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  64. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  65. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  66. .sda_io_num = I2C_MASTER_SDA_IO,
  67. .scl_io_num = I2C_MASTER_SCL_IO,
  68. .clk_flags = 0,
  69. };
  70. return conf_master;
  71. }
  72. static i2c_config_t i2c_slave_init(void)
  73. {
  74. i2c_config_t conf_slave = {
  75. .mode = I2C_MODE_SLAVE,
  76. .sda_io_num = I2C_SLAVE_SDA_IO,
  77. .scl_io_num = I2C_SLAVE_SCL_IO,
  78. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  79. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  80. .slave.addr_10bit_en = 0,
  81. .slave.slave_addr = ESP_SLAVE_ADDR,
  82. };
  83. return conf_slave;
  84. }
  85. TEST_CASE("I2C i2c_set_pin() fails if sda and scl gpios are same", "[i2c]")
  86. {
  87. TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, i2c_set_pin(0, 0, 0, true, true , I2C_MODE_SLAVE));
  88. }
  89. TEST_CASE("I2C config test", "[i2c]")
  90. {
  91. // master test
  92. i2c_config_t conf_master = i2c_master_init();
  93. gpio_pullup_t sda_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  94. gpio_pullup_t scl_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  95. for (int i = 0; i < 2; i++) {
  96. for (int j = 0; j < 2; j++) {
  97. conf_master.sda_pullup_en = sda_pull_up_en[i];
  98. conf_master.scl_pullup_en = scl_pull_up_en[j];
  99. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  100. I2C_MASTER_RX_BUF_DISABLE,
  101. I2C_MASTER_TX_BUF_DISABLE, 0));
  102. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  103. TEST_ASSERT_EQUAL_INT32(I2C[I2C_MASTER_NUM]->ctr.ms_mode, 1);
  104. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  105. }
  106. }
  107. // slave test
  108. i2c_config_t conf_slave = i2c_slave_init();
  109. for (int i = 0; i < 2; i++) {
  110. for (int j = 0; j < 2; j++) {
  111. conf_slave.sda_pullup_en = sda_pull_up_en[i];
  112. conf_slave.scl_pullup_en = scl_pull_up_en[j];
  113. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  114. I2C_SLAVE_RX_BUF_LEN,
  115. I2C_SLAVE_TX_BUF_LEN, 0));
  116. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  117. TEST_ASSERT_EQUAL_INT32(I2C[I2C_SLAVE_NUM] -> ctr.ms_mode, 0);
  118. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  119. }
  120. }
  121. }
  122. TEST_CASE("I2C set and get period test", "[i2c]")
  123. {
  124. int high_period, low_period;
  125. i2c_config_t conf_master = i2c_master_init();
  126. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  127. I2C_MASTER_RX_BUF_DISABLE,
  128. I2C_MASTER_TX_BUF_DISABLE, 0));
  129. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  130. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V, I2C_SCL_HIGH_PERIOD_V));
  131. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  132. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, high_period);
  133. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, low_period);
  134. TEST_ASSERT_NOT_NULL((void *)i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V + 1, I2C_SCL_HIGH_PERIOD_V + 1));
  135. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, 300, 400));
  136. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  137. TEST_ASSERT_EQUAL_INT(300, high_period);
  138. TEST_ASSERT_EQUAL_INT(400, low_period);
  139. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  140. }
  141. TEST_CASE("I2C config FIFO test", "[i2c]")
  142. {
  143. i2c_config_t conf_slave = i2c_slave_init();
  144. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  145. I2C_SLAVE_RX_BUF_LEN,
  146. I2C_SLAVE_TX_BUF_LEN, 0));
  147. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  148. TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  149. TEST_ESP_OK(i2c_reset_tx_fifo(I2C_SLAVE_NUM));
  150. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  151. TEST_ESP_OK(i2c_reset_rx_fifo(I2C_SLAVE_NUM));
  152. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
  153. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  154. }
  155. TEST_CASE("I2C timing test", "[i2c]")
  156. {
  157. int test_setup_time, test_data_time, test_stop_time, test_hold_time;
  158. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  159. i2c_config_t conf_master = i2c_master_init();
  160. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  161. I2C_MASTER_RX_BUF_DISABLE,
  162. I2C_MASTER_TX_BUF_DISABLE, 0));
  163. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  164. TEST_ESP_OK(i2c_set_start_timing(I2C_MASTER_NUM, 50, 60));
  165. TEST_ESP_OK(i2c_set_data_timing(I2C_MASTER_NUM, 80, 60));
  166. TEST_ESP_OK(i2c_set_stop_timing(I2C_MASTER_NUM, 100, 60));
  167. for (int i = 0; i < DATA_LENGTH; i++) {
  168. data_wr[i] = i;
  169. }
  170. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  171. TEST_ESP_OK(i2c_get_start_timing(I2C_MASTER_NUM, &test_setup_time, &test_hold_time));
  172. TEST_ESP_OK(i2c_get_data_timing(I2C_MASTER_NUM, &test_data_time, &test_hold_time));
  173. TEST_ESP_OK(i2c_get_stop_timing(I2C_MASTER_NUM, &test_stop_time, &test_hold_time));
  174. TEST_ASSERT_EQUAL_INT32(50, test_setup_time);
  175. TEST_ASSERT_EQUAL_INT32(80, test_data_time);
  176. TEST_ASSERT_EQUAL_INT32(100, test_stop_time);
  177. TEST_ASSERT_EQUAL_INT32(60, test_hold_time);
  178. free(data_wr);
  179. i2c_driver_delete(I2C_MASTER_NUM);
  180. }
  181. TEST_CASE("I2C data mode test", "[i2c]")
  182. {
  183. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  184. i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
  185. i2c_config_t conf_master = i2c_master_init();
  186. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  187. I2C_MASTER_RX_BUF_DISABLE,
  188. I2C_MASTER_TX_BUF_DISABLE, 0));
  189. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  190. for (int i = 0; i < DATA_LENGTH; i++) {
  191. data_wr[i] = i;
  192. }
  193. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
  194. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  195. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_tx_trans_mode);
  196. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_rx_trans_mode);
  197. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  198. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST));
  199. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  200. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_tx_trans_mode);
  201. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_rx_trans_mode);
  202. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  203. free(data_wr);
  204. i2c_driver_delete(I2C_MASTER_NUM);
  205. }
  206. TEST_CASE("I2C driver memory leaking check", "[i2c]")
  207. {
  208. esp_err_t ret;
  209. int size = esp_get_free_heap_size();
  210. for (uint32_t i = 0; i <= 1000; i++) {
  211. ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  212. I2C_SLAVE_RX_BUF_LEN,
  213. I2C_SLAVE_TX_BUF_LEN, 0);
  214. TEST_ASSERT(ret == ESP_OK);
  215. vTaskDelay(10 / portTICK_RATE_MS);
  216. i2c_driver_delete(I2C_SLAVE_NUM);
  217. TEST_ASSERT(ret == ESP_OK);
  218. }
  219. TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
  220. }
  221. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  222. // print the reading buffer
  223. static void disp_buf(uint8_t *buf, int len)
  224. {
  225. int i;
  226. for (i = 0; i < len; i++) {
  227. printf("%02x ", buf[i]);
  228. if (( i + 1 ) % 16 == 0) {
  229. printf("\n");
  230. }
  231. }
  232. printf("\n");
  233. }
  234. static void i2c_master_write_test(void)
  235. {
  236. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  237. int i;
  238. i2c_config_t conf_master = i2c_master_init();
  239. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  240. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  241. I2C_MASTER_RX_BUF_DISABLE,
  242. I2C_MASTER_TX_BUF_DISABLE, 0));
  243. unity_wait_for_signal("i2c slave init finish");
  244. unity_send_signal("master write");
  245. for (i = 0; i < DATA_LENGTH / 2; i++) {
  246. data_wr[i] = i;
  247. }
  248. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, DATA_LENGTH / 2);
  249. disp_buf(data_wr, i + 1);
  250. free(data_wr);
  251. unity_wait_for_signal("ready to delete");
  252. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  253. }
  254. static void i2c_slave_read_test(void)
  255. {
  256. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  257. int size_rd = 0;
  258. int len = 0;
  259. i2c_config_t conf_slave = i2c_slave_init();
  260. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  261. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  262. I2C_SLAVE_RX_BUF_LEN,
  263. I2C_SLAVE_TX_BUF_LEN, 0));
  264. unity_send_signal("i2c slave init finish");
  265. unity_wait_for_signal("master write");
  266. while (1) {
  267. len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, DATA_LENGTH, 10000 / portTICK_RATE_MS);
  268. if (len == 0) {
  269. break;
  270. }
  271. size_rd += len;
  272. }
  273. disp_buf(data_rd, size_rd);
  274. for (int i = 0; i < size_rd; i++) {
  275. TEST_ASSERT(data_rd[i] == i);
  276. }
  277. free(data_rd);
  278. unity_send_signal("ready to delete");
  279. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  280. }
  281. TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
  282. static void master_read_slave_test(void)
  283. {
  284. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  285. memset(data_rd, 0, DATA_LENGTH);
  286. i2c_config_t conf_master = i2c_master_init();
  287. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  288. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  289. I2C_MASTER_RX_BUF_DISABLE,
  290. I2C_MASTER_TX_BUF_DISABLE, 0));
  291. unity_wait_for_signal("i2c slave init finish");
  292. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  293. i2c_master_start(cmd);
  294. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  295. unity_send_signal("slave write");
  296. unity_wait_for_signal("master read");
  297. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH-1, ACK_VAL);
  298. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH-1, NACK_VAL);
  299. i2c_master_stop(cmd);
  300. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  301. i2c_cmd_link_delete(cmd);
  302. vTaskDelay(100 / portTICK_RATE_MS);
  303. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  304. printf("%d\n", data_rd[i]);
  305. TEST_ASSERT(data_rd[i]==i);
  306. }
  307. free(data_rd);
  308. unity_send_signal("ready to delete");
  309. i2c_driver_delete(I2C_MASTER_NUM);
  310. }
  311. static void slave_write_buffer_test(void)
  312. {
  313. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  314. int size_rd;
  315. i2c_config_t conf_slave = i2c_slave_init();
  316. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  317. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  318. I2C_SLAVE_RX_BUF_LEN,
  319. I2C_SLAVE_TX_BUF_LEN, 0));
  320. unity_send_signal("i2c slave init finish");
  321. unity_wait_for_signal("slave write");
  322. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  323. data_wr[i] = i;
  324. }
  325. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  326. disp_buf(data_wr, size_rd);
  327. unity_send_signal("master read");
  328. unity_wait_for_signal("ready to delete");
  329. free(data_wr);
  330. i2c_driver_delete(I2C_SLAVE_NUM);
  331. }
  332. TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
  333. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32)
  334. static void i2c_master_write_read_test(void)
  335. {
  336. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  337. memset(data_rd, 0, DATA_LENGTH);
  338. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  339. i2c_config_t conf_master = i2c_master_init();
  340. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  341. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  342. I2C_MASTER_RX_BUF_DISABLE,
  343. I2C_MASTER_TX_BUF_DISABLE, 0));
  344. unity_wait_for_signal("i2c slave init finish");
  345. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  346. i2c_master_start(cmd);
  347. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  348. unity_send_signal("slave write");
  349. unity_wait_for_signal("master read and write");
  350. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH, ACK_VAL);
  351. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH, NACK_VAL);
  352. i2c_master_stop(cmd);
  353. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  354. i2c_cmd_link_delete(cmd);
  355. vTaskDelay(100 / portTICK_RATE_MS);
  356. disp_buf(data_rd, RW_TEST_LENGTH);
  357. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  358. TEST_ASSERT(data_rd[i] == i/2);
  359. }
  360. for (int i = 0; i < DATA_LENGTH; i++) {
  361. data_wr[i] = i % 3;
  362. }
  363. vTaskDelay(100 / portTICK_RATE_MS);
  364. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  365. free(data_wr);
  366. free(data_rd);
  367. unity_send_signal("slave read");
  368. unity_wait_for_signal("ready to delete");
  369. i2c_driver_delete(I2C_MASTER_NUM);
  370. }
  371. static void i2c_slave_read_write_test(void)
  372. {
  373. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  374. memset(data_rd, 0, DATA_LENGTH);
  375. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  376. int size_rd;
  377. i2c_config_t conf_slave = i2c_slave_init();
  378. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  379. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  380. I2C_SLAVE_RX_BUF_LEN,
  381. I2C_SLAVE_TX_BUF_LEN, 0));
  382. unity_send_signal("i2c slave init finish");
  383. unity_wait_for_signal("slave write");
  384. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  385. data_wr[i] = i/2;
  386. }
  387. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  388. disp_buf(data_wr, size_rd);
  389. unity_send_signal("master read and write");
  390. unity_wait_for_signal("slave read");
  391. size_rd = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 1000 / portTICK_RATE_MS);
  392. printf("slave read data is:\n");
  393. disp_buf(data_rd, size_rd);
  394. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  395. TEST_ASSERT(data_rd[i] == i % 3);
  396. }
  397. free(data_wr);
  398. free(data_rd);
  399. unity_send_signal("ready to delete");
  400. i2c_driver_delete(I2C_SLAVE_NUM);
  401. }
  402. TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
  403. static void i2c_master_repeat_write(void)
  404. {
  405. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  406. int times = 3;
  407. i2c_config_t conf_master = i2c_master_init();
  408. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  409. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  410. I2C_MASTER_RX_BUF_DISABLE,
  411. I2C_MASTER_TX_BUF_DISABLE, 0));
  412. unity_wait_for_signal("i2c slave init finish");
  413. for (int j = 0; j < times; j++) {
  414. for (int i = 0; i < DATA_LENGTH; i++) {
  415. data_wr[i] = j + i;
  416. }
  417. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  418. disp_buf(data_wr, RW_TEST_LENGTH);
  419. }
  420. free(data_wr);
  421. unity_send_signal("master write");
  422. unity_wait_for_signal("ready to delete");
  423. i2c_driver_delete(I2C_MASTER_NUM);
  424. }
  425. static void i2c_slave_repeat_read(void)
  426. {
  427. int size_rd = 0;
  428. int times = 3;
  429. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH * 3);
  430. i2c_config_t conf_slave = i2c_slave_init();
  431. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  432. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  433. I2C_SLAVE_RX_BUF_LEN,
  434. I2C_SLAVE_TX_BUF_LEN, 0));
  435. unity_send_signal("i2c slave init finish");
  436. unity_wait_for_signal("master write");
  437. while (1) {
  438. int len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, RW_TEST_LENGTH * 3, 10000 / portTICK_RATE_MS);
  439. if (len == 0) {
  440. break;
  441. }
  442. size_rd += len;
  443. }
  444. disp_buf(data_rd, size_rd);
  445. for (int j = 0; j < times; j++) {
  446. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  447. printf("data: %d, %d\n", data_rd[j * RW_TEST_LENGTH + i], (i % 129 + j));
  448. TEST_ASSERT(data_rd[j * RW_TEST_LENGTH + i] == (i % 129 + j));
  449. }
  450. }
  451. free(data_rd);
  452. unity_send_signal("ready to delete");
  453. i2c_driver_delete(I2C_SLAVE_NUM);
  454. }
  455. TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
  456. #endif //DISABLED_FOR_TARGET(ESP32S2, ESP32)
  457. #endif //DISABLED_FOR_TARGET(ESP32S2)
  458. static volatile bool exit_flag;
  459. static bool test_read_func;
  460. static void test_task(void *pvParameters)
  461. {
  462. xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
  463. uint8_t *data = (uint8_t *) malloc(DATA_LENGTH);
  464. i2c_config_t conf_slave = i2c_slave_init();
  465. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  466. I2C_SLAVE_RX_BUF_LEN,
  467. I2C_SLAVE_TX_BUF_LEN, 0));
  468. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  469. while (exit_flag == false) {
  470. if (test_read_func) {
  471. i2c_slave_read_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  472. } else {
  473. i2c_slave_write_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  474. }
  475. vTaskDelay(10/portTICK_RATE_MS);
  476. }
  477. free(data);
  478. xSemaphoreGive(*sema);
  479. vTaskDelete(NULL);
  480. }
  481. TEST_CASE("test i2c_slave_read_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  482. {
  483. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  484. exit_flag = false;
  485. test_read_func = true;
  486. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  487. printf("Waiting for 5 sec\n");
  488. vTaskDelay(5000 / portTICK_PERIOD_MS);
  489. exit_flag = true;
  490. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  491. vSemaphoreDelete(exit_sema);
  492. } else {
  493. TEST_FAIL_MESSAGE("i2c_slave_read_buffer is blocked");
  494. }
  495. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  496. }
  497. TEST_CASE("test i2c_slave_write_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  498. {
  499. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  500. exit_flag = false;
  501. test_read_func = false;
  502. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  503. printf("Waiting for 5 sec\n");
  504. vTaskDelay(5000 / portTICK_PERIOD_MS);
  505. exit_flag = true;
  506. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  507. vSemaphoreDelete(exit_sema);
  508. } else {
  509. TEST_FAIL_MESSAGE("i2c_slave_write_buffer is blocked");
  510. }
  511. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  512. }
  513. TEST_CASE("I2C general API test", "[i2c]")
  514. {
  515. #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
  516. #define I2C_TEST_TIME 0x3ff
  517. #else
  518. #define I2C_TEST_TIME 0x1f
  519. #endif
  520. const int i2c_num = 0;
  521. i2c_config_t conf_master = {
  522. .mode = I2C_MODE_MASTER,
  523. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  524. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  525. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  526. .sda_io_num = I2C_MASTER_SDA_IO,
  527. .scl_io_num = I2C_MASTER_SCL_IO,
  528. };
  529. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  530. int time_get0, time_get1;
  531. for(int i = 10; i < I2C_TEST_TIME; i++) {
  532. //set period test
  533. TEST_ESP_OK(i2c_set_period(i2c_num, i, i));
  534. TEST_ESP_OK(i2c_get_period(i2c_num, &time_get0, &time_get1));
  535. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  536. //set start timing test
  537. TEST_ESP_OK(i2c_set_start_timing(i2c_num, i, i));
  538. TEST_ESP_OK(i2c_get_start_timing(i2c_num, &time_get0, &time_get1));
  539. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  540. //set stop timing test
  541. TEST_ESP_OK(i2c_set_stop_timing(i2c_num, i, i));
  542. TEST_ESP_OK(i2c_get_stop_timing(i2c_num, &time_get0, &time_get1));
  543. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  544. //set data timing test
  545. TEST_ESP_OK(i2c_set_data_timing(i2c_num, i, i));
  546. TEST_ESP_OK(i2c_get_data_timing(i2c_num, &time_get0, &time_get1));
  547. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  548. //set time out test
  549. TEST_ESP_OK(i2c_set_timeout(i2c_num, i));
  550. TEST_ESP_OK(i2c_get_timeout(i2c_num, &time_get0));
  551. TEST_ASSERT(time_get0 == i);
  552. }
  553. }
  554. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
  555. //Init uart baud rate detection
  556. static void uart_aut_baud_det_init(int rxd_io_num)
  557. {
  558. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[rxd_io_num], PIN_FUNC_GPIO);
  559. gpio_set_direction(rxd_io_num, GPIO_MODE_INPUT_OUTPUT);
  560. esp_rom_gpio_connect_out_signal(rxd_io_num, I2CEXT1_SCL_OUT_IDX, 0, 0);
  561. esp_rom_gpio_connect_in_signal(rxd_io_num, U1RXD_IN_IDX, 0);
  562. periph_module_enable(PERIPH_UART1_MODULE);
  563. UART1.int_ena.val = 0;
  564. UART1.int_clr.val = ~0;
  565. UART1.auto_baud.en = 1;
  566. }
  567. //Calculate I2C scl freq
  568. static void i2c_scl_freq_cal(void)
  569. {
  570. const int i2c_source_clk_freq = 80000000;
  571. const float i2c_cource_clk_period = 0.0125;
  572. int edg_cnt = UART1.rxd_cnt.edge_cnt;
  573. int pospulse_cnt = UART1.pospulse.min_cnt;
  574. int negpulse_cnt = UART1.negpulse.min_cnt;
  575. int high_period_cnt = UART1.highpulse.min_cnt;
  576. int low_period_cnt = UART1.lowpulse.min_cnt;
  577. if(edg_cnt != 542) {
  578. printf("\nedg_cnt != 542, test fail\n");
  579. return;
  580. }
  581. printf("\nDetected SCL frequency: %d Hz\n", i2c_source_clk_freq / ((pospulse_cnt + negpulse_cnt) / 2) );
  582. printf("\nSCL high period %.3f (us), SCL low_period %.3f (us)\n\n", (float)(i2c_cource_clk_period * high_period_cnt), (float)(i2c_cource_clk_period * low_period_cnt));
  583. UART1.auto_baud.en = 0;
  584. periph_module_disable(PERIPH_UART1_MODULE);
  585. }
  586. TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
  587. {
  588. //Use the UART baud rate detection function to detect the I2C SCL frequency.
  589. const int i2c_num = 1;
  590. const int uart1_rxd_io = 5;
  591. i2c_config_t conf_master = {
  592. .mode = I2C_MODE_MASTER,
  593. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  594. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  595. .master.clk_speed = 400000,
  596. .sda_io_num = I2C_MASTER_SDA_IO,
  597. .scl_io_num = I2C_MASTER_SCL_IO,
  598. };
  599. uint8_t *data = (uint8_t *)malloc(30);
  600. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  601. TEST_ESP_OK(i2c_driver_install(i2c_num, I2C_MODE_MASTER, 0, 0, 0));
  602. memset(data, 0, 0);
  603. uart_aut_baud_det_init(uart1_rxd_io);
  604. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  605. i2c_master_start(cmd);
  606. i2c_master_write(cmd, data, 30, ACK_CHECK_DIS);
  607. i2c_master_stop(cmd);
  608. i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  609. i2c_cmd_link_delete(cmd);
  610. i2c_scl_freq_cal();
  611. free(data);
  612. TEST_ESP_OK(i2c_driver_delete(i2c_num));
  613. }
  614. #endif